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SiFive-v0.1.0

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@darthscsi darthscsi released this 26 Mar 01:17
· 5192 commits to main since this release
sifive/0/1/0
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Learn about vigilant mode.

This release covers accumulated bug fixes after the 0.0.9 release from running CIRCT on a matrix of internal designs.

What's Changed

  • use hasVerifier instead of verifier by @DeepFlyingSky in #2775
  • [FIRRTL][InstanceGraph] Add missing implementation of addModule() by @youngar in #2786
  • Bump LLVM to 1ebf1afb4ff by @nandor in #2789
  • [FIRRTL] Parse nonlocal annotations on ports correctly by @prithayan in #2792
  • [NFC] Rename dump method with toString method by @DeepFlyingSky in #2797
  • [HW] GlobalRefOp performance enhancement by @teqdruid in #2796
  • [FIRRTL] Put Grand Central Black Boxes in Correct Directories by @seldridge in #2798
  • [FIRRTL] Infer type of mux with aggregate operands by @fabianschuiki in #2807
  • [FIRRTL] Cleaned up verifiers for connects by @nandor in #2765
  • [FIRRTL] Verified types for RegOp and RegResetOp by @nandor in #2741
  • [FIRParser] Expand and remove partial connects at parse time by @youngar in #2793
  • [PrepareForEmission] Add max expression size before creating a wire. by @mikeurbach in #2795
  • [ExportVerilog] Add explicit bitcast for width mismatch LINT errors by @prithayan in #2756
  • [MSFT] [PyCDE] Make placement DB global rather than rooted by @teqdruid in #2804

Full Changelog: sifive/0/0/9...sifive/0/1/0

Contributors

fabianschuiki, nandor, and 6 other contributors
Assets 2
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