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i#7050 remove preempted instruction and memref. #7058
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…ansfer. When an instruction is preempted by a kernel transfer, the instruction is not retired. The trace might not have captured all the read and write records. To avoid false positive, the invariant checker should reset the expected read and write record counters. Fixes #7050
…b.com:DynamoRIO/dynamorio into i7050-remove-preempted-instructions
@@ -13,7 +13,7 @@ Total counts: | |||
.* total data loads |
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I looked back at the details and I really do not understand what is happening with this. Could you explain how this scenario occurred? I wrote some of my confusion at #7050 (comment).
Putting aside the fact that a regular asynch signal should not cause this kind of thing: if there were some real preempt from say thread relocation, why isn't raw2trace filling in the rest of the instructions in the block? How is the handler code running already? That makes it sound like raw2trace is already truncating the rest of the block and somehow solving #5790? On that note is this PR as written solving #5790?
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What is in the raw trace records? What is the instruction count for the shl
block? What is the exact raw trace order of the branch's block PC, shl block PC, shl address, and signal marker?
Change the implementation to remove instructions and memrefs preempted by kernel events.
Interruption by RSEQ ABORT follows by KERNEL EVENT is already handled by handle_kernel_interrupt_and_markers().
Unit test test_rseq_rollback_legacy covers this case.
In oder to remove preempted instructions and memrefs, a new function preempted_by_kernel_event() is added to look for KERNEL EVENT marker which may be preceded by memrefs. If a KERNEL EVENT marker is found with the same PC, the instruction and any following memrefs are removed.
Add unit tests to cover instruction and memref removed caused by a KERNEL EVENT.
Update offline-legacy-int-offs.templatex, offline-burst_aarch64_sys.templatex and signal_invariants.c to account for removed instructions.
Fixes #7050