[SM7CUSTV1] add SM7 CUSTV1 support

* add SM7CUSTV1 * fix poweroff function * [SM7CUSTV1] add SM7 CUSTV1 support Signed-off-by: siyuan.yang <[email protected]> --------- Signed-off-by: siyuan.yang <[email protected]> Co-authored-by: siyuan.yang <[email protected]>
sophgo · May 28, 2024 · 1c779d3 · 1c779d3
1 parent 7a7065e
commit 1c779d3
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diff --git a/SM7CUSTV1/Makefile b/SM7CUSTV1/Makefile
@@ -0,0 +1,132 @@
+TARGET = SM7CUSTV1
+DEBUG = 1
+STANDALONE = 0
+CLOSEPMIC = 0
+
+ifeq ($(strip $(V)), 1)
+	Q =
+	E =
+else
+	Q = @
+	E = 1>/dev/null 2>&1
+endif
+
+OPENCM3_DIR = ../libopencm3
+
+OUTDIR = build
+SRCDIR = . i2c-slaves
+INCDIR = . $(OPENCM3_DIR)/include i2c-slaves
+
+C_SRCS = $(foreach dir, $(SRCDIR), $(wildcard $(dir)/*.c))
+S_SRCS = $(foreach dir, $(SRCDIR), $(wildcard $(dir)/*.s))
+S_SRCS += $(foreach dir, $(SRCDIR), $(wildcard $(dir)/*.S))
+
+SRCS = $(C_SRCS) $(S_SRCS)
+OBJS = $(addprefix $(OUTDIR)/, $(notdir $(addsuffix .o, $(basename $(SRCS)))))
+VPATH = $(sort $(dir $(SRCS)))
+
+OBJS := $(sort $(OBJS))
+DEPS := $(patsubst %.o, %.d, $(OBJS))
+
+LDSCRIPT_APP = $(TARGET)_APP.ld
+LDSCRIPT_LOADER = $(TARGET)_LOADER.ld
+
+OPT_CFLAGS = -g -O2
+ARCH_CFLAGS = -mthumb -mcpu=cortex-m0plus
+SPEC_CFLAGS = -specs=nano.specs
+
+CPPFLAGS = $(foreach dir, $(INCDIR), -I$(dir))
+CFLAGS = $(CPPFLAGS) $(OPT_CFLAGS) $(ARCH_CFLAGS) $(SPEC_CFLAGS) \
+	  -std=gnu11 -ffunction-sections -fdata-sections -Wall -Werror \
+	  -DSTM32L0
+
+ifeq ($(strip $(DEBUG)), 1)
+CFLAGS += -DDEBUG
+endif
+
+ifeq ($(strip $(STANDALONE)), 1)
+CFLAGS += -DSTANDALONE
+endif
+
+ifeq ($(strip $(CLOSEPMIC)), 1)
+CFLAGS += -DCLOSEPMIC
+endif
+
+ASFLAGS = $(CFLAGS) -x assembler-with-cpp -Wa,--no-warn
+
+LDFLAGS = $(SPEC_CFLAGS) $(ARCH_CFLAGS) $(OPT_CFLAGS) -static -specs=nosys.specs\
+	   -nostartfiles -Wl,--cref -Wl,--gc-sections \
+	   -L$(OPENCM3_DIR)/lib -lopencm3_stm32l0
+
+CROSS_COMPILE = arm-none-eabi-
+CC = $(CROSS_COMPILE)gcc
+AS = $(CROSS_COMPILE)gcc
+LD = $(CROSS_COMPILE)gcc
+OBJCOPY = $(CROSS_COMPILE)objcopy
+OBJDUMP = $(CROSS_COMPILE)objdump
+READELF = $(CROSS_COMPILE)readelf
+
+all:$(OUTDIR) \
+	$(OUTDIR)/$(TARGET)_APP.elf \
+	$(OUTDIR)/$(TARGET)_APP.bin \
+	$(OUTDIR)/$(TARGET)_APP.dis \
+	$(OUTDIR)/$(TARGET)_LOADER.elf \
+	$(OUTDIR)/$(TARGET)_LOADER.bin \
+	$(OUTDIR)/$(TARGET)_LOADER.dis
+
+$(OUTDIR)/%.bin: $(OUTDIR)/%.elf
+	@echo '[CP] $@'
+	$(Q)$(OBJCOPY) -O binary $< $@
+
+$(OUTDIR)/%.dis: $(OUTDIR)/%.elf
+	@echo '[DP] $@'
+	$(Q)$(READELF) -e $< > $@
+	$(Q)$(OBJDUMP) -D $< >> $@
+
+$(OUTDIR)/%.elf: $(OUTDIR)/%.ld $(OBJS)
+	@echo '[LD] $@'
+	$(Q)$(LD) $(OBJS) $(LDFLAGS) -Wl,-Map,$@.map \
+            -T $< -o $@
+
+$(OUTDIR)/$(LDSCRIPT_APP): target.ldi
+	@echo '[XP] $@'
+	$(Q)$(CC) $(CPPFLAGS) \
+	-D'ROM_START=0x08008000' -D'ROM_SIZE=32K' \
+	-D'RAM_START=0x20000000' -D'RAM_SIZE=8K' \
+	-E -xc -P -C $< > $@
+
+$(OUTDIR)/$(LDSCRIPT_LOADER): target.ldi
+	@echo '[XP] $@'
+	$(Q)$(CC) $(CPPFLAGS) \
+	-D'ROM_START=0x08000000' -D'ROM_SIZE=32K' \
+	-D'RAM_START=0x20000000' -D'RAM_SIZE=8K' \
+	-E -xc -P -C $< > $@
+
+$(OUTDIR)/%.o: %.c | $(OUTDIR)
+	@echo '[CC] $@'
+	$(Q)$(CC) $(CFLAGS) -c $< -o $@
+
+$(OUTDIR)/%.d: %.c | $(OUTDIR)
+	@echo '[CD] $@'
+	$(Q)$(CC) $(CFLAGS) -MM -MF $@ $<
+
+$(OUTDIR):
+	@mkdir -p $@
+
+burn: $(OUTDIR)/$(TARGET)_LOADER.bin
+	st-flash write $< 0x08000000
+
+clean:
+	rm -rf $(OUTDIR)
+
+code: gencode.py config.xlsx
+	@echo '[GEN]'
+	$(Q)./gencode.py config.xlsx -s pin.c -e pin.h -y pin
+	$(Q)./gencode.py config.xlsx -s board_power.c -e board_power.h -p board_power_porting.c -y power
+
+cclean:
+	rm -rf pin.c pin.h board_power.c board_power.h
+
+.PHONY: clean burn
+
+include $(wildcard $(DEPS))
diff --git a/SM7CUSTV1/README.md b/SM7CUSTV1/README.md
@@ -0,0 +1 @@
+This MCU firmware is for the SE7 passive cooling device.
diff --git a/SM7CUSTV1/board_power.c b/SM7CUSTV1/board_power.c
@@ -0,0 +1,115 @@
+/* AUTO GENERATED CODE */
+
+#include <power.h>
+#include <pin.h>
+#include <common.h>
+#include <stdlib.h>
+
+int powerchip_init_on(void);
+void powerchip_init_off(void);
+
+int pmic_channel_a_on(void);
+void pmic_channel_a_off(void);
+
+int pmic_channel_d_on(void);
+void pmic_channel_d_off(void);
+
+int pmic_channel_b_on(void);
+void pmic_channel_b_off(void);
+
+int pmic_channel_c_on(void);
+void pmic_channel_c_off(void);
+
+int check_pcie_reset_on(void);
+void check_pcie_reset_off(void);
+
+int sys_rst_deassert_on(void);
+void sys_rst_deassert_off(void);
+
+int sys_rst_assert_on(void);
+void sys_rst_assert_off(void);
+
+struct power_node board_power_nodes[19] = {
+
+	{"EN_12V_SYS", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)EN_12V_SYS_PORT, (unsigned long)EN_12V_SYS_PIN},
+	 },
+
+	{"POWERCHIP_INIT", NODE_TYPE_FUNCTION, POWER_STATUS_OFF, 0,
+	 {(unsigned long)powerchip_init_on, (unsigned long)powerchip_init_off},
+	 },
+
+	{"PMIC-VDD-1.8V", NODE_TYPE_FUNCTION, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)pmic_channel_a_on, (unsigned long)pmic_channel_a_off},
+	 },
+
+	{"VDD-1.8V", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)EN_VDDIO18_PORT, (unsigned long)EN_VDDIO18_PIN},
+	 },
+
+	{"VDD-CORE", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 3000,
+	 {(unsigned long)EN_VDDC_PORT, (unsigned long)EN_VDDC_PIN},
+	 },
+
+	{"VDD-3.3V", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)EN_VDDIO33_PORT, (unsigned long)EN_VDDIO33_PIN},
+	 },
+
+	{"VDD-0.8V", NODE_TYPE_FUNCTION, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)pmic_channel_d_on, (unsigned long)pmic_channel_d_off},
+	 },
+
+	{"ACK-P08", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)P08_PWR_GOOD_PORT, (unsigned long)P08_PWR_GOOD_PIN},
+	 },
+
+	{"VDD-PCIE", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)EN_VDD_PCIE_VP_PORT,
+	  (unsigned long)EN_VDD_PCIE_VP_PIN},
+	 },
+
+	{"ACK-PCIE", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)GPIO2_PORT, (unsigned long)GPIO2_PIN},
+	 },
+
+	{"VDD-TPU", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)EN_VDD_TPU_PORT, (unsigned long)EN_VDD_TPU_PIN},
+	 },
+
+	{"ACK-TPU", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)GPIO3_PORT, (unsigned long)GPIO3_PIN},
+	 },
+
+	{"DDR-VDDQ", NODE_TYPE_FUNCTION, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)pmic_channel_b_on, (unsigned long)pmic_channel_b_off},
+	 },
+
+	{"DDR-VDDQLP", NODE_TYPE_FUNCTION, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)pmic_channel_c_on, (unsigned long)pmic_channel_c_off},
+	 },
+
+	{"VQPS-1.8V", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 3000,
+	 {(unsigned long)EN_VQPS18_PORT, (unsigned long)EN_VQPS18_PIN},
+	 },
+
+	{"CHECK-PCIE-RESET", NODE_TYPE_FUNCTION, POWER_STATUS_OFF, 0,
+	 {(unsigned long)check_pcie_reset_on,
+	  (unsigned long)check_pcie_reset_off},
+	 },
+
+	{"SYS-RST-DEASSERT", NODE_TYPE_FUNCTION, POWER_STATUS_OFF, 1000,
+	 {(unsigned long)sys_rst_deassert_on,
+	  (unsigned long)sys_rst_deassert_off},
+	 },
+
+	{"ACK-DDR", NODE_TYPE_ENABLE, POWER_STATUS_OFF, 29000,
+	 {(unsigned long)DDR_PG_MCU_PORT, (unsigned long)DDR_PG_MCU_PIN},
+	 },
+
+	{"SYS-RST-ASSERT", NODE_TYPE_FUNCTION, POWER_STATUS_OFF, 30000,
+	 {(unsigned long)sys_rst_assert_on, (unsigned long)sys_rst_assert_off},
+	 },
+
+};
+
+/* AUTO GENERATED CODE END */
diff --git a/SM7CUSTV1/board_power.h b/SM7CUSTV1/board_power.h
@@ -0,0 +1,8 @@
+#ifndef __BOARD_POWER_H__
+#define __BOARD_POWER_H__
+
+extern struct power_node board_power_nodes[19];
+
+#endif
+
+/* AUTO GENERATED CODE END */
diff --git a/SM7CUSTV1/board_power_impl.c b/SM7CUSTV1/board_power_impl.c
@@ -0,0 +1,82 @@
+#include <mp5475.h>
+#include <chip.h>
+#include <common.h>
+#include <mp5475.h>
+int pmic_channel_a_on(void)
+{
+	return mp5475_buck_on(0);
+}
+
+void pmic_channel_a_off(void)
+{
+	mp5475_buck_off(0);
+}
+
+int pmic_channel_d_on(void)
+{
+	return mp5475_buck_on(3);
+}
+
+void pmic_channel_d_off(void)
+{
+	mp5475_buck_off(3);
+}
+
+int pmic_channel_b_on(void)
+{
+	return mp5475_buck_on(1);
+}
+
+void pmic_channel_b_off(void)
+{
+	mp5475_buck_off(1);
+}
+
+int pmic_channel_c_on(void)
+{
+	return mp5475_buck_on(2);
+}
+
+void pmic_channel_c_off(void)
+{
+	mp5475_buck_off(2);
+}
+
+int sys_rst_deassert_on(void)
+{
+	chip_enable();
+	return 0;
+}
+
+void sys_rst_deassert_off(void)
+{
+}
+
+int sys_rst_assert_on(void)
+{
+	chip_disable();
+	return 0;
+}
+
+void sys_rst_assert_off(void)
+{
+	/* reset chip firstly when power off */
+	chip_disable();
+}
+
+int check_pcie_reset_on(void)
+{
+	board_init();
+	return 0;
+}
+
+void check_pcie_reset_off(void)
+{
+}
+
+int powerchip_init_on(void)
+{
+	mp5475_init();
+
+	return 0;
+}