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i#3544 RV64: Port more sample tests to RISC-V (DynamoRIO#6766)
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Ports sample.opcodes and sample.callstack tests to RISC-V.

Unlike other architectures, there are no control flags in RISC-V, we use
common.hello as the application to run sample tests,
sample.callstack.control_flags.templatex is renamed to
sample.callstack.templatex.

sample.callstack is yet another test that does not run on QEMU.

Issue: DynamoRIO#3544
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ksco authored Apr 11, 2024
1 parent e75ab23 commit 8a8c10f
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Showing 5 changed files with 37 additions and 6 deletions.
2 changes: 2 additions & 0 deletions api/samples/opcodes.c
Original file line number Diff line number Diff line change
Expand Up @@ -203,6 +203,8 @@ get_count_isa_idx(void *drcontext)
case DR_ISA_ARM_THUMB: return ISA_ARM_THUMB;
#elif defined(AARCH64)
case DR_ISA_ARM_A64: return ISA_ARM_A64;
#elif defined(RISCV64)
case DR_ISA_RV64IMAFDC: return ISA_RV64IMAFDC;
#endif
default: DR_ASSERT(false); /* NYI */
}
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27 changes: 23 additions & 4 deletions core/unix/os_public.h
Original file line number Diff line number Diff line change
Expand Up @@ -205,7 +205,17 @@ typedef kernel_sigcontext_t sigcontext_t;
# define SC_SYSNUM_REG SC_R7
# define SC_RETURN_REG SC_R0
#elif defined(RISCV64)
# define SC_XIP SC_FIELD(sc_regs.pc)
# define SC_RA SC_FIELD(sc_regs.ra)
# define SC_XSP SC_FIELD(sc_regs.sp)
# define SC_GP SC_FIELD(sc_regs.gp)
# define SC_TP SC_FIELD(sc_regs.tp)
# define SC_T0 SC_FIELD(sc_regs.t0)
# define SC_T1 SC_FIELD(sc_regs.t1)
# define SC_T2 SC_FIELD(sc_regs.t2)
# define SC_S0 SC_FIELD(sc_regs.s0)
# define SC_FP SC_FIELD(sc_regs.s0)
# define SC_S1 SC_FIELD(sc_regs.s1)
# define SC_A0 SC_FIELD(sc_regs.a0)
# define SC_A1 SC_FIELD(sc_regs.a1)
# define SC_A2 SC_FIELD(sc_regs.a2)
Expand All @@ -214,11 +224,20 @@ typedef kernel_sigcontext_t sigcontext_t;
# define SC_A5 SC_FIELD(sc_regs.a5)
# define SC_A6 SC_FIELD(sc_regs.a6)
# define SC_A7 SC_FIELD(sc_regs.a7)
# define SC_FP SC_FIELD(sc_regs.s0)
# define SC_S2 SC_FIELD(sc_regs.s2)
# define SC_S3 SC_FIELD(sc_regs.s3)
# define SC_S4 SC_FIELD(sc_regs.s4)
# define SC_S5 SC_FIELD(sc_regs.s5)
# define SC_S6 SC_FIELD(sc_regs.s6)
# define SC_S7 SC_FIELD(sc_regs.s7)
# define SC_S8 SC_FIELD(sc_regs.s8)
# define SC_S9 SC_FIELD(sc_regs.s9)
# define SC_S10 SC_FIELD(sc_regs.s10)
# define SC_S11 SC_FIELD(sc_regs.s11)
# define SC_RA SC_FIELD(sc_regs.ra)
# define SC_XIP SC_FIELD(sc_regs.pc)
# define SC_XSP SC_FIELD(sc_regs.sp)
# define SC_T3 SC_FIELD(sc_regs.t3)
# define SC_T4 SC_FIELD(sc_regs.t4)
# define SC_T5 SC_FIELD(sc_regs.t5)
# define SC_T6 SC_FIELD(sc_regs.t6)
# define SC_SYSNUM_REG SC_A7
# define SC_RETURN_REG SC_A0
#endif /* X86/ARM */
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7 changes: 7 additions & 0 deletions ext/drcallstack/drcallstack.c
Original file line number Diff line number Diff line change
Expand Up @@ -125,6 +125,13 @@ drcallstack_init_walk(dr_mcontext_t *mc, DR_PARAM_OUT drcallstack_walk_t **walk_
# elif defined(ARM)
/* libunwind defines its own struct of 16 regs. */
memcpy(&walk->uc.regs[0], &mc->r0, 16 * sizeof(walk->uc.regs[0]));
# elif defined(RISCV64)
/* unw_context_t is an alias of ucontext_t. */
sigcontext_t *sc = SIGCXT_FROM_UCXT(&walk->uc);
sc->SC_XIP = (ptr_uint_t)mc->pc;
/* x1..x31 is in the same order with no padding. */
memcpy(&sc->SC_RA, &mc->ra, 31 * sizeof(sc->SC_RA));
sc->SC_XSP = mc->xsp;
# else
return DRCALLSTACK_ERROR_FEATURE_NOT_AVAILABLE;
# endif
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3 changes: 2 additions & 1 deletion suite/tests/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -3585,7 +3585,7 @@ if (BUILD_SAMPLES)
samples/${sample}_repstr "-log_to_stderr" "" "")
endif ()
elseif (sample STREQUAL "callstack")
set(sample.${sample}_expectbase "sample.callstack.control_flags")
set(sample.${sample}_expectbase "sample.callstack")
endif()
endforeach ()
endif (NOT ANDROID)
Expand Down Expand Up @@ -6204,6 +6204,7 @@ if (RISCV64)
code_api|sample.inscount.cleancall
code_api|sample.inscount.prof-pcs.cleancall
code_api|sample.opcode_count
code_api|sample.opcodes
code_api|sample.signal
code_api|sample.stl_test
code_api|sample.syscall
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Original file line number Diff line number Diff line change
@@ -1,7 +1,9 @@
wrapping .*malloc
malloc called from:
.*
#ifdef AARCHXX
#if defined(RISCV64)
Hello world!
#elif defined(AARCHXX)
OK 1 N
OK 0 N
OK 1 Z
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