tiling: Remove OutputStage::Done()

Remove OutputStage::Done() and explicitly test the output interval
size from the top level pipeline. We also set the branch complete flag
with a new helper OutputStage::SetBranchComplete() to be explicit.

Rename OutputStage::BranchComplete() to OutputStage::GetBranchComplete()
for consistency.

Signed-off-by: Naushir Patuck <[email protected]>

src/libpisp/backend/tiling/output_stage.cpp

@@ -124,15 +124,13 @@ void OutputStage::Reset()
 	branch_complete_ = false;
 }
 
-bool OutputStage::BranchComplete() const
+bool OutputStage::GetBranchComplete() const
 {
 	return branch_complete_;
 }
 
-bool OutputStage::Done(Dir dir)
+void OutputStage::SetBranchComplete()
 {
-	if (output_interval_.End() >= GetOutputImageSize()[dir])
-		branch_complete_ = true;
-
-	return branch_complete_;
+	branch_complete_ = true;
+	PISP_LOG(debug, "(" << name_ << ") Setting branch complete");
 }

src/libpisp/backend/tiling/output_stage.hpp

@@ -31,8 +31,8 @@ class OutputStage : public BasicStage
 	virtual void PushEndUp(int output_end, Dir dir);
 	virtual void PushCropDown(Interval interval, Dir dir);
 	virtual void Reset();
-	bool BranchComplete() const;
-	bool Done(Dir dir);
+	bool GetBranchComplete() const;
+	void SetBranchComplete();
 
 private:
 	Config config_;

src/libpisp/backend/tiling/pipeline.cpp

@@ -94,7 +94,14 @@ int Pipeline::tileDirection(Dir dir, void *mem, size_t num_items, size_t item_si
 			s->CopyOut(dest, dir);
 		done = true;
 		for (auto s : outputs_)
-			done &= s->Done(dir);
+		{
+			if (s->GetBranchComplete())
+				continue;
+			else if (s->GetOutputInterval().End() >= s->GetOutputImageSize()[dir])
+				s->SetBranchComplete();
+			else
+				done = false;
+		}
 		first_tile_ = false;
 	}