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Add 1M and 4M data bit rate, change clk to 160MHz #1

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@Sl-Alex Sl-Alex commented Sep 27, 2023

This PR changes the following:
- Changes system clock from 170 to 160MHz, making it possible to easily calculate high bit rates
- Fixes low bit rates (prescaler must be smaller than 512)
- Implements additional bit rates, such as 1M and 4M
- Implements transceiver delay (very useful, especially for isolated transceivers with the high loopback delay)
- Adds missing confirmation messages in SLCAN protocol

Important
There is a bug in cangaroo SW, that sets the data bit rate to 2M regardless of the user's choice. I already tested the fix, will clean up the code and prepare a PR.

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