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msm: qcom: Adapt for rosy to get maximum 720Mhz for Adreno 506 GPU
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naups committed Aug 22, 2023
1 parent 502a1bf commit e4884a2
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Showing 2 changed files with 33 additions and 20 deletions.
49 changes: 30 additions & 19 deletions arch/arm64/boot/dts/qcom/sdm450.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,9 @@
< 400000000 4 >, /* SVS Plus */
< 510000000 5 >, /* NOM */
< 560000000 6 >, /* Nom Plus */
< 600000000 7 >; /* Turbo */
< 650000000 7 >, /* Turbo */
< 700000000 7 >, /* Turbo */
< 725000000 7 >; /* Turbo */
};

/* GPU Overrides*/
Expand All @@ -60,71 +62,80 @@

compatible = "qcom,gpu-pwrlevels";

/* TURBO */
/* TURBO LD0 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <600000000>;
qcom,gpu-freq = <725000000>;
qcom,bus-freq = <10>;
qcom,bus-min = <10>;
qcom,bus-max = <10>;
};

/* NOM+ */
/* TURBO */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <650000000>;
qcom,bus-freq = <10>;
qcom,bus-min = <10>;
qcom,bus-max = <10>;
};

/* NOM+ */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <560000000>;
qcom,bus-freq = <10>;
qcom,bus-min = <8>;
qcom,bus-max = <10>;
};

/* NOM */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <510000000>;
qcom,bus-freq = <9>;
qcom,bus-min = <6>;
qcom,bus-max = <10>;
};

/* SVS+ */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <400000000>;
qcom,bus-freq = <7>;
qcom,bus-min = <5>;
qcom,bus-max = <8>;
};

/* SVS */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <320000000>;
qcom,bus-freq = <4>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
};

/* Low SVS */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <216000000>;
qcom,bus-freq = <1>;
qcom,bus-min = <1>;
qcom,bus-freq = <3>;
qcom,bus-min = <2>;
qcom,bus-max = <4>;
};

/* Min SVS */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <133300000>;
qcom,bus-freq = <1>;
qcom,bus-freq = <3>;
qcom,bus-min = <1>;
qcom,bus-max = <4>;
};
/* XO */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-freq = <19200000>;
qcom,bus-freq = <0>;
qcom,bus-min = <0>;
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4 changes: 3 additions & 1 deletion drivers/clk/msm/clock-gcc-8953.c
Original file line number Diff line number Diff line change
Expand Up @@ -409,7 +409,9 @@ static struct clk_freq_tbl ftbl_gfx3d_clk_src_sdm450[] = {
F_MM( 460800000, FIXED_CLK_SRC, gpll4_out_aux, 2.5, 0, 0),
F_MM( 510000000, 1020000000, gpll3, 1, 0, 0),
F_MM( 560000000, 1120000000, gpll3, 1, 0, 0),
F_MM( 600000000, 1200000000, gpll3, 1, 0, 0),
F_MM( 650000000, 1300000000, gpll3, 1, 0, 0),
F_MM( 700000000, 1400000000, gpll3, 1, 0, 0),
F_MM( 725000000, 1450000000, gpll3, 1, 0, 0),
F_END
};

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