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[arm] Ensure context switch doesn't happen from irq #280

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[arm] Ensure context switch doesn't happen from irq #280

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Commits on Oct 25, 2020

  1. [arm] Ensure context switch doesn't happen from irq 

    Context switches should not happen from within the interrupt
context before interrupt is cleared by write to GIC EOIR register,
without it GIC will simply keep that interrupt active even if
the hardware source clears the interrupt to the gic, causing
subsequent irqs from the source to not get delivered to the CPU.

This change adds an assertion that context switch doesn't happen
from irq context before interrupt is EOIed. TCB field is added
to convey if the current thread has interrupt context active, if
so thread_resched should ideally not get called.

Signed-off-by: vannapurve [email protected]
    @vishals4gh
    vishals4gh committed Oct 25, 2020
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