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Fix X220 and T420 CBFS sizes #693

Merged
merged 2 commits into from
May 15, 2020
Merged

Fix X220 and T420 CBFS sizes #693

merged 2 commits into from
May 15, 2020

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snmcmillan
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@snmcmillan snmcmillan commented Mar 9, 2020

Add some room in the CBFS to actually save GPG keys, as well as have room to add libremkey support on libremkey-enabled builds. As of right now, they cannot save GPG keys due to the lack of space. Addresses #690.

We cannot simply revert the sizes due to the 50 second delay being seemingly related to the CBFS size being too large.

The values provided here do work on my T420 and X220, do not cause said delay, and will enable GPG keys being saved as well as libremkey support presumably working on libremkey-enabled builds (someone with one needs to test to confirm it, I get all the prompts and such, I just don't have a libremkey to test if behavior is as expected).

Add some room in the CBFS to actually save GPG keys, as well as have room to add libremkey support.
@snmcmillan snmcmillan changed the title [WIP] Fix X220 and T420 CBFS sizes Fix X220 and T420 CBFS sizes Mar 9, 2020
@tlaurion
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tlaurion commented Mar 10, 2020

@SebastianMcMillan @eganonoa #568 (comment)

Once again. Most recent Lenovo BIOS update(which one) needs to be applied (and documented), providing consistent original Intel ME, needs to present to extract consistent blobs and offer the same IFD/CBFS defined regions. The guideline referred here in link is in goal of having consistent upgradeable CBFS regions (required to flash internally, which means only reflashing the BIOS section determined by coreboot in CBFS configuration section of coreboot config which needs to match IFD descriptor in blob).

If we go with a first, required, externally flashed Heads build, containing well carved and consistent CBFS region, containing modified IFD description (expended) and neutered+deactivated ME (reduced maximally), then Heads provided board flash command could be modified in next ROM upgrade to flash whole ROM images, not only --ifd --image bios region. That would permit maximal available and usable space for all Heads needs for a specific board, in a reproducible manner (through #307 acceptance of plan.) We need to figure out a way out of this: Leave generic boards alone which not require external reflashing and create new ones requiring more space and requiring external reflashing and coument actual boards properly, stating that they fit not modified IFD/ME? I personally think this is the way to go. Else we leave users having followed past users having followed actual blobs/platforms/scripts foobar, since they will try to flash a CBFS region that won't have enough space to fit newer Heads versions, to address @merge concern here.

Else, we are stuck at using original boards consistent CBFS sizes that match ifd original descriptor size without ME neutered, requiring CBFS regions to match non-neutered ME. Hope I made this point clear this time.

This same situation will be valid for all Ivy/Sandy bridges without mrc, fsp and fully neutered Intel ME (no syslib, no kernel in ME), while to a wider extent, to all existing and future coreboot Intel board inclusion (and probably AMD too, we'll see) in Heads with less freeable space in ME and less available space in Coreboot since relying on more required blobs to be present for initialization of hardware.

All those concerns should probably be in another ticket. I'll cherrypick those later on.

@tlaurion tlaurion mentioned this pull request Mar 10, 2020
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@eganonoa
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eganonoa commented Mar 11, 2020 via email

@tlaurion
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@SebastianMcMillan @eganonoa : See #690 (comment)

@snmcmillan
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@tlaurion you able to review this and merge the changes? My X220 and T420 were both on latest stock firmwares and this the size in this PR are as high as they can go for now. Further work will need to be done to maximize the space of these systems, but that'll be a ways away, and as of right now they don't even function in master, so this is better than nothing.

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3 participants