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Pull requests: enjoy-digital/litex
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build: efinix: allow clk inverting and different in clk on reg tristates
#2087
opened Oct 1, 2024 by
maass-hamburg
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Fix AXI version of the Zynq7000 busses and add mapped connect fuction
answered-waiting-feedback
#1989
opened Jun 16, 2024 by
JoyBed
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soc/integration: Ensure the video framebuffer fits in main RAM
#1915
opened Apr 4, 2024 by
davidar
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