unify handlers for VCOMISH and VUCOMISH instructions

bochs-emu · Oct 26, 2024 · 50c5052 · 50c5052
1 parent a94ebf9
commit 50c5052
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Showing 3 changed files with 7 additions and 20 deletions.
diff --git a/bochs/cpu/avx/avx512_pfp16.cc b/bochs/cpu/avx/avx512_pfp16.cc
@@ -133,26 +133,16 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VCMPPH_MASK_KGdHphWphIbR(bxInstruction_c *
   BX_NEXT_INSTR(i);
 }
 
-void BX_CPP_AttrRegparmN(1) BX_CPU_C::UCOMISH_VshWshR(bxInstruction_c *i)
-{
-  float16 op1 = BX_READ_XMM_REG_LO_WORD(i->dst()), op2 = BX_READ_XMM_REG_LO_WORD(i->src());
-
-  softfloat_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
-  softfloat_status_word_rc_override(status, i);
-  int rc = f16_compare_quiet(op1, op2, &status);
-  check_exceptionsSSE(softfloat_getExceptionFlags(&status));
-  BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
-
-  BX_NEXT_INSTR(i);
-}
+#include "cpu/decoder/ia_opcodes.h"
 
-void BX_CPP_AttrRegparmN(1) BX_CPU_C::COMISH_VshWshR(bxInstruction_c *i)
+void BX_CPP_AttrRegparmN(1) BX_CPU_C::VCOMISH_VshWshR(bxInstruction_c *i)
 {
   float16 op1 = BX_READ_XMM_REG_LO_WORD(i->dst()), op2 = BX_READ_XMM_REG_LO_WORD(i->src());
 
   softfloat_status_t status = mxcsr_to_softfloat_status_word(MXCSR);
   softfloat_status_word_rc_override(status, i);
-  int rc = f16_compare(op1, op2, &status);
+  bool quiet = (i->getIaOpcode() == BX_IA_V512_VUCOMISH_VshWsh);
+  int rc = f16_compare(op1, op2, quiet, &status);
   check_exceptionsSSE(softfloat_getExceptionFlags(&status));
   BX_CPU_THIS_PTR write_eflags_fpu_compare(rc);
 
@@ -467,8 +457,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::VRNDSCALESH_MASK_VshHphWshIbR(bxInstructio
   BX_NEXT_INSTR(i);
 }
 
-#include "cpu/decoder/ia_opcodes.h"
-
 void BX_CPP_AttrRegparmN(1) BX_CPU_C::VFCMULCSH_MASK_VshHphWshR(bxInstruction_c *i)
 {
   if (i->dst() == i->src1() || i->dst() == i->src2()) {

diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h
@@ -3625,8 +3625,7 @@ class BOCHSAPI BX_CPU_C : public logfunctions {
   BX_SMF void VFPCLASSPH_MASK_KGdWphIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
   BX_SMF void VFPCLASSSH_MASK_KGbWshIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
 
-  BX_SMF void COMISH_VshWshR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
-  BX_SMF void UCOMISH_VshWshR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
+  BX_SMF void VCOMISH_VshWshR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
 
   BX_SMF void VCMPPH_MASK_KGdHphWphIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);
   BX_SMF void VCMPSH_MASK_KGbHshWshIbR(bxInstruction_c *) BX_CPP_AttrRegparmN(1);

diff --git a/bochs/cpu/decoder/ia_opcodes_evex.def b/bochs/cpu/decoder/ia_opcodes_evex.def
@@ -1372,8 +1372,8 @@ bx_define_opcode(BX_IA_V512_VFMSUBADD231PH_VphHphWph_Kmask, "vfmsubadd231ph", "v
 bx_define_opcode(BX_IA_V512_VFPCLASSPH_KGdWphIb_Kmask, "vfpclassph", "vfpclassph", &BX_CPU_C::LOAD_BROADCAST_MASK_VectorW, &BX_CPU_C::VFPCLASSPH_MASK_KGdWphIbR, BX_ISA_AVX512_FP16, OP_KGd, OP_mVph, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE)
 bx_define_opcode(BX_IA_V512_VFPCLASSSH_KGbWshIb_Kmask, "vfpclasssh", "vfpclasssh", &BX_CPU_C::LOAD_MASK_Ww, &BX_CPU_C::VFPCLASSSH_MASK_KGbWshIbR, BX_ISA_AVX512_FP16, OP_KGb, OP_mVsh, OP_Ib, OP_NONE, BX_PREPARE_EVEX_NO_SAE | BX_PREPARE_EVEX_NO_BROADCAST | BX_EVEX_VL_IGNORE)
 
-bx_define_opcode(BX_IA_V512_VUCOMISH_VshWsh, "vucomish", "vucomish", &BX_CPU_C::LOAD_Ww, &BX_CPU_C::UCOMISH_VshWshR, BX_ISA_AVX512_FP16, OP_Vsh, OP_mVsh, OP_NONE, OP_NONE, BX_PREPARE_EVEX_NO_BROADCAST | BX_EVEX_VL_IGNORE)
-bx_define_opcode(BX_IA_V512_VCOMISH_VshWsh, "vcomish", "vcomish", &BX_CPU_C::LOAD_Ww, &BX_CPU_C::COMISH_VshWshR, BX_ISA_AVX512_FP16, OP_Vsh, OP_mVsh, OP_NONE, OP_NONE, BX_PREPARE_EVEX_NO_BROADCAST | BX_EVEX_VL_IGNORE)
+bx_define_opcode(BX_IA_V512_VUCOMISH_VshWsh, "vucomish", "vucomish", &BX_CPU_C::LOAD_Ww, &BX_CPU_C::VCOMISH_VshWshR, BX_ISA_AVX512_FP16, OP_Vsh, OP_mVsh, OP_NONE, OP_NONE, BX_PREPARE_EVEX_NO_BROADCAST | BX_EVEX_VL_IGNORE)
+bx_define_opcode(BX_IA_V512_VCOMISH_VshWsh, "vcomish", "vcomish", &BX_CPU_C::LOAD_Ww, &BX_CPU_C::VCOMISH_VshWshR, BX_ISA_AVX512_FP16, OP_Vsh, OP_mVsh, OP_NONE, OP_NONE, BX_PREPARE_EVEX_NO_BROADCAST | BX_EVEX_VL_IGNORE)
 
 bx_define_opcode(BX_IA_V512_VCMPPH_KGdHphWphIb, "vcmpph", "vcmpph", &BX_CPU_C::LOAD_BROADCAST_MASK_VectorW, &BX_CPU_C::VCMPPH_MASK_KGdHphWphIbR, BX_ISA_AVX512_FP16, OP_KGd, OP_Hph, OP_mVph, OP_Ib, BX_PREPARE_EVEX)
 bx_define_opcode(BX_IA_V512_VCMPSH_KGbHshWshIb, "vcmpsh", "vcmpsh", &BX_CPU_C::LOAD_MASK_Ww, &BX_CPU_C::VCMPSH_MASK_KGbHshWshIbR, BX_ISA_AVX512_FP16, OP_KGb, OP_Hsh, OP_mVsh, OP_Ib, BX_PREPARE_EVEX_NO_BROADCAST | BX_EVEX_VL_IGNORE)