Added device tree overlays files for armsom-sige3 board:OV13850 camer…

…a and 10hd display

arch/arm64/boot/dts/rockchip/overlay/Makefile

@@ -1,5 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+	armsom-sige3-camera-ov13850.dtbo \
+	armsom-sige3-display-10hd.dtbo \
 	armsom-sige7-camera-imx415-4k.dtbo \
 	armsom-sige7-camera-ov13850-csi0.dtbo \
 	armsom-sige7-camera-ov13850-csi1.dtbo \

arch/arm64/boot/dts/rockchip/overlay/armsom-sige3-camera-ov13850.dts

@@ -0,0 +1,119 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/rk3568-cru.h>
+#include <dt-bindings/power/rk3568-power.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+	fragment@0 {
+		target = <&i2c2>;
+
+		__overlay__ {
+		status = "okay";
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c2m1_xfer>;
+
+			ov13850: ov13850@10 {
+				status = "okay";
+				compatible = "ovti,ov13850";
+				reg = <0x10>;
+				clocks = <&cru CLK_CIF_OUT>;
+				clock-names = "xvclk";
+				power-domains = <&power RK3568_PD_VI>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&cif_clk>;
+				pwdn-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+				reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
+				rockchip,camera-module-index = <0>;
+				rockchip,camera-module-facing = "back";
+				rockchip,camera-module-name = "ZC-OV13850R2A-V1";
+				rockchip,camera-module-lens-name = "Largan-50064B31";
+				port {
+					ucam_out0: endpoint {
+						remote-endpoint = <&mipi_in_ucam0>;
+						data-lanes = <1 2 3 4>;
+					};
+				};
+			};
+		};
+	};
+
+	fragment@1 {
+		target = <&csi2_dphy_hw>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@2 {
+		target = <&csi2_dphy0>;
+
+		__overlay__ {
+			status = "okay";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				port@0 {
+					reg = <0>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					mipi_in_ucam0: endpoint@1 {
+						reg = <1>;
+						remote-endpoint = <&ucam_out0>;
+						data-lanes = <1 2 3 4>;
+					};
+				};
+				port@1 {
+					reg = <1>;
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					csidphy_out: endpoint@0 {
+						reg = <0>;
+						remote-endpoint = <&isp0_in>;
+					};
+				};
+			};
+		};
+	};
+
+	fragment@3 {
+		target = <&isp_mmu>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@4 {
+		target = <&rkisp>;
+
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@5 {
+		target = <&rkisp_vir0>;
+
+		__overlay__ {
+			status = "okay";
+
+			port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				isp0_in: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&csidphy_out>;
+				};
+			};
+		};
+	};
+
+};