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{Bp-sim] multiple backports to fix sim #14380

Merged
merged 6 commits into from
Oct 17, 2024
Merged

{Bp-sim] multiple backports to fix sim #14380

merged 6 commits into from
Oct 17, 2024

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jerpelea
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Summary

multiple backports
#13728
#13731
#13734
#13753
#13777

Impact

Release
fix issue #13830

Testing

CI & local test

jerpelea and others added 6 commits October 16, 2024 10:31
@jerpelea
Revert "sim: fix context-switch when do wdog callback()"
4a4ebcc 
This reverts commit a3568af.
@hujun260 @jerpelea
sim: add NXSYMBOLS pthread_gettid_np pthread_self
d15d8f5 
reason:
enable sim:smp can boot

This commit fixes the regression from apache#12561

Signed-off-by: hujun5 <[email protected]>
@hujun260 @jerpelea
sched: replace sync pause with async pause for setpriority
e501f2b 
reason:
In the kernel, we are planning to remove all occurrences of up_cpu_pause as one of the steps to
simplify the implementation of critical sections. The goal is to enable spin_lock_irqsave to encapsulate critical sections,
thereby facilitating the replacement of critical sections(big lock) with smaller spin_lock_irqsave(small lock)

Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic
-machine virt,virtualization=on,gic-version=3
-net none -chardev stdio,id=con,mux=on -serial chardev:con
-mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <[email protected]>
@hujun260 @jerpelea
sched: replace sync pause with async pause for nxsched_suspend
e44368d 
reason:
In the kernel, we are planning to remove all occurrences of up_cpu_pause as one of the steps to
simplify the implementation of critical sections. The goal is to enable spin_lock_irqsave to encapsulate critical sections,
thereby facilitating the replacement of critical sections(big lock) with smaller spin_lock_irqsave(small lock)

Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic
-machine virt,virtualization=on,gic-version=3
-net none -chardev stdio,id=con,mux=on -serial chardev:con
-mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <[email protected]>
@zyfeier @jerpelea
sched: Disable the scheduling when send SIGCHLD signal
e6a8fa8 
Disable the scheduling to prevent other tasks from being
deleted after they are awakened

Signed-off-by: zhangyuan29 <[email protected]>
@hujun260 @jerpelea
sched: replace sync pause with async pause for nxtask_terminate
7e429b3 
reason:
In the kernel, we are planning to remove all occurrences of up_cpu_pause as one of the steps to
simplify the implementation of critical sections. The goal is to enable spin_lock_irqsave to encapsulate critical sections,
thereby facilitating the replacement of critical sections(big lock) with smaller spin_lock_irqsave(small lock)

Signed-off-by: hujun5 <[email protected]>
@github-actions github-actions bot added Arch: arm Issues related to ARM (32-bit) architecture Arch: arm64 Issues related to ARM64 (64-bit) architecture Arch: avr Issues related to all AVR(8-bit or 32-bit) architectures Arch: hc Issues related to HC architecture Arch: mips Issues related to the MIPS architecture Arch: openrisc Issues related to the OpenRISC architecture Arch: renesas Issues related to the Renesas chips Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Arch: simulator Issues related to the SIMulator Arch: sparc Issues related to the SPARC architecture Arch: tricore Issues related to the TriCore architecture from Infineon Arch: x86 Issues related to the x86 architecture Arch: x86_64 Issues related to the x86_64 architecture Arch: xtensa Issues related to the Xtensa architecture Arch: z16 Issues related to the Z16 architecture Arch: z80 Issues related to the Z80 architecture Area: OS Components OS Components issues Size: M The size of the change in this PR is medium labels Oct 17, 2024
@jerpelea jerpelea mentioned this pull request Oct 17, 2024
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@nuttxpr
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nuttxpr commented Oct 17, 2024

[Experimental Bot, please feedback here]

The provided PR description lacks some important details to fully meet the NuttX requirements.

Here's a breakdown:

Summary:

  • Insufficient: Listing multiple PRs doesn't explain what changes are included. Each PR should have its own, separate description detailing the specific change it implements.
  • Unclear: Mentioning "multiple backports" isn't descriptive enough. Specify which changes are backported and from where.
  • Missing: While a related issue is linked, a brief explanation of the issue and how the PR addresses it is missing.

Impact:

  • Too vague: Simply stating "Release" and "fix issue" isn't helpful. Explain how the changes impact users, build processes, hardware, etc.
  • Missing details: The impact section requires a YES/NO response for each category. If YES, a description is mandatory. For example, if the fix impacts specific architectures or boards, those should be listed.

Testing:

  • Insufficient: "CI & local test" isn't detailed enough.
  • Missing information:
    • List the specific build hosts used (OS, CPU, compiler versions).
    • Specify the target architectures and boards used for testing.
    • Provide snippets of the relevant log output before and after the changes, highlighting the improvements.

Recommendation:

The PR description needs significant revisions to meet NuttX standards. Provide detailed information for each backported change, clearly outline the impact across all categories, and include specific testing details for proper review.

@raiden00pl raiden00pl merged commit 33e3023 into apache:releases/12.7 Oct 17, 2024
29 checks passed
@jerpelea jerpelea deleted the bp-13753 branch October 17, 2024 10:54
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Arch: arm Issues related to ARM (32-bit) architecture Arch: arm64 Issues related to ARM64 (64-bit) architecture Arch: avr Issues related to all AVR(8-bit or 32-bit) architectures Arch: hc Issues related to HC architecture Arch: mips Issues related to the MIPS architecture Arch: openrisc Issues related to the OpenRISC architecture Arch: renesas Issues related to the Renesas chips Arch: risc-v Issues related to the RISC-V (32-bit or 64-bit) architecture Arch: simulator Issues related to the SIMulator Arch: sparc Issues related to the SPARC architecture Arch: tricore Issues related to the TriCore architecture from Infineon Arch: x86 Issues related to the x86 architecture Arch: x86_64 Issues related to the x86_64 architecture Arch: xtensa Issues related to the Xtensa architecture Arch: z16 Issues related to the Z16 architecture Arch: z80 Issues related to the Z80 architecture Area: OS Components OS Components issues Size: M The size of the change in this PR is medium
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5 participants
@jerpelea @nuttxpr @raiden00pl @hujun260 @zyfeier