H5 with NSH support for Nucleo-H563ZI.

Made fixes to issues from CI. Nxstyle and defconfig syntax.

This is a combination of 6 commits.

Adding STM32H5 arch files. With comments addressed.

Created stm32h5 directory to add support for the H5 chip, and used a Nucleo-H563ZI dev board during development. The goal was to get a working nutshell through the STLink connector on the board.

Remove board/docs changes for PR update.

Squash commits into one for PR guideline conformity.

trying to fix build issues

Fix format from review

Nucleo-H563ZI support for NSH.

Created stm32h5 directory to add support for the H5 chip, and used a Nucleo-H563ZI dev board during development. The goal was to get a working nutshell through the STLink connector on the board.

Fix switch default case placement.

NXstyle fixes

Renaming files

rename stm32h5_gpio.x files

rename h5 hsi48 files

Rename h5 idle file

rename stm32h5_irq.c

Rename some rcc functions and stm32h5_rcc.c

rename stm32h5_rcc.h

Rename stm32h5_pwr.x

lowputc renames

timerisr renames

uart renamed

rename serial file

rename start

Turn off the defines that enable DMA on serial

remove DMA Kconfig options

Remove H5 documentation. Will add in a future PR.

Fix styling and defconfig improper syntax.

arch/arm/src/stm32h5/Make.defs

@@ -26,3 +26,26 @@ HEAD_ASRC =
 # Common ARM and Cortex-M4 files (copied from stm32/Make.defs)
 
 include armv8-m/Make.defs
+
+# Required STM32H5 files
+
+CHIP_ASRCS  =
+CHIP_CSRCS  = stm32_gpio.c
+CHIP_CSRCS += stm32_irq.c stm32_lowputc.c stm32_rcc.c
+CHIP_CSRCS += stm32_serial.c stm32_start.c
+CHIP_CSRCS += stm32_pwr.c stm32_timerisr.c
+CHIP_CSRCS += stm32_lse.c stm32_lsi.c
+
+ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
+CHIP_CSRCS += stm32_idle.c
+endif
+
+ifeq ($(CONFIG_TIMER),y)
+CHIP_CSRCS += stm32h5_tim_lowerhalf.c
+endif
+
+# Required chip type specific files
+
+ifeq ($(CONFIG_STM32H5_STM32H5XXXX),y)
+CHIP_CSRCS += stm32h5xx_rcc.c
+endif

arch/arm/src/stm32h5/stm32.h

@@ -36,5 +36,10 @@
 
 #include "chip.h"
 #include "stm32_flash.h"
-
+#include "stm32_dbgmcu.h"
+#include "stm32_gpio.h"
+#include "stm32_pwr.h"
+#include "stm32_rcc.h"
+#include "stm32_uart.h"
+#include "stm32_lowputc.h"
 #endif /* __ARCH_ARM_SRC_STM32H5_STM32_H */

arch/arm/src/stm32h5/stm32_dbgmcu.h

@@ -0,0 +1,38 @@
+/****************************************************************************
+ * arch/arm/src/stm32h5/stm32_dbgmcu.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STM32H5_STM32_DBGMCU_H
+#define __ARCH_ARM_SRC_STM32H5_STM32_DBGMCU_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "chip.h"
+
+#if defined(CONFIG_STM32H5_STM32H5XXXX)
+#  include "hardware/stm32_dbgmcu.h"
+#else
+#  error "Unsupported STM32H5 chip"
+#endif
+
+#endif /* __ARCH_ARM_SRC_STM32H5_STM32_DBGMCU_H */