Optionally suppress output from display system tasks in read_verilog

frontends/ast/ast.cc

@@ -45,7 +45,7 @@ namespace AST {
 
 // instantiate global variables (private API)
 namespace AST_INTERNAL {
- bool flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches, flag_nomeminit;
+ bool flag_nodisplay, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches, flag_nomeminit;
  bool flag_nomem2reg, flag_mem2reg, flag_noblackbox, flag_lib, flag_nowb, flag_noopt, flag_icells, flag_pwires, flag_autowire;
  AstNode *current_ast, *current_ast_mod;
  std::map<std::string, AstNode*> current_scope;
@@ -1320,11 +1320,12 @@ static void rename_in_package_stmts(AstNode *pkg)
 }
 
 // create AstModule instances for all modules in the AST tree and add them to 'design'
-void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump_ast2, bool no_dump_ptr, bool dump_vlog1, bool dump_vlog2, bool dump_rtlil,
+void AST::process(RTLIL::Design *design, AstNode *ast, bool nodisplay, bool dump_ast1, bool dump_ast2, bool no_dump_ptr, bool dump_vlog1, bool dump_vlog2, bool dump_rtlil,
  bool nolatches, bool nomeminit, bool nomem2reg, bool mem2reg, bool noblackbox, bool lib, bool nowb, bool noopt, bool icells, bool pwires, bool nooverwrite, bool overwrite, bool defer, bool autowire)
 {
  current_ast = ast;
  current_ast_mod = nullptr;
+ flag_nodisplay = nodisplay;
  flag_dump_ast1 = dump_ast1;
  flag_dump_ast2 = dump_ast2;
  flag_no_dump_ptr = no_dump_ptr;

frontends/ast/ast.h

@@ -376,7 +376,7 @@ namespace AST
  };
 
  // process an AST tree (ast must point to an AST_DESIGN node) and generate RTLIL code
- void process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump_ast2, bool no_dump_ptr, bool dump_vlog1, bool dump_vlog2, bool dump_rtlil, bool nolatches, bool nomeminit,
+ void process(RTLIL::Design *design, AstNode *ast, bool nodisplay, bool dump_ast1, bool dump_ast2, bool no_dump_ptr, bool dump_vlog1, bool dump_vlog2, bool dump_rtlil, bool nolatches, bool nomeminit,
  bool nomem2reg, bool mem2reg, bool noblackbox, bool lib, bool nowb, bool noopt, bool icells, bool pwires, bool nooverwrite, bool overwrite, bool defer, bool autowire);
 
  // parametric modules are supported directly by the AST library
@@ -432,7 +432,7 @@ namespace AST
 namespace AST_INTERNAL
 {
  // internal state variables
- extern bool flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_rtlil, flag_nolatches, flag_nomeminit;
+ extern bool flag_nodisplay, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_rtlil, flag_nolatches, flag_nomeminit;
  extern bool flag_nomem2reg, flag_mem2reg, flag_lib, flag_noopt, flag_icells, flag_pwires, flag_autowire;
  extern AST::AstNode *current_ast, *current_ast_mod;
  extern std::map<std::string, AST::AstNode*> current_scope;

frontends/ast/simplify.cc

@@ -1058,33 +1058,30 @@ bool AstNode::simplify(bool const_fold, int stage, int width_hint, bool sign_hin
  {
  if (!current_always) {
  log_file_warning(filename, location.first_line, "System task `%s' outside initial or always block is unsupported.\n", str.c_str());
- } else if (current_always->type == AST_INITIAL) {
- int default_base = 10;
- if (str.back() == 'b')
- default_base = 2;
- else if (str.back() == 'o')
- default_base = 8;
- else if (str.back() == 'h')
- default_base = 16;
-
- // when $display()/$write() functions are used in an initial block, print them during synthesis
- Fmt fmt = processFormat(stage, /*sformat_like=*/false, default_base, /*first_arg_at=*/0, /*required=*/false);
- if (str.substr(0, 8) == "$display")
- fmt.append_string("\n");
- log("%s", fmt.render().c_str());
- for (auto node : children)
- while (node->simplify(true, stage, -1, false)) {}
- return false;
+ delete_children();
+ str = std::string();
  } else {
- // when $display()/$write() functions are used in an always block, simplify the expressions and
- // convert them to a special cell later in genrtlil
+ if (current_always->type == AST_INITIAL && !flag_nodisplay && stage == 2) {
+ int default_base = 10;
+ if (str.back() == 'b')
+ default_base = 2;
+ else if (str.back() == 'o')
+ default_base = 8;
+ else if (str.back() == 'h')
+ default_base = 16;
+
+ // when $display()/$write() functions are used in an initial block, print them during synthesis
+ Fmt fmt = processFormat(stage, /*sformat_like=*/false, default_base, /*first_arg_at=*/0, /*required=*/false);
+ if (str.substr(0, 8) == "$display")
+ fmt.append_string("\n");
+ log("%s", fmt.render().c_str());
+ }
+
+ // simplify the expressions and convert them to a special cell later in genrtlil
  for (auto node : children)
  while (node->simplify(true, stage, -1, false)) {}
  return false;
  }
-
- delete_children();
- str = std::string();
  }
 
  // activate const folding if this is anything that must be evaluated statically (ranges, parameters, attributes, etc.)

frontends/verilog/verilog_frontend.cc

@@ -100,6 +100,10 @@ struct VerilogFrontend : public Frontend {
  log(" -assert-assumes\n");
  log(" treat all assume() statements like assert() statements\n");
  log("\n");
+ log(" -nodisplay\n");
+ log(" suppress output from display system tasks ($display et. al).\n");
+ log(" This does not affect the output from a later 'sim' command.\n");
+ log("\n");
  log(" -debug\n");
  log(" alias for -dump_ast1 -dump_ast2 -dump_vlog1 -dump_vlog2 -yydebug\n");
  log("\n");
@@ -235,6 +239,7 @@ struct VerilogFrontend : public Frontend {
  }
  void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) override
  {
+ bool flag_nodisplay = false;
  bool flag_dump_ast1 = false;
  bool flag_dump_ast2 = false;
  bool flag_no_dump_ptr = false;
@@ -308,6 +313,10 @@ struct VerilogFrontend : public Frontend {
  assert_assumes_mode = true;
  continue;
  }
+ if (arg == "-nodisplay") {
+ flag_nodisplay = true;
+ continue;
+ }
  if (arg == "-debug") {
  flag_dump_ast1 = true;
  flag_dump_ast2 = true;
@@ -510,7 +519,7 @@ struct VerilogFrontend : public Frontend {
  if (flag_nodpi)
  error_on_dpi_function(current_ast);
 
- AST::process(design, current_ast, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches,
+ AST::process(design, current_ast, flag_nodisplay, flag_dump_ast1, flag_dump_ast2, flag_no_dump_ptr, flag_dump_vlog1, flag_dump_vlog2, flag_dump_rtlil, flag_nolatches,
  flag_nomeminit, flag_nomem2reg, flag_mem2reg, flag_noblackbox, lib_mode, flag_nowb, flag_noopt, flag_icells, flag_pwires, flag_nooverwrite, flag_overwrite, flag_defer, default_nettype_wire);