gowin: Himbaechel. Extend clock router #1208
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Now the clock router can place a buffer into the specified network, which divides the network into two parts: from the source to the buffer, routing occurs through any available PIPs, and after the buffer to the sink, only through a dedicated global clock network. This is made specifically for the Tangnano20k where the external oscillator is soldered to a regular non-clock pin. But it can be used for other purposes, you just need to remember that the recipient must be a CLK input or output pin. The port/network to set the buffer to is specified in the .CST file: CLOCK_LOC "name" BUFG; Signed-off-by: YRabbit <[email protected]>
gatecat
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Sep 7, 2023
himbaechel/uarch/gowin/pack.cc
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| ctx->createCell(buf_name, id_BUFG); | ||
| CellInfo *buf_ci = ctx->cells.at(buf_name).get(); | ||
| buf_ci->addInput(id_I); | ||
| auto s_net = std::make_unique<NetInfo>(ctx->idf("$PACKER_BUF_%s", net.first.c_str(ctx))); |
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can you use ctx->createNet here?
Signed-off-by: YRabbit <[email protected]>
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Now the clock router can place a buffer into the specified network, which divides the network into two parts: from the source to the buffer, routing occurs through any available PIPs, and after the buffer to the sink, only through a dedicated global clock network.
This is made specifically for the Tangnano20k where the external oscillator is soldered to a regular non-clock pin. But it can be used for other purposes, you just need to remember that the recipient must be a CLK input or output pin.
The port/network to set the buffer to is specified in the .CST file:
CLOCK_LOC "name" BUFG;