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Linear transfer without transformation but with repeat (#1882)
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# | ||
# This file is licensed under the Apache License v2.0 with LLVM Exceptions. | ||
# See https://llvm.org/LICENSE.txt for license information. | ||
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
# | ||
# (c) Copyright 2024 AMD Inc. | ||
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# REQUIRES: ryzen_ai, valid_xchess_license | ||
# | ||
# RUN: %python %S/aie2.py > ./aie2.mlir | ||
# RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-npu --aie-generate-xclbin --no-compile-host --xclbin-name=final.xclbin --npu-insts-name=insts.txt ./aie2.mlir | ||
# RUN: clang %S/test.cpp -o test.exe -std=c++17 -Wall %xrt_flags -lrt -lstdc++ %test_utils_flags | ||
# RUN: %run_on_npu ./test.exe | FileCheck %s | ||
# CHECK: PASS! | ||
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import numpy as np | ||
from aie.extras.context import mlir_mod_ctx | ||
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from aie.dialects.aie import * | ||
from aie.dialects.aiex import * | ||
from aie.helpers.dialects.ext.scf import _for as range_ | ||
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dtype = np.int16 | ||
repeat_count = 3 | ||
a_len = 2048 | ||
c_len = a_len * repeat_count | ||
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def design(): | ||
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with mlir_mod_ctx() as ctx: | ||
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@device(AIEDevice.npu1_4col) | ||
def device_body(): | ||
a_ty = np.ndarray[(a_len,), np.dtype[dtype]] | ||
c_ty = np.ndarray[(c_len,), np.dtype[dtype]] | ||
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ShimTile = tile(0, 0) | ||
ComputeTile = tile(0, 2) | ||
fifo_a = object_fifo("fifo_a", ShimTile, ComputeTile, 2, a_ty) | ||
fifo_c = object_fifo("fifo_c", ComputeTile, ShimTile, 2, a_ty) | ||
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# Core | ||
@core(ComputeTile) | ||
def core_body(): | ||
for _ in range_(0, 0xFFFFFFFF): | ||
for i in range_(repeat_count): | ||
elem_c = fifo_c.acquire(ObjectFifoPort.Produce, 1) | ||
elem_a = fifo_a.acquire(ObjectFifoPort.Consume, 1) | ||
for i in range_(a_len): | ||
elem_c[i] = elem_a[i] | ||
fifo_a.release(ObjectFifoPort.Consume, 1) | ||
fifo_c.release(ObjectFifoPort.Produce, 1) | ||
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# To/from AIE-array data movement | ||
@runtime_sequence(a_ty, a_ty, c_ty) | ||
def sequence(A, _B, C): | ||
npu_dma_memcpy_nd( | ||
metadata=fifo_a, | ||
bd_id=1, | ||
mem=A, | ||
sizes=[repeat_count, 1, 1, a_len], | ||
strides=[0, 0, 0, 1], | ||
) | ||
npu_dma_memcpy_nd( | ||
metadata=fifo_c, | ||
bd_id=0, | ||
mem=C, | ||
sizes=[1, 1, 1, c_len], | ||
strides=[0, 0, 0, 1], | ||
) | ||
dma_wait(fifo_c) | ||
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print(ctx.module) | ||
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design() |
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// This file is licensed under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
// (c) Copyright 2024 AMD Inc. | ||
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#include <cassert> | ||
#include <cstring> | ||
#include <fstream> | ||
#include <iomanip> | ||
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#include "xrt/xrt_bo.h" | ||
#include "xrt/xrt_device.h" | ||
#include "xrt/xrt_kernel.h" | ||
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#include "test_utils.h" | ||
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#ifndef XCLBIN | ||
#define XCLBIN "final.xclbin" | ||
#endif | ||
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#ifndef INSTS_TXT | ||
#define INSTS_TXT "insts.txt" | ||
#endif | ||
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#ifndef KERNEL_NAME | ||
#define KERNEL_NAME "MLIR_AIE" | ||
#endif | ||
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#define DTYPE int16_t | ||
#define A_DATATYPE DTYPE | ||
#define C_DATATYPE DTYPE | ||
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#define A_LEN 2048 | ||
#define REPEAT_COUNT 3 | ||
#define C_LEN (A_LEN * REPEAT_COUNT) | ||
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#define A_SIZE (A_LEN * sizeof(A_DATATYPE)) // in bytes | ||
#define B_SIZE A_SIZE // in bytes | ||
#define C_SIZE (C_LEN * sizeof(C_DATATYPE)) // in bytes | ||
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int main(int argc, const char *argv[]) { | ||
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std::vector<uint32_t> instr_v = test_utils::load_instr_sequence(INSTS_TXT); | ||
assert(instr_v.size() > 0); | ||
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// Get a device handle | ||
unsigned int device_index = 0; | ||
xrt::device device = xrt::device(device_index); | ||
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// Load the xclbin | ||
xrt::xclbin xclbin = xrt::xclbin(XCLBIN); | ||
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// Get the kernel from the xclbin | ||
std::vector<xrt::xclbin::kernel> xkernels = xclbin.get_kernels(); | ||
xrt::xclbin::kernel xkernel = *std::find_if( | ||
xkernels.begin(), xkernels.end(), [](xrt::xclbin::kernel &k) { | ||
return k.get_name().rfind(KERNEL_NAME, 0) == 0; | ||
}); | ||
std::string kernel_name = xkernel.get_name(); | ||
assert(strcmp(kernel_name.c_str(), KERNEL_NAME) == 0); | ||
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device.register_xclbin(xclbin); | ||
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// get a hardware context | ||
xrt::hw_context context(device, xclbin.get_uuid()); | ||
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// get a kernel handle | ||
auto kernel = xrt::kernel(context, kernel_name); | ||
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auto bo_instr = xrt::bo(device, instr_v.size() * sizeof(int), | ||
XCL_BO_FLAGS_CACHEABLE, kernel.group_id(1)); | ||
auto bo_a = | ||
xrt::bo(device, A_SIZE, XRT_BO_FLAGS_HOST_ONLY, kernel.group_id(3)); | ||
auto bo_b = | ||
xrt::bo(device, B_SIZE, XRT_BO_FLAGS_HOST_ONLY, kernel.group_id(4)); | ||
auto bo_c = | ||
xrt::bo(device, C_SIZE, XRT_BO_FLAGS_HOST_ONLY, kernel.group_id(5)); | ||
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A_DATATYPE *buf_a = bo_a.map<A_DATATYPE *>(); | ||
for (int i = 0; i < A_SIZE / sizeof(buf_a[0]); i++) { | ||
buf_a[i] = 2 * i; // even | ||
} | ||
C_DATATYPE *buf_c = bo_c.map<C_DATATYPE *>(); | ||
memset(buf_c, 0, C_SIZE); | ||
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// Instruction buffer for DMA configuration | ||
void *bufInstr = bo_instr.map<void *>(); | ||
memcpy(bufInstr, instr_v.data(), instr_v.size() * sizeof(int)); | ||
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bo_instr.sync(XCL_BO_SYNC_BO_TO_DEVICE); | ||
bo_a.sync(XCL_BO_SYNC_BO_TO_DEVICE); | ||
bo_b.sync(XCL_BO_SYNC_BO_TO_DEVICE); | ||
bo_c.sync(XCL_BO_SYNC_BO_TO_DEVICE); | ||
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unsigned int opcode = 3; | ||
auto run = kernel(opcode, bo_instr, instr_v.size(), bo_a, bo_b, bo_c); | ||
ert_cmd_state r = run.wait(); | ||
if (r != ERT_CMD_STATE_COMPLETED) { | ||
std::cout << "Kernel did not complete. Returned status: " << r << "\n"; | ||
return 1; | ||
} | ||
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bo_c.sync(XCL_BO_SYNC_BO_FROM_DEVICE); | ||
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int errors = 0; | ||
for (int i = 0; i < C_SIZE / sizeof(buf_c[0]); i++) { | ||
std::cout << std::setw(4) << (long)buf_c[i] << " "; | ||
if (buf_c[i] != buf_a[i % A_LEN]) { | ||
errors += 1; | ||
} | ||
} | ||
std::cout << std::endl; | ||
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if (errors == 0) { | ||
std::cout << "PASS!" << std::endl; | ||
} else { | ||
std::cout << "FAIL." << std::endl; | ||
} | ||
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return 0; | ||
} |