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Merge pull request #660 from Xilinx/2022.2.3
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2022.2.3 staging branch
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clavin-xlnx authored May 3, 2023
2 parents be53358 + 08cab6c commit 368002d
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Showing 8 changed files with 67 additions and 9 deletions.
4 changes: 2 additions & 2 deletions .classpath
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Expand Up @@ -33,9 +33,9 @@
<classpathentry kind="lib" path="jars/kryo-5.2.1.jar"/>
<classpathentry kind="lib" path="jars/minlog-1.3.1.jar"/>
<classpathentry kind="lib" path="jars/jython-standalone-2.7.2.jar"/>
<classpathentry kind="lib" path="jars/rapidwright-api-lib-2022.2.2.jar">
<classpathentry kind="lib" path="jars/rapidwright-api-lib-2022.2.3.jar">
<attributes>
<attribute name="javadoc_location" value="jar:platform:/resource/RapidWright/jars/rapidwright-api-lib-2022.2.2-javadoc.jar!/"/>
<attribute name="javadoc_location" value="jar:platform:/resource/RapidWright/jars/rapidwright-api-lib-2022.2.3-javadoc.jar!/"/>
</attributes>
</classpathentry>
<classpathentry kind="lib" path="jars/jgrapht-core-1.3.0.jar"/>
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2 changes: 1 addition & 1 deletion .github/workflows/build.yml
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Expand Up @@ -5,7 +5,7 @@ on:
pull_request:

env:
RAPIDWRIGHT_VERSION: v2022.2.2-beta
RAPIDWRIGHT_VERSION: v2022.2.3-beta

jobs:
build:
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14 changes: 14 additions & 0 deletions RELEASE_NOTES.TXT
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@@ -1,3 +1,17 @@
============= RapidWright 2022.2.3-beta released on 2023-05-03 ================
Notes:
- Adds preliminary support for Zstandard compression. Uses it in device cache file generation. Next release will use it for all data files.
- Fixes an issue with missing Versal Premium families unisim data (#631)
- Adds an option to the Interchange device model writer to exclude routing info. to enable placement of the largest devices (#658)
- Fixes an issue in the PBlockGenerator parser (#633)
- Resolves an issue where collapsed macro ports' parent reference was not set properly (#654)
- EDIFNetlist.getIOStandard() to inherit IOStandard from EDIFNet (#646)

- API Additions:
- com.xilinx.rapidwright.design.Design "public static boolean readEdifAndXdefInParallel()"
- com.xilinx.rapidwright.design.Design "public static void setReadEdifAndXdefInParallel(boolean readEdifAndXdefInParallel)"


============= RapidWright 2022.2.2-beta released on 2023-03-10 ================
Notes:
- Includes new API to ensure all downloaded/generated dependant files are present in RapidWright install (#613)
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2 changes: 1 addition & 1 deletion src/com/xilinx/rapidwright/util/DataVersions.java
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Expand Up @@ -326,6 +326,6 @@ public class DataVersions {
dataVersionMap.put("data/devices/zynquplusrfsoc/xqzu49dr_db.dat", new Pair<>("xqzu49dr-db-dat", "df942c4f499805206466b4d89813c235"));
dataVersionMap.put("data/partdump.csv", new Pair<>("partdump-csv", "f0417647e80cb1de13c65f0a8973df17"));
dataVersionMap.put("data/parts.db", new Pair<>("parts-db", "b728320ae4d94f28402e03343363b6e8"));
dataVersionMap.put("data/unisim_data.dat", new Pair<>("unisim-data-dat", "70faaac529fd20e64a0acaa4827a885e"));
dataVersionMap.put("data/unisim_data.dat", new Pair<>("unisim-data-dat", "10d1c6e79b176e329019d7bc752ca301"));
}
}
2 changes: 1 addition & 1 deletion test/RapidWrightDCP
Submodule RapidWrightDCP updated 1 files
+ bug635.dcp
11 changes: 11 additions & 0 deletions test/src/com/xilinx/rapidwright/design/TestNet.java
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Expand Up @@ -176,4 +176,15 @@ public void testGetLogicalHierNetDetachedNetlist() {
Assertions.assertNull(net.getLogicalHierNet());
}
}

@Test
public void testCreatePinInvalid() {
Design d = new Design("top", "xc7a200t");
SiteInst si = d.createSiteInst(d.getDevice().getSite("RAMB36_X8Y14"));
RuntimeException ex = Assertions.assertThrows(RuntimeException.class, () ->
d.getGndNet().createPin("RSTRAMARSTRAML", si)
);
Assertions.assertEquals("ERROR: Couldn't find pin RSTRAMARSTRAML on site type RAMBFIFO36E1",
ex.getMessage());
}
}
11 changes: 11 additions & 0 deletions test/src/com/xilinx/rapidwright/design/TestSitePinInst.java
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Expand Up @@ -24,6 +24,8 @@
package com.xilinx.rapidwright.design;

import com.xilinx.rapidwright.device.Device;
import com.xilinx.rapidwright.router.RouteNode;
import com.xilinx.rapidwright.support.RapidWrightDCP;
import org.junit.jupiter.api.Assertions;
import org.junit.jupiter.api.Test;

Expand All @@ -44,4 +46,13 @@ public void testSetSameSiteInst() {

Assertions.assertEquals(1, net0.getPIPs().size());
}

@Test
public void testGetRouteNode() {
Design d = RapidWrightDCP.loadDCP("bug635.dcp");
SiteInst si = d.getSiteInstFromSiteName("RAMB36_X8Y14");
SitePinInst spi = si.getSitePinInst("RSTRAMARSTRAML");
RouteNode rn = spi.getRouteNode();
Assertions.assertNotEquals(-1, rn.getWire());
}
}
30 changes: 26 additions & 4 deletions test/src/com/xilinx/rapidwright/device/TestUnisimPlacements.java
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Expand Up @@ -22,21 +22,43 @@

package com.xilinx.rapidwright.device;

import java.util.HashSet;
import java.util.Set;

import org.junit.jupiter.api.Assertions;
import org.junit.jupiter.params.ParameterizedTest;
import org.junit.jupiter.params.provider.ValueSource;
import org.junit.jupiter.params.provider.EnumSource;

import com.xilinx.rapidwright.design.Cell;
import com.xilinx.rapidwright.design.Design;
import com.xilinx.rapidwright.edif.EDIFCell;

public class TestUnisimPlacements {

/**
* Set of unsupported unisim families (for now) in 2022.2.3. Hopefully will add
* support in 2023.1.0.
*/
private static Set<FamilyType> unsupportedTypes = null;

static {
unsupportedTypes = new HashSet<>();
unsupportedTypes.add(FamilyType.ZYNQUPLUSRFSOC);
unsupportedTypes.add(FamilyType.QVIRTEXUPLUSHBM);
unsupportedTypes.add(FamilyType.QZYNQUPLUSRFSOC);
unsupportedTypes.add(FamilyType.VIRTEXUPLUSHBMES1);
unsupportedTypes.add(FamilyType.VIRTEXUPLUSHBM);
unsupportedTypes.add(FamilyType.VIRTEXUPLUS58G);
}

@ParameterizedTest
@ValueSource(strings = { "VERSALPREMIUM", "ARTIX7", "ZYNQ", "ZYNQUPLUS", "VIRTEXU" })
public void testUnisimPlacements(String familyType) {
@EnumSource(FamilyType.class)
public void testUnisimPlacements(FamilyType familyType) {
if (unsupportedTypes.contains(familyType)) {
return;
}
for (Part part : PartNameTools.getParts()) {
if (!part.getFamily().toString().equals(familyType))
if (part.getFamily() != familyType)
continue;
Design des = new Design("top", part.getName());
EDIFCell cell = Design.getPrimitivesLibrary(des.getDevice().getName()).getCell("FDRE");
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