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Galapagos is a heterogeneous hardware stack for deploying multi-FPGA and CPU libraries. This stack at the lowest level abstracts away these devices to appear as streaming devices, and at higher levels create clusters and communication layers for these heterogeneous devices to communicate. We provide abstractions through several layers of a hardware stack.
The stack can be seen below:
Similar to the OSDI networking stack each layer of abstraction provides APIs for the layer above. Having multiple layers rather than one large monolithic layer provides users the flexibility to choose their layer of abstraction. Furthermore allows users to modify layers to their specific domain (as an example we have a Machine Learning domain specific layer).
This is the lowest level of abstraction. This refers to the physical hardware and how it's connected. This includes the Specific CPUs we have (ARM, x86), FPGA boards (Alphadata 8v3, Sidewinder) and how they are connected to other devices (L2 Network, L1 Network, PCIe, AXI).
Below is an example of two different physical hardware setups we have within Galapagos:
This highlights that that we can put our layers of abstraction on different Physical Hardware. More details on the physical hardware can be found here.
This layer of abstraction refers to abstracting all devices (different types of FPGAs and CPUs) to a streaming engine. The Galapagos streaming protocol is the AXI stream protocol. Once a device is abstracted into a streaming engine we can map any streaming kernel to any of these devices (introducing functional portability). This is illustrated in the figure below:
More details on the FPGA Hypervisor can be found here.
The middleware is responsible for taking a collection of AXI-stream kernels and distributing it across different devices using a mapping directive from the user. The user is returned a cluster of distributed kernels on multiple different nodes where the implementation of these nodes can be different FPGAs or CPUs. This is illustrated in the figure below.
Kernels can communicate to any other kernel within the cluster, both on-chip (on same node) and off-chip (on different nodes). The middleware provides the address translation to convert AXI-stream packets into network packets if the kernel destination is off-chip. Below is an example of three kernels logically all connected but partitioned across two FPGAs.
