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[DO NOT REVIEW] synthesis: ABC_AREA=0 now uses 'if -s' #2541
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Signed-off-by: Øyvind Harboe <[email protected]>
Signed-off-by: Øyvind Harboe <[email protected]>
@QuantamHD do you have any experience with abc retiming? Does it make sense to ask Alan? |
I do not, but it's a much less used feature of ABC. IMO retiming is a hard flow to use if you want to run verification on the final netlist since you don't have flop correspondence any more. It's rarely used in industry outside of Nvidia from what I've heard. |
The main motivation is to study megaboom further https://docs.boom-core.org/en/latest/sections/physical-realization.html |
By default Yosys does not pass flops to abc. So it's like not seeing the whole circuit at once. You should make sure the -dff flag is passed. |
@povik has to yosys team tried to use abc for retiming? |
Also, in exploration, retiming reduces investment requirements in exploratory RTL. Which is effectively the megaboom use-case. We mitigated the need for retiming of synchronous reset by using a false path in megaboom: no lessons to be learned there, so no value in investing in manual retiming. |
@QuantamHD FYI, the megaboom study, to see if OpenROAD can replicate 1000ps clock period at 28nm with ASAP7 has stalled out for now on retiming, macro placement and global placement. https://github.com/The-OpenROAD-Project/megaboom Enormous progress has been made, running times, macro placement, stability, CTS, bazel-orfs, to mention a few. |
@jeffng-or @maliberty FYI, experiment with abc retiming.
retime/results/asap7/BoomTile/1/1_1_yosys.v is below with this PR, so not enormously different in number of lines of code:
Just like the megaboom documentation states, the multiplier needs to be retimed: