Sdc pick algorithm

flow/Makefile

@@ -645,6 +645,8 @@ $(eval $(call do-step,2_1_floorplan,$(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_sy
 #-------------------------------------------------------------------------------
 $(eval $(call do-step,2_2_floorplan_io,$(RESULTS_DIR)/2_1_floorplan.odb $(IO_CONSTRAINTS),io_placement_random))
 
+$(eval $(call do-copy,2_floorplan,2_1_floorplan.sdc,,.sdc))
+
 # STEP 3: Macro Placement
 #-------------------------------------------------------------------------------
 $(eval $(call do-step,2_3_floorplan_macro,$(RESULTS_DIR)/2_2_floorplan_io.odb $(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc $(MACRO_PLACEMENT) $(MACRO_PLACEMENT_TCL),macro_place))

flow/scripts/floorplan.tcl

@@ -194,4 +194,4 @@ if { [env_var_exists_and_non_empty POST_FLOORPLAN_TCL] } {
 }
 
 write_db $::env(RESULTS_DIR)/2_1_floorplan.odb
-write_sdc -no_timestamp $::env(RESULTS_DIR)/2_floorplan.sdc
+write_sdc -no_timestamp $::env(RESULTS_DIR)/2_1_floorplan.sdc

flow/scripts/io_placement_random.tcl

@@ -2,7 +2,7 @@ source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables floorplan
 
 if {![env_var_equals IS_CHIP 1]} {
-  load_design 2_1_floorplan.odb 2_floorplan.sdc
+  load_design 2_1_floorplan.odb 2_1_floorplan.sdc
   lappend ::env(PLACE_PINS_ARGS) -random
   source $::env(SCRIPTS_DIR)/io_placement_util.tcl
   write_db $::env(RESULTS_DIR)/2_2_floorplan_io.odb

flow/scripts/macro_place.tcl

@@ -1,6 +1,6 @@
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables floorplan
-load_design 2_2_floorplan_io.odb 2_floorplan.sdc
+load_design 2_2_floorplan_io.odb 2_1_floorplan.sdc
 
 source $::env(SCRIPTS_DIR)/macro_place_util.tcl
 

flow/scripts/pdn.tcl

@@ -1,6 +1,6 @@
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables floorplan
-load_design 2_4_floorplan_tapcell.odb 2_floorplan.sdc
+load_design 2_4_floorplan_tapcell.odb 2_1_floorplan.sdc
 
 source $::env(PDN_TCL)
 pdngen

flow/scripts/tapcell.tcl

@@ -1,7 +1,7 @@
 source $::env(SCRIPTS_DIR)/load.tcl
 erase_non_stage_variables floorplan
 
-load_design 2_3_floorplan_macro.odb 2_floorplan.sdc
+load_design 2_3_floorplan_macro.odb 2_1_floorplan.sdc
 
 if {[env_var_exists_and_non_empty TAPCELL_TCL]} {
     source $::env(TAPCELL_TCL)

flow/scripts/util.tcl

@@ -46,24 +46,43 @@ proc recover_power {} {
   report_power
 }
 
+proc extract_stage {input_file} {
+  if {![regexp {/([0-9])_(([0-9])_)?} $input_file match num1 _ num2]} {
+    puts "ERROR: Could not determine design stage from $input_file"
+    exit 1
+  }
+  lappend number_groups $num1
+  if {$num2!=""} {
+      lappend number_groups $num2
+  } else {
+    lappend number_groups "0"
+  }
+}
+
 proc find_sdc_file {input_file} {
-    # Determine design stage (1 ... 6)
-    set input_pieces [split [file tail $input_file] "_"]
-    set design_stage [lindex $input_pieces 0]
-    if { [llength $input_pieces] == 3 } {
-      set start [expr $design_stage - 1]
-    } else {
-      set start $design_stage
-    }
-    # Read SDC, first try to find the most recent SDC file for the stage
-    set sdc_file ""
-    for {set s $start} {$s > 0} {incr s -1} {
-        set sdc_file [glob -nocomplain -directory $::env(RESULTS_DIR) -types f "${s}_\[A-Za-z\]*\.sdc"]
-        if {$sdc_file != ""} {
-            break
-        }
+  # canonicalize input file, sometimes it is called with an input
+  # file relative to $::env(RESULTS_DIR), other times with
+  # an absolute path
+  if { ![file exists $input_file] } {
+    set input_file [file join $::env(RESULTS_DIR) $input_file]
+  }
+  set input_file [file normalize $input_file]
+
+  set stage [extract_stage $input_file]
+  set design_stage [lindex $stage 0]
+  set sdc_file ""
+
+  set exact_sdc [string map {.odb .sdc} $input_file]
+  set sdc_files [glob -nocomplain -directory $::env(RESULTS_DIR) -types f "\[1-9+\]_\[1-9_A-Za-z\]*\.sdc"]
+  set sdc_files [lsort -decreasing -dictionary $sdc_files]
+  set sdc_files [lmap file $sdc_files {file normalize $file}]
+  foreach name $sdc_files {
+    if {[lindex [lsort -decreasing -dictionary [list $name $exact_sdc] ] 0] == $exact_sdc} {
+      set sdc_file $name
+      break
     }
-    return [list $design_stage $sdc_file]
+  }
+  return [list $design_stage $sdc_file]
 }
 
 proc env_var_equals {env_var value} {