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Merge pull request #33 from nakarlsson/master
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pass AL event mask to the interrupt worker thread instead of hard coding it
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nakarlsson authored Nov 7, 2017
2 parents 4dfb81e + 6bb5aa6 commit c05b787
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Showing 6 changed files with 37 additions and 17 deletions.
2 changes: 1 addition & 1 deletion CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} "${CMAKE_SOURCE_DIR}/cmake")
project (SOES)

set (SOES_VERSION_MAJOR 2)
set (SOES_VERSION_MINOR 0)
set (SOES_VERSION_MINOR 1)
set (SOES_VERSION_PATCH 0)

# Generate version numbers
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2 changes: 1 addition & 1 deletion README.md
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Expand Up @@ -12,7 +12,7 @@ SOES is an EtherCAT slave stack written in c. Its purpose is to learn and
to use. All users are invited to study the source to get an understanding
how an EtherCAT slave functions.

Features as of 2.0.0:
Features as of 2.1.0:
- Address offset based HAL for easy ESC read/write access via any
interface
- Mailbox with data link layer
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33 changes: 20 additions & 13 deletions applications/rtl_xmc4_irq/slave.c
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Expand Up @@ -156,7 +156,7 @@ void DIG_process (uint8_t flags)
CC_ATOMIC_SET(watchdog, ESCvar.watchdogcnt);
if(ESCvar.dcsync > 0)
{
CC_ATOMIC_ADD(ESCvar.synccounter,1);
CC_ATOMIC_ADD(ESCvar.synccounter, 1);
}
/* Set outputs */
cb_set_LEDgroup0();
Expand All @@ -174,7 +174,7 @@ void DIG_process (uint8_t flags)

if((CC_ATOMIC_GET(ESCvar.App.state) & APPSTATE_OUTPUT) > 0)
{
CC_ATOMIC_SUB(ESCvar.synccounter,1);
CC_ATOMIC_SUB(ESCvar.synccounter, 1);
}

if((ESCvar.dcsync > 0) &&
Expand Down Expand Up @@ -212,11 +212,11 @@ void DIG_process (uint8_t flags)
}

/**
* ISR function. It should be called from ISR for applications entirely driven by
* interrupts.
* Read and handle events for the EtherCAT state, status, mailbox and eeprom.
* Handler for SM change, SM0/1, AL CONTROL and EEPROM events, the application
* control what interrupts that should be served and re-activated with
* event mask argument
*/
void ecat_slv_isr (void)
void ecat_slv_worker (uint32_t event_mask)
{
do
{
Expand All @@ -239,15 +239,22 @@ void ecat_slv_isr (void)
(ESCvar.esc_hw_eep_handler)();
}

CC_ATOMIC_SET(ESCvar.ALevent,ESC_ALeventread());
CC_ATOMIC_SET(ESCvar.ALevent, ESC_ALeventread());

}while(ESCvar.ALevent & (ESCREG_ALEVENT_CONTROL | ESCREG_ALEVENT_SMCHANGE
| ESCREG_ALEVENT_SM0 | ESCREG_ALEVENT_SM1 | ESCREG_ALEVENT_EEP));
}while(ESCvar.ALevent & event_mask);

ESC_ALeventmaskwrite(ESC_ALeventmaskread()
| (ESCREG_ALEVENT_CONTROL | ESCREG_ALEVENT_SMCHANGE
| ESCREG_ALEVENT_SM0 | ESCREG_ALEVENT_SM1
| ESCREG_ALEVENT_EEP));
ESC_ALeventmaskwrite(ESC_ALeventmaskread() | event_mask);
}

/**
* ISR function. It should be called from ISR for applications entirely driven by
* interrupts.
* Read and handle events for the EtherCAT state, status, mailbox and eeprom.
*/
void ecat_slv_isr (void)
{
ecat_slv_worker(ESCREG_ALEVENT_CONTROL | ESCREG_ALEVENT_SMCHANGE
| ESCREG_ALEVENT_SM0 | ESCREG_ALEVENT_SM1 | ESCREG_ALEVENT_EEP);
}

/**
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12 changes: 11 additions & 1 deletion applications/rtl_xmc4_irq/slave.h
Original file line number Diff line number Diff line change
Expand Up @@ -37,11 +37,21 @@ void cb_post_write_variableRW(int subindex);
*/
void DIG_process (uint8_t flags);

/**
* Handler for SM change, SM0/1, AL CONTROL and EEPROM events, the application
* control what interrupts that should be served and re-activated with
* event mask argument
*
* @param[in] event_mask = Event mask for interrupts to serve and re-activate
* after served
*/
void ecat_slv_worker (uint32_t event_mask);

/**
* ISR for SM0/1, EEPROM and AL CONTROL events in a SM/DC
* synchronization application
*/
void ecat_slv_isr (void);
CC_DEPRECATED void ecat_slv_isr (void);

/**
* Poll SM0/1, EEPROM and AL CONTROL events in a SM/DC synchronization
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3 changes: 2 additions & 1 deletion soes/hal/rt-kernel-xmc4/esc_hw.c
Original file line number Diff line number Diff line change
Expand Up @@ -237,7 +237,8 @@ static void isr_run(void * arg)
while(1)
{
sem_wait(ecat_isr_sem);
ecat_slv_isr();
ecat_slv_worker(ESCREG_ALEVENT_CONTROL | ESCREG_ALEVENT_SMCHANGE
| ESCREG_ALEVENT_SM0 | ESCREG_ALEVENT_SM1 | ESCREG_ALEVENT_EEP);
}
}

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2 changes: 2 additions & 0 deletions soes/include/sys/gcc/cc.h
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Expand Up @@ -28,6 +28,8 @@ extern "C"
#define CC_ASSERT(exp) assert (exp)
#define CC_STATIC_ASSERT(exp) _Static_assert (exp, "")

#define CC_DEPRECATED __attribute__((deprecated))

#define CC_SWAP32(x) __builtin_bswap32 (x)
#define CC_SWAP16(x) ((uint16_t)(x) >> 8 | ((uint16_t)(x) & 0xFF) << 8)

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