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Execution flow
Juan Gonzalez-Gomez edited this page Mar 23, 2022
·
4 revisions
TODO
Let's follow the execution flow of icestudio. Supose that you have cloned the Icestudio repo. In order to launch it you run the nw passign the folder app
as an argument. All the source code of Icestudio is located inside the app
folder
./node_modules/nw/bin/nw app
You can find more information about the Node Web package on this link: NW.js documentation
After launching nw the file app/package.json
(manifest file) is read. The html file indicated in the property main
is open in the internal chromium nw browser: this file is app/index.html
. It is the main html entry point
- Default: Icestudio Default Collection
- IceK: Constants
- IceWires: Wires and Buses
- IceIO: FPGA IO-pins
- IceGates: Logic gates
- IceMux: Muxes and demuxes
- IceCoders: Binary Encoders and Decoders
- IceFF: Flip-Flops
- IceRegs: Registers
- IceSRegs: Shift Registers
- IceBoards: blocks and examples for the diferent FPGA boards
- IceComp: Comparators
- IceArith: Integer arithmetics
- IceCounter: Counters
- IceSignals: 1-bit signal managment
- IcePLL: PLLs
- IceLEDOscope: Measuring signals
- IceLEDs: Displaying on LEDs
- IceHearts: Timming signal generation
- IceInputs: 1-bit inputs
- IceRok: Block probes for Icestudio => Sigrok integration (with Pulseview GUI)
- IceMachines: Working with Machines (simple state machines with a standar interface)
- IceSerial: Serial Asynchronous communications
- IceMem: Working with Memories
- IceMeasure: Measuring cycles and time in your circuits, very easily
- IceStack: Working with stacks
- IceFlash: Read from spi serial flash memories
- IceBus: Accesing and sharing simple buses
- IceLCD: Components and controllers for LCDs
- IceUnary: Working with unary numbers
- IceCrystal: Drive displays from Open Source FPGAs
- ice-chips-verilog: IceChips is a library of all common discrete logic devices in Verilog
- ArithmeticBlocks: FPGA signed and unsigned integer operations, 16, 24 and 32 bits, + - * / sqrt min max compare etc.
- iceSynth: Audio synthesis
- icebreaker: Blocks and examples for the icebreaker OpenFPGA board
- Jedi: blocks of the FPGA Jedi hardware Academy
- LOVE-FPGA: Hardware elements and examples for the LOVE-FPGA project (Linking Of Virtual Electronics to FPGAs)
- Stdio: Standard Input-Output in different devices
- CT11: Ejemplos del cuaderno ténico 11: Señales del sistema y Medición con el LEDOscopio
- Generic: Icestudio Generic Collection
- Logic: Icestudio Logic Collection
- IceInterface: Serial, SPI, I2C... (TODO)
- IceK-TB: Tests for iceK
- IceWires-TB: Test for icewires
- IceIO-TB: Tests for iceIO
- iceGates-TB: Tests for gates
- iceCoders-TB: Tests for iceCoders
- IceFF-TB: Tests for iceFF
- IceRegs-TB: Tests for registers
- IceSregs-TB: Tests for shift registers
- Jedi-Test: Tests for the blocks on the Jedi Collection