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i#6354 test: Verify one CPU ID per stream with MAP_TO_RECORDED #6355

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i#6354 test: Verify one CPU ID per stream with MAP_TO_RECORDED #6355

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2416231
i#6354 test: Verify one CPU ID per stream with MAP_TO_RECORDED
prasun3 Oct 10, 2023
439e491
i#6354 test: Fixed build when HAS_ZIP is not defined
prasun3 Oct 10, 2023
48c8c55
Merge branch 'master' into i6354-multiple-cpu-ids-in-output-stream-wi…
prasun3 Oct 12, 2023
8e19465
i6354 test: removed traces with zero-inst trace
prasun3 Oct 12, 2023
27bb137
i6354 test: Added test trace
prasun3 Oct 12, 2023
d871fff
Merge branch 'master' into i6354-multiple-cpu-ids-in-output-stream-wi…
prasun3 Oct 16, 2023
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7 changes: 7 additions & 0 deletions clients/drcachesim/CMakeLists.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -391,6 +391,13 @@ if (X86 AND X64 AND ZIP_FOUND)
add_test(NAME tool.scheduler_launcher
COMMAND scheduler_launcher -trace_dir ${trace_dir})
set_tests_properties(tool.scheduler_launcher PROPERTIES TIMEOUT ${test_seconds})

set(trace_dir_2
"${PROJECT_SOURCE_DIR}/clients/drcachesim/tests/drmemtrace.schedtest.x64")
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Since the issue seems to be that there is an empty thread in here maybe we don't want to check in this test data but rather prevent future empty traces. Maybe add an invariant check that a (non-filtered) trace has at least one instruction, too.

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I created PR #6356 to attempt to do this but don't have a good test case: maybe you could test it in your tracing setup if that reliably generates this near-empty thread?

add_test(NAME tool.scheduler_launcher_map_to_rec
COMMAND scheduler_launcher -trace_dir ${trace_dir_2} -cpu_schedule_file
${trace_dir_2}/cpu_schedule.bin.zip)
set_tests_properties(tool.scheduler_launcher_map_to_rec PROPERTIES TIMEOUT ${test_seconds})
endif ()

# We have a companion test built using a separate --build-and-test CMake project in
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Binary file added clients/drcachesim/tests/drmemtrace.schedtest.x64/cpu_schedule.bin.zip
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Binary file added clients/drcachesim/tests/drmemtrace.schedtest.x64/drmemtrace.threadsig.180524.3292.trace.zip
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Binary file added clients/drcachesim/tests/drmemtrace.schedtest.x64/drmemtrace.threadsig.180525.6841.trace.zip
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Binary file added clients/drcachesim/tests/drmemtrace.schedtest.x64/serial_schedule.bin.gz
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15 changes: 15 additions & 0 deletions clients/drcachesim/tests/scheduler_launcher.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -231,6 +231,21 @@ simulate_core(int ordinal, scheduler_t::stream_t *stream, const scheduler_t &sch
thread_sequence += 'A' + static_cast<char>(input % 26);
cur_segment_instrs = 0;
}
} else if (record.marker.type == dynamorio::drmemtrace::TRACE_TYPE_MARKER) {
if (record.marker.marker_type ==
dynamorio::drmemtrace::TRACE_MARKER_TYPE_CPU_ID) {
#ifdef HAS_ZIP
if (!op_cpu_schedule_file.get_value().empty()) {
int cpu = (int)record.marker.marker_value;
int output_cpuid = stream->get_output_cpuid();
if (cpu != output_cpuid) {
FATAL_ERROR(
"CPU marker differs from output stream CPU ID: %d != %d\n",
cpu, output_cpuid);
}
}
#endif
}
}
#ifdef HAS_ZIP
else if (record.marker.type == dynamorio::drmemtrace::TRACE_TYPE_MARKER) {
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