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Addressed PR comments.
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edeiana committed Mar 21, 2024
1 parent ef8560c commit ab65804
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Showing 2 changed files with 2 additions and 4 deletions.
2 changes: 1 addition & 1 deletion core/ir/synthetic/encode.c
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@ encode_to_synth(dcontext_t *dcontext, instr_t *instr, byte *encoded_instr)
uint encoding = 0;

/* Encode number of destination operands.
* Note that a destination operand that is a memory renference, should have its
* Note that a destination operand that is a memory renference should have its
* registers (if any) counted as source operands, since they are being read.
* We use used_[src|dst]_reg_map to keep track of registers we've seen and avoid
* duplicates.
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4 changes: 1 addition & 3 deletions suite/tests/api/ir_x86.c
Original file line number Diff line number Diff line change
Expand Up @@ -789,7 +789,7 @@ test_instr_encode_and_decode(void *dc, instr_t *instr, uint len_expect,
instr_destroy(dc, decin);
}

void
static void
get_instr_src_and_dst_registers(instr_t *instr, uint max_num_regs, byte *used_src_reg_map,
byte *used_dst_reg_map)
{
Expand Down Expand Up @@ -833,8 +833,6 @@ get_instr_src_and_dst_registers(instr_t *instr, uint max_num_regs, byte *used_sr
used_src_reg_map[reg] = 1;
}
}

return;
}

bool
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