Update signal_invariants.c to ignore preempted instr and memref.

DynamoRIO · Oct 28, 2024 · 10c8705 · 10c8705
1 parent 1ede682
commit 10c8705
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Showing 2 changed files with 16 additions and 10 deletions.
diff --git a/clients/drcachesim/tests/signal_invariants.c b/clients/drcachesim/tests/signal_invariants.c
@@ -190,8 +190,10 @@ GLOBAL_LABEL(FUNCNAME:)
 #define FUNCNAME test_signal_midbb
         DECLARE_FUNC(FUNCNAME)
 GLOBAL_LABEL(FUNCNAME:)
-        /* prefetcht2's address is the instr count until a signal */
-        prefetcht2 [3]
+        /* prefetcht2's address is the instr count until a signal not counting
+         * the preempted instr.
+         */
+        prefetcht2 [2]
         nop
         nop
         ud2
@@ -205,8 +207,10 @@ GLOBAL_LABEL(FUNCNAME:)
 #define FUNCNAME test_signal_startbb
         DECLARE_FUNC(FUNCNAME)
 GLOBAL_LABEL(FUNCNAME:)
-        /* prefetcht2's address is the instr count until a signal */
-        prefetcht2 [2]
+        /* prefetcht2's address is the instr count until a signal not counting
+         * the preempted instr.
+         */
+        prefetcht2 [1]
         jmp      new_bb
     new_bb:
         ud2
@@ -221,10 +225,14 @@ GLOBAL_LABEL(FUNCNAME:)
          * XXX i#3958: Today the 2nd movs memref is incorrectly included *before*
          * the fault.
          */
-        /* prefetcht2's address is the instr count until a signal */
-        prefetcht2 [5]
-        /* prefetcht1's address is the memref count until a signal */
-        prefetcht1 [3]
+        /* prefetcht2's address is the instr count until a signal not counting
+         * the preempted instr.
+         */
+        prefetcht2 [4]
+        /* prefetcht1's address is the memref count until a signal not counting
+         * the preempted memref.
+         */
+        prefetcht1 [1]
         mov      REG_XSI, HEX(42)
         mov      REG_XDI, REG_XSP
         push     REG_XAX

diff --git a/clients/drcachesim/tracer/raw2trace.cpp b/clients/drcachesim/tracer/raw2trace.cpp
@@ -2114,8 +2114,6 @@ raw2trace_t::append_bb_entries(raw2trace_thread_data_t *tdata,
             buf->addr = (addr_t)orig_pc;
             ++buf;
             log(4, "Appended instr fetch for original %p\n", orig_pc);
-        } else {
-            log(0, "Skipped preempted instruction.\n");
         }
         decode_pc = pc;
         if (tdata->rseq_past_end_) {