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Dominaezzz authored Jul 24, 2024
2 parents 8e62204 + 38f1d28 commit b0f1982
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210 changes: 34 additions & 176 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -64,33 +64,32 @@ jobs:
steps:
- uses: actions/checkout@v4

# Install the Rust toolchain for Xtensa devices:
- uses: esp-rs/[email protected]
with:
default: true
ldproxy: false
# Install the Rust stable and nightly toolchains for RISC-V devices:
- if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc) }}
uses: dtolnay/rust-toolchain@v1
- uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: stable
components: rust-src
- if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc) }}
uses: dtolnay/rust-toolchain@v1
- uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: nightly
components: rust-src
# Install the Rust toolchain for Xtensa devices:
- if: contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc)
uses: esp-rs/[email protected]
with:
buildtargets: ${{ matrix.device.soc }}
default: true
ldproxy: false

- uses: Swatinem/rust-cache@v2

# Build all supported examples for the low-power core first (if present):
- if: contains(fromJson('["esp32c6", "esp32s2", "esp32s3"]'), matrix.device.soc)
name: Build prerequisites (esp-lp-hal)
name: Build prerequisite examples (esp-lp-hal)
run: cargo xtask build-examples esp-lp-hal ${{ matrix.device.soc }}
- if: contains(fromJson('["esp32c6", "esp32s2", "esp32s3"]'), matrix.device.soc)
name: Check esp-lp-hal documentation
run: RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-lp-hal --chips ${{ matrix.device.soc }}

# Make sure we're able to build the HAL without the default features
# enabled:
Expand All @@ -106,134 +105,15 @@ jobs:
run: cargo xtask build-examples esp-hal ${{ matrix.device.soc }}
# Check doc-tests
- name: Check doc-tests
run: cargo xtask run-doc-test esp-hal ${{ matrix.device.soc }}
run: cargo +esp xtask run-doc-test esp-hal ${{ matrix.device.soc }}
- name: Check documentation
run: RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-hal --chips ${{ matrix.device.soc }}
run: RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-hal --chips ${{ matrix.device.soc }}
# Run clippy
- name: Clippy
# We use the 'esp' toolchain for *all* targets, in order to get a
# semi-stable and consistent set of lints for all targets:
run: cargo +esp xtask lint-packages --chips ${{ matrix.device.soc }}

esp-lp-hal:
runs-on: ubuntu-latest

strategy:
fail-fast: false
matrix:
soc: ["esp32c6", "esp32s2", "esp32s3"]

steps:
- uses: actions/checkout@v4

# Install the Rust stable and nightly toolchains for RISC-V devices:
- uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: stable
components: rust-src
- uses: dtolnay/rust-toolchain@v1
if: ${{ !contains(fromJson('["esp32s2", "esp32s3"]'), matrix.soc) }}
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: nightly
components: rust-src
# Install the Rust toolchain for Xtensa devices:
- if: contains(fromJson('["esp32s2", "esp32s3"]'), matrix.soc)
uses: esp-rs/[email protected]
with:
buildtargets: ${{ matrix.soc }}
default: true
ldproxy: false


- uses: Swatinem/rust-cache@v2

# Build all supported examples for the specified device:
- name: Build examples
run: cargo xtask build-examples esp-lp-hal ${{ matrix.soc }}
- name: Check documentation
run: RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-lp-hal --chips ${{ matrix.soc }}
esp-riscv-rt:
runs-on: ubuntu-latest

steps:
- uses: actions/checkout@v4
- uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: stable
components: rust-src
- uses: Swatinem/rust-cache@v2

# Build for all RISC-V targets (no features):
- name: Build esp-riscv-rt (riscv32imc, no features)
run: cd esp-riscv-rt/ && cargo build --target=riscv32imc-unknown-none-elf
- name: Build esp-riscv-rt (riscv32imac, no features)
run: cd esp-riscv-rt/ && cargo build --target=riscv32imac-unknown-none-elf
# Build for all RISC-V targets (all features):
- name: Build esp-riscv-rt (riscv32imc, all features)
run: cd esp-riscv-rt/ && cargo build --target=riscv32imc-unknown-none-elf --features=ci
- name: Build esp-riscv-rt (riscv32imac, all features)
run: cd esp-riscv-rt/ && cargo build --target=riscv32imac-unknown-none-elf --features=ci

esp-println:
name: esp-println (${{ matrix.device.soc }})
runs-on: ubuntu-latest

strategy:
fail-fast: false
matrix:
device: [
# RISC-V devices:
{ soc: "esp32c2", target: "riscv32imc-unknown-none-elf" },
{ soc: "esp32c3", target: "riscv32imc-unknown-none-elf" },
{ soc: "esp32c6", target: "riscv32imac-unknown-none-elf" },
{ soc: "esp32h2", target: "riscv32imac-unknown-none-elf" },
# Xtensa devices:
{ soc: "esp32", target: "xtensa-esp32-none-elf" },
{ soc: "esp32s2", target: "xtensa-esp32s2-none-elf" },
{ soc: "esp32s3", target: "xtensa-esp32s3-none-elf" },
]

steps:
- uses: actions/checkout@v4

# Install the Rust stable and nightly toolchains for RISC-V devices:
- if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc) }}
uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: stable
components: rust-src
- if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc) }}
uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: nightly
components: rust-src
# Install the Rust toolchain for Xtensa devices:
- if: contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.device.soc)
uses: esp-rs/[email protected]
with:
buildtargets: ${{ matrix.device.soc }}
default: true
ldproxy: false

- uses: Swatinem/rust-cache@v2

# Make sure we're able to build with the default features and most common features enabled
- name: Build (no features)
run: |
cargo xtask build-package \
--features=${{ matrix.device.soc }},log \
--target=${{ matrix.device.target }} \
esp-println
# So #1678 doesn't reoccur ('defmt-espflash,auto')
- name: Build (with feature 'defmt-espflash')
run: |
cargo xtask build-package \
--features=${{ matrix.device.soc }},log,defmt-espflash \
--target=${{ matrix.device.target }} \
esp-println
- name: Check documentation
run: RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-println --chips ${{ matrix.device.soc }}
extras:
runs-on: ubuntu-latest

Expand All @@ -257,13 +137,19 @@ jobs:
# --------------------------------------------------------------------------
# MSRV

msrv-riscv:
msrv:
runs-on: ubuntu-latest
env:
RUSTC_BOOTSTRAP: 1

steps:
- uses: actions/checkout@v4
# install esp toolchain first so it isn't set as the default
- uses: esp-rs/[email protected]
with:
default: true
ldproxy: false
version: ${{ env.MSRV }}
- uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
Expand All @@ -272,56 +158,28 @@ jobs:
- uses: Swatinem/rust-cache@v2

# Verify the MSRV for all RISC-V chips.
- name: msrv (esp-hal)
- name: msrv RISCV (esp-hal)
run: |
cargo xtask build-package --features=esp32c2,ci --target=riscv32imc-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32c3,ci --target=riscv32imc-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32c6,ci --target=riscv32imac-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32h2,ci --target=riscv32imac-unknown-none-elf esp-hal
- name: msrv (esp-lp-hal)
run: |
cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal
cargo xtask build-package --features=esp32s2 --target=riscv32imc-unknown-none-elf esp-lp-hal
cargo xtask build-package --features=esp32s3 --target=riscv32imc-unknown-none-elf esp-lp-hal
msrv-xtensa:
runs-on: ubuntu-latest
env:
RUSTC_BOOTSTRAP: 1

steps:
- uses: actions/checkout@v4
- uses: esp-rs/[email protected]
with:
ldproxy: false
version: ${{ env.MSRV }}
- uses: Swatinem/rust-cache@v2
# Verify the MSRV for all Xtensa chips:
- name: msrv (esp-hal)
- name: msrv Xtensa (esp-hal)
run: |
cargo xtask build-package --toolchain=esp --features=esp32,ci --target=xtensa-esp32-none-elf esp-hal
cargo xtask build-package --toolchain=esp --features=esp32s2,ci --target=xtensa-esp32s2-none-elf esp-hal
cargo xtask build-package --toolchain=esp --features=esp32s3,ci --target=xtensa-esp32s3-none-elf esp-hal
# --------------------------------------------------------------------------
# Lint & Format

clippy:
runs-on: ubuntu-latest

steps:
- uses: actions/checkout@v4
# We use the 'esp' toolchain for *all* targets, in order to get a
# semi-stable and consistent set of lints for all targets:
- uses: esp-rs/[email protected]
with:
default: true
ldproxy: false
- uses: Swatinem/rust-cache@v2
- name: msrv (esp-lp-hal)
run: |
cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal
cargo xtask build-package --features=esp32s2 --target=riscv32imc-unknown-none-elf esp-lp-hal
cargo xtask build-package --features=esp32s3 --target=riscv32imc-unknown-none-elf esp-lp-hal
# Lint all packages:
- run: cargo xtask lint-packages
# --------------------------------------------------------------------------
# Format

rustfmt:
runs-on: ubuntu-latest
Expand Down
13 changes: 11 additions & 2 deletions .github/workflows/hil.yml
Original file line number Diff line number Diff line change
Expand Up @@ -103,24 +103,29 @@ jobs:
# RISC-V devices:
- soc: esp32c2
runner: esp32c2-jtag
usb: ACM0
- soc: esp32c3
runner: esp32c3-usb
usb: ACM0
- soc: esp32c6
runner: esp32c6-usb
usb: ACM0
- soc: esp32h2
runner: esp32h2-usb
usb: ACM0
# Xtensa devices:
- soc: esp32s2
runner: esp32s2-jtag
usb: USB0
- soc: esp32s3
runner: esp32s3-usb
usb: USB0
steps:
- uses: actions/checkout@v4
- uses: actions/download-artifact@v4
with:
name: tests-${{ matrix.target.soc }}
path: tests-${{ matrix.target.soc }}

- name: Run Tests
id: run-tests
run: |
Expand All @@ -129,4 +134,8 @@ jobs:
- name: Erase Flash on Failure
if: ${{ failure() && steps.run-tests.conclusion == 'failure' }}
run: espflash erase-flash
env:
ESPFLASH_PORT: /dev/tty${{ matrix.target.usb }}
run: |
export PATH=$PATH:/home/espressif/.cargo/bin
espflash erase-flash
2 changes: 1 addition & 1 deletion esp-backtrace/src/riscv.rs
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ use crate::MAX_BACKTRACE_ADDRESSES;
// we get better results (especially if the caller was the last function in the
// calling function) if we report the address of the JALR itself
// even if it was a C.JALR we should get good results using RA - 4
#[allow(unused)]
#[cfg(feature = "panic-handler")]
pub(super) const RA_OFFSET: usize = 4;

/// Registers saved in trap handler
Expand Down
4 changes: 3 additions & 1 deletion esp-backtrace/src/xtensa.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@ use crate::MAX_BACKTRACE_ADDRESSES;
// the return address is the address following the callxN
// we get better results (especially if the caller was the last function in the
// calling function) if we report the address of callxN itself
#[cfg(feature = "panic-handler")]
pub(super) const RA_OFFSET: usize = 3;

#[doc(hidden)]
Expand Down Expand Up @@ -307,7 +308,8 @@ pub(crate) fn backtrace_internal(

old_address = address;

if address == 0 {
// the address is 0 but we sanitized the address - then 0 becomes 0x40000000
if address == 0x40000000 {
break;
}

Expand Down
4 changes: 4 additions & 0 deletions esp-hal/CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0

### Fixed

- Fix I2S async-tx (#1833)
- Fix PARL_IO async-rx (#1851)

### Removed

- This package no longer re-exports the `esp_hal_procmacros::main` macro (#1828)
Expand All @@ -40,6 +43,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- uart: Make `rx_timeout` optional in Config struct (#1759)
- Add interrupt related functions to `PeriodicTimer`/`OneShotTimer`, added `ErasedTimer` (#1753)
- Added blocking `read_bytes` method to `Uart` and `UartRx` (#1784)
- Add method to expose `InputPin::is_interrupt_set` in `Input<InputPin>` for use in interrupt handlers (#1829)

### Fixed

Expand Down
2 changes: 1 addition & 1 deletion esp-hal/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -182,7 +182,7 @@ opsram-8m = []
opsram-16m = []

# This feature is intended for testing; you probably don't want to enable it:
ci = ["async", "embedded-hal-02", "embedded-io", "ufmt"]
ci = ["async", "embedded-hal-02", "embedded-io", "ufmt", "defmt", "bluetooth", "place-spi-driver-in-ram"]

[lints.clippy]
mixed_attributes_style = "allow"
Expand Down
2 changes: 1 addition & 1 deletion esp-hal/src/dma/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1452,7 +1452,7 @@ where

#[cfg(feature = "async")]
fn waker() -> &'static embassy_sync::waitqueue::AtomicWaker {
CH::Rx::waker()
CH::Tx::waker()
}

fn is_listening_out_descriptor_error(&self) -> bool {
Expand Down
6 changes: 6 additions & 0 deletions esp-hal/src/gpio/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1727,6 +1727,12 @@ where
self.pin.clear_interrupt(private::Internal);
}

/// Checks if the interrupt status bit for this Pin is set
#[inline]
pub fn is_interrupt_set(&self) -> bool {
self.pin.is_interrupt_set(private::Internal)
}

/// Enable as a wake-up source.
///
/// This will unlisten for interrupts
Expand Down
2 changes: 1 addition & 1 deletion esp-hal/src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -619,7 +619,7 @@ mod asynch {
const NUM_I2C: usize = 1;
}
}

#[allow(clippy::declare_interior_mutable_const)]
const INIT: AtomicWaker = AtomicWaker::new();
static WAKERS: [AtomicWaker; NUM_I2C] = [INIT; NUM_I2C];

Expand Down
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