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<ol class="chapter"><li class="chapter-item expanded "><a href="Introduction.html" class="active"><strong aria-hidden="true">1.</strong> Introduction</a></li><li><ol class="section"><li class="chapter-item expanded "><a href="Hardware.html"><strong aria-hidden="true">1.1.</strong> Hardware</a></li><li class="chapter-item expanded "><a href="no-std.html"><strong aria-hidden="true">1.2.</strong> no-std</a></li><li class="chapter-item expanded "><a href="whyrust.html"><strong aria-hidden="true">1.3.</strong> Why Rust in Shakti?</a></li><li class="chapter-item expanded "><a href="tooling.html"><strong aria-hidden="true">1.4.</strong> tooling</a></li><li class="chapter-item expanded "><a href="Installation.html"><strong aria-hidden="true">1.5.</strong> Installation</a></li></ol></li><li class="chapter-item expanded "><a href="peripherals/peripherals.html"><strong aria-hidden="true">2.</strong> Peripherals</a></li><li><ol class="section"><li class="chapter-item expanded "><a href="peripherals/gpio.html"><strong aria-hidden="true">2.1.</strong> GPIO</a></li><li class="chapter-item expanded "><a href="peripherals/uart.html"><strong aria-hidden="true">2.2.</strong> UART</a></li><li class="chapter-item expanded "><a href="peripherals/spi.html"><strong aria-hidden="true">2.3.</strong> SPI</a></li><li class="chapter-item expanded "><a href="peripherals/i2c.html"><strong aria-hidden="true">2.4.</strong> I2C</a></li><li class="chapter-item expanded "><a href="peripherals/pwm.html"><strong aria-hidden="true">2.5.</strong> PWM</a></li></ol></li><li class="chapter-item expanded "><a href="examples/examples.html"><strong aria-hidden="true">3.</strong> Examples</a></li><li><ol class="section"><li class="chapter-item expanded "><a href="examples/gpio_appls.html"><strong aria-hidden="true">3.1.</strong> GPIO Applications</a></li><li class="chapter-item expanded "><a href="examples/uart_appls.html"><strong aria-hidden="true">3.2.</strong> UART Applications</a></li><li class="chapter-item expanded "><a href="examples/spi_appls.html"><strong aria-hidden="true">3.3.</strong> SPI Applications</a></li></ol></li><li class="chapter-item expanded "><a href="Contributors.html"><strong aria-hidden="true">4.</strong> Contributors</a></li></ol>
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<h1 id="shakti-rust-book"><a class="header" href="#shakti-rust-book">Shakti Rust Book</a></h1>
<p>by <a href="https://github.com/yashwanthsinghm" title="yashwanthsinghm"><strong><code>Yashwanth Singh M</code></strong> <img src="https://img.icons8.com/ios-glyphs/20/11/github.png"/></a></p>
<p>The Shakti processor is an open-source initiative started by <strong>IIT Madras</strong> to produce production-grade processors, complete System on Chips (SoCs), development boards, and a SHAKTI-based software platform. This documentation will provide a Rust SDK using the Shakti <strong>RISC-V</strong> hardware abstraction layer to run secure and memory-safe code on the Shakti family of chips.</p>
<h1 id="introduction-shakti"><a class="header" href="#introduction-shakti">Introduction Shakti</a></h1>
<p>Introducing the SHAKTI processor, a groundbreaking development in RISC-V architecture by the RISE lab at <strong>IIT Madras</strong>. With a visionary roadmap for diverse market segments, SHAKTI unveils its initial offerings—the E and C-classes. Tailored for IoT, Embedded Systems, and Desktop markets, these processors feature royalty-free and open-source attributes under the BSD3 license.</p>
<p>The E-class, a 32-bit microprocessor, operates seamlessly with versatile RISC-V ISA support. Sporting an in-order 3-stage pipeline and operating at a frequency of under 200MHz on silicon, it competes against ARM's M-class (Cortex-M series) cores. Positioned for applications in low-power computing environments, automotive systems, and IoT, the E-class is capable of running Real-Time Operating Systems (RTOS) like Zephyr OS and FreeRTOS. Explore PINAKA (E32-A35) and PARASHU (E32-A100) in the E-class, designed for smart-cards, motor controls, and home automation.</p>
<p>On the other hand, the C-class, an in-order 6-stage 64-bit microcontroller, supports the entire RISC-V ISA. Targeting mid-range compute systems with a variable frequency range of 200-800MHz, it is customizable for both low-power and high-performance variants, positioning it against ARM's Cortex A35/A55. Operating systems such as Linux, SEL4, and FreeRTOS have been successfully ported and verified with the C-class. Explore VAJRA (C64-A100) in the C-class, a single-chip 64-bit microcontroller aimed at mid-range application workloads in industrial controllers and the Desktop market.</p>
<h1 id="rust-in-shakti-processor"><a class="header" href="#rust-in-shakti-processor">Rust in Shakti Processor</a></h1>
<p>Enhancing the capabilities of these processors is the SHAKTI RISC-V HAL, an open-source hardware abstraction layer written in Rust, known as <a href="https://github.com/yashwanthsinghm/shakti_riscv_hal"><strong>Shakti_riscv_hal</strong></a>. This HAL provides abstraction for all peripherals available in the E-class and C-class, including Vajra, Pinaka, and Parasu, making them more powerful, memory-safe, and leveraging the advantages of the Rust programming language. Rust, renowned for its focus on memory safety and zero-cost abstractions, significantly enhances the security of embedded programming, ensuring robust and reliable applications for SHAKTI processors. As SHAKTI continues to revolutionize applications in low-power, high-performance, and mid-range workloads, these processors, coupled with Rust's secure programming capabilities, pave the way for a new era of computing possibilities.</p>
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