From df0d37cc2e3aba5a9cf606e55c1423020850a192 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Fri, 5 Jul 2024 16:37:17 -0700 Subject: [PATCH 01/23] resolving c++ linter If an else has a brace on one side, it should have it on both [readability/braces] --- common/driver/axis_gen2.c | 11 +++++---- common/driver/dma_buffer.c | 39 +++++++++++++++--------------- common/driver/dma_common.c | 24 +++++++++--------- common/driver/gpu_async.c | 4 +-- rce_stream/app/src/dmaLoopTest.cpp | 30 +++++++++++++---------- rce_stream/app/src/dmaRead.cpp | 9 +++---- rce_stream/app/src/dmaWrite.cpp | 6 ++--- rce_stream/driver/src/rce_top.c | 3 +-- 8 files changed, 62 insertions(+), 64 deletions(-) diff --git a/common/driver/axis_gen2.c b/common/driver/axis_gen2.c index e45f379..75d2d95 100755 --- a/common/driver/axis_gen2.c +++ b/common/driver/axis_gen2.c @@ -139,10 +139,10 @@ inline void AxisG2_WriteFree ( struct DmaBuffer *buff, struct AxisG2Reg *reg, ui // Write the second part to the device's write FIFO B writel(wrData[1], &(reg->writeFifoB)); - } + // If not using 128-bit descriptors, write the buffer handle directly // to the device's DMA address table based on the buffer index - else { + } else { // For 64-bit descriptors writel(buff->buffHandle, &(reg->dmaAddr[buff->index])); } @@ -490,14 +490,15 @@ void AxisG2_Init(struct DmaDevice *dev) { buff = dmaGetBufferList(&(dev->rxBuffers),x); // Map failure - if ( dmaBufferToHw(buff) < 0 ) dev_warn(dev->device,"Init: Failed to map dma buffer.\n"); + if ( dmaBufferToHw(buff) < 0 ) { + dev_warn(dev->device,"Init: Failed to map dma buffer.\n"); // Add to software queue, if enabled and hardware is full - else if ( hwData->desc128En && (hwData->hwWrBuffCnt >= (hwData->addrCount-1)) ) + } else if ( hwData->desc128En && (hwData->hwWrBuffCnt >= (hwData->addrCount-1)) ) { dmaQueuePush(&(hwData->wrQueue),buff); // Add to hardware queue - else { + } else { ++hwData->hwWrBuffCnt; AxisG2_WriteFree(buff,reg,hwData->desc128En); } diff --git a/common/driver/dma_buffer.c b/common/driver/dma_buffer.c index 54ba945..bb63b9d 100755 --- a/common/driver/dma_buffer.c +++ b/common/driver/dma_buffer.c @@ -104,10 +104,9 @@ size_t dmaAllocBuffers ( struct DmaDevice *dev, struct DmaBufferList *list, if ( list->dev->cfgMode & BUFF_COHERENT ) { buff->buffAddr = dma_alloc_coherent(list->dev->device, list->dev->cfgSize, &(buff->buffHandle), GFP_DMA | GFP_KERNEL); - } // Streaming buffer type, standard kernel memory - else if ( list->dev->cfgMode & BUFF_STREAM ) { + } else if ( list->dev->cfgMode & BUFF_STREAM ) { #if LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0) buff->buffAddr = kmalloc(list->dev->cfgSize, GFP_KERNEL); if (buff->buffAddr != NULL) { @@ -131,10 +130,9 @@ size_t dmaAllocBuffers ( struct DmaDevice *dev, struct DmaBufferList *list, dev_err(dev->device, "dmaAllocBuffers(BUFF_STREAM): dma_alloc_pages failed\n"); } #endif - } // ACP type with permanent handle mapping, dma capable kernel memory - else if ( list->dev->cfgMode & BUFF_ARM_ACP ) { + } else if ( list->dev->cfgMode & BUFF_ARM_ACP ) { buff->buffAddr = kzalloc(list->dev->cfgSize, GFP_DMA | GFP_KERNEL); if (buff->buffAddr != NULL) buff->buffHandle = virt_to_phys(buff->buffAddr); @@ -353,9 +351,9 @@ struct DmaBuffer *dmaFindBufferList(struct DmaBufferList *list, dma_addr_t handl } // Buffer not found in unsorted list return NULL; - } + // Handle sorted list case: binary search for efficiency - else { + } else { struct DmaBuffer **result = (struct DmaBuffer **) bsearch(&handle, list->sorted, list->count, sizeof(struct DmaBuffer *), dmaSearchComp); @@ -401,8 +399,9 @@ struct DmaBuffer *dmaGetBufferList(struct DmaBufferList *list, uint32_t index) { uint32_t sl; uint32_t sli; - if (index < list->baseIdx || index >= (list->baseIdx + list->count)) return NULL; - else { + if (index < list->baseIdx || index >= (list->baseIdx + list->count)) { + return NULL; + } else { sl = (index - list->baseIdx) / BUFFERS_PER_LIST; sli = (index - list->baseIdx) % BUFFERS_PER_LIST; return list->indexed[sl][sli]; @@ -448,13 +447,13 @@ struct DmaBuffer *dmaRetBufferIrq(struct DmaDevice *dev, dma_addr_t handle) { dmaBufferFromHw(buff); // Prepare buffer for hardware interaction dmaQueuePushIrq(&(dev->tq), buff); // Re-queue the buffer return NULL; - } + // Attempt to return rx buffer if found in receive list - else if ((buff = dmaFindBufferList(&(dev->rxBuffers), handle)) != NULL) { + } else if ((buff = dmaFindBufferList(&(dev->rxBuffers), handle)) != NULL) { return buff; - } + // Log warning if buffer is not found in either list - else { + } else { dev_warn(dev->device, "dmaRetBufferIrq: Failed to locate descriptor %.8x.\n", (uint32_t)handle); return NULL; } @@ -483,13 +482,13 @@ struct DmaBuffer *dmaRetBufferIdx(struct DmaDevice *dev, uint32_t index) { dmaBufferFromHw(buff); dmaQueuePush(&(dev->tq), buff); return NULL; - } + // Attempt to retrieve and return the buffer from the receive queue - else if ((buff = dmaGetBufferList(&(dev->rxBuffers), index)) != NULL) { + } else if ((buff = dmaGetBufferList(&(dev->rxBuffers), index)) != NULL) { return buff; - } + // Log warning if the buffer cannot be found in either queue - else { + } else { dev_warn(dev->device, "dmaRetBufferIdx: Failed to locate descriptor %i.\n", index); return NULL; } @@ -518,13 +517,13 @@ struct DmaBuffer *dmaRetBufferIdxIrq(struct DmaDevice *dev, uint32_t index) { dmaBufferFromHw(buff); dmaQueuePushIrq(&(dev->tq), buff); return NULL; - } + // Attempt to return buffer from receive queue if found - else if ((buff = dmaGetBufferList(&(dev->rxBuffers), index)) != NULL) { + } else if ((buff = dmaGetBufferList(&(dev->rxBuffers), index)) != NULL) { return buff; - } + // Log warning if buffer is not found in either list - else { + } else { dev_warn(dev->device, "dmaRetBufferIdxIrq: Failed to locate descriptor %i.\n", index); return NULL; } diff --git a/common/driver/dma_common.c b/common/driver/dma_common.c index b7cd042..2072517 100755 --- a/common/driver/dma_common.c +++ b/common/driver/dma_common.c @@ -640,17 +640,18 @@ ssize_t Dma_Read(struct file *filp, char *buffer, size_t count, loff_t *f_pos) dp = (void *)rd[x].data; // Use index if pointer is zero - if (dp == 0) buff[x]->userHas = desc; - else { + if (dp == 0) { + buff[x]->userHas = desc; + } else { // Warn if user buffer is too small if (rd[x].size < buff[x]->size) { dev_warn(dev->device, "Read: user buffer is too small. Rx=%i, User=%i.\n", buff[x]->size, (int32_t)rd[x].size); rd[x].error |= DMA_ERR_MAX; rd[x].ret = -1; - } + // Copy data to user space - else if ((ret = copy_to_user(dp, buff[x]->buffAddr, buff[x]->size))) { + } else if ((ret = copy_to_user(dp, buff[x]->buffAddr, buff[x]->size))) { dev_warn(dev->device, "Read: failed to copy data to user space ret=%li, user=%p kern=%p size=%u.\n", ret, dp, buff[x]->buffAddr, buff[x]->size); rd[x].ret = -1; @@ -980,10 +981,9 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { buff->userHas = NULL; buffList[bCnt++] = buff; } - } // Attempt to find in tx list - else if ( (buff = dmaGetBufferList(&(dev->txBuffers),indexes[x])) != NULL ) { + } else if ( (buff = dmaGetBufferList(&(dev->txBuffers),indexes[x])) != NULL ) { // Only return if owned by current desc if ( buff->userHas == desc ) { @@ -992,8 +992,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { // Return entry to TX queue dmaQueuePush(&(dev->tq),buff); } - } - else { + } else { dev_warn(dev->device,"Command: Invalid index posted: %i.\n", indexes[x]); kfree(indexes); return -1; @@ -1015,8 +1014,9 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { buff = dmaQueuePop(&(dev->tq)); // No buffers are available - if ( buff == NULL ) return -1; - else { + if ( buff == NULL ) { + return -1; + } else { buff->userHas = desc; if ( dev->debug > 0 ) @@ -1151,9 +1151,9 @@ int Dma_Mmap(struct file *filp, struct vm_area_struct *vma) // Map coherent buffer if (dev->cfgMode & BUFF_COHERENT) { ret = dma_mmap_coherent(dev->device, vma, buff->buffAddr, buff->buffHandle, dev->cfgSize); - } + // Map streaming buffer or ARM ACP - else if (dev->cfgMode & BUFF_STREAM || dev->cfgMode & BUFF_ARM_ACP) { + } else if (dev->cfgMode & BUFF_STREAM || dev->cfgMode & BUFF_ARM_ACP) { ret = io_remap_pfn_range(vma, vma->vm_start, virt_to_phys((void *)buff->buffAddr) >> PAGE_SHIFT, vsize, vma->vm_page_prot); diff --git a/common/driver/gpu_async.c b/common/driver/gpu_async.c index 722d7f8..dd1235f 100755 --- a/common/driver/gpu_async.c +++ b/common/driver/gpu_async.c @@ -148,8 +148,8 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { if (ret != 0) { dev_warn(dev->device,"Gpu_AddNvidia: error mapping page tables ret=%i\n",ret); - } - else { + + } else { // Determine how much memory is contiguous mapSize = 0; diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index 18180a6..3b2850b 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -134,8 +134,7 @@ void *runWrite ( void *t ) { txData->running = false; return(NULL); } - } - else { + } else { if ((data = malloc(txData->size)) == NULL ) { printf("Write failed to allocate buffer\n"); txData->running = false; @@ -180,8 +179,7 @@ void *runWrite ( void *t ) { if ( ret < 0 ) { printf("Write Error at count %lu. Dest=%i\n",txData->count,txData->dest); break; - } - else if ( ret > 0 ) { + } else if ( ret > 0 ) { txData->count++; txData->total += ret; prbValid = false; @@ -240,8 +238,7 @@ void *runRead ( void *t ) { rxData->running = false; return(NULL); } - } - else { + } else { if ((data = malloc(maxSize)) == NULL ) { printf("Read failed to allocate buffer\n"); rxData->running = false; @@ -277,8 +274,9 @@ void *runRead ( void *t ) { if ( idxEn ) { ret = dmaReadIndex(fd,&dmaIndex,&rxFlags,NULL,&rxDest); data = dmaBuffers[dmaIndex]; + } else { + ret = dmaRead(fd,data,maxSize,&rxFlags,NULL,&rxDest); } - else ret = dmaRead(fd,data,maxSize,&rxFlags,NULL,&rxDest); rxFuser = axisGetFuser(rxFlags); rxLuser = axisGetLuser(rxFlags); @@ -297,8 +295,7 @@ void *runRead ( void *t ) { printf("Read Error. Dest=%i, ExpDest=%i, Ret=%i, Exp=%i, Fuser=0x%.2x, Luser=0x%.2x\n", rxDest,rxData->dest,ret,rxData->size,rxFuser,rxLuser); break; - } - else { + } else { rxData->count++; rxData->total += ret; } @@ -382,8 +379,7 @@ int main (int argc, char **argv) { printf("Error creating write thread\n"); return(2); } - } - else { + } else { txData[dCount]->running = false; txData[dCount]->enable = false; } @@ -403,9 +399,17 @@ int main (int argc, char **argv) { allDone = true; for (x=0; x < dCount; x++) { if ( args.txDis == 0 ) { - if ( txData[x]->running == false ) runEn = false; else allDone = false; + if ( txData[x]->running == false ) { + runEn = false; + } else { + allDone = false; + } + } + if ( rxData[x]->running == false ) { + runEn = false; + } else { + allDone = false; } - if ( rxData[x]->running == false ) runEn = false; else allDone = false; } if ( runEn == false ) { for (x=0; x < dCount; x++) { diff --git a/rce_stream/app/src/dmaRead.cpp b/rce_stream/app/src/dmaRead.cpp index 21b34eb..6fe63c3 100644 --- a/rce_stream/app/src/dmaRead.cpp +++ b/rce_stream/app/src/dmaRead.cpp @@ -109,8 +109,7 @@ int main (int argc, char **argv) { dmaInitMaskBytes(mask); if ( args.dest == NULL ) { memset(mask,0xFF,DMA_MASK_SIZE); - } - else { + } else { strcpy(tBuff,args.dest); tok = strtok(tBuff,","); while ( tok != NULL ) { @@ -128,8 +127,7 @@ int main (int argc, char **argv) { printf("Failed to map dma buffers!\n"); return(0); } - } - else { + } else { if ((rxData = malloc(maxSize)) == NULL ) { printf("Failed to allocate rxData!\n"); return(0); @@ -152,8 +150,7 @@ int main (int argc, char **argv) { ret = select(s+1,&fds,NULL,NULL,&timeout); if ( ret <= 0 ) { printf("Read timeout\n"); - } - else { + } else { // DMA Read if ( args.idxEn ) { diff --git a/rce_stream/app/src/dmaWrite.cpp b/rce_stream/app/src/dmaWrite.cpp index 437add2..3ab02fb 100644 --- a/rce_stream/app/src/dmaWrite.cpp +++ b/rce_stream/app/src/dmaWrite.cpp @@ -121,8 +121,7 @@ int main (int argc, char **argv) { printf("Failed to map dma buffers!\n"); return(0); } - } - else { + } else { if ((txData = malloc(args.size)) == NULL ) { printf("Failed to allocate rxData!\n"); return(0); @@ -145,8 +144,7 @@ int main (int argc, char **argv) { ret = select(s+1,NULL,&fds,NULL,&timeout); if ( ret <= 0 ) { printf("Write timeout\n"); - } - else { + } else { if ( args.idxEn ) { dmaIndex = dmaGetIndex(s); diff --git a/rce_stream/driver/src/rce_top.c b/rce_stream/driver/src/rce_top.c index 7a10ef0..eb1ce14 100755 --- a/rce_stream/driver/src/rce_top.c +++ b/rce_stream/driver/src/rce_top.c @@ -180,10 +180,9 @@ int Rce_Probe(struct platform_device *pdev) { // Version 2 if ( ((ioread32(dev->reg) >> 24) & 0xFF) >= 2 ) { dev->hwFunc = &(AxisG2_functions); - } // Version 1 - else { + } else { iowrite32(0x1,((uint8_t *)dev->reg)+0x8); if ( ioread32(((uint8_t *)dev->reg)+0x8) != 0x1 ) { release_mem_region(dev->baseAddr, dev->baseSize); From c098fdc95b93f0637cc950de704686d3b6b7afc7 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Fri, 5 Jul 2024 18:27:22 -0700 Subject: [PATCH 02/23] resolving c++ linter Almost always, snprintf is better than strcpy [runtime/printf] --- rce_hp_buffers/driver/src/rce_top.c | 2 +- rce_memmap/driver/src/rce_map.c | 2 +- rce_stream/app/src/dmaLoopTest.cpp | 4 ++-- rce_stream/app/src/dmaRead.cpp | 2 +- rce_stream/driver/src/rce_top.c | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/rce_hp_buffers/driver/src/rce_top.c b/rce_hp_buffers/driver/src/rce_top.c index 08aa3f0..0426ba9 100755 --- a/rce_hp_buffers/driver/src/rce_top.c +++ b/rce_hp_buffers/driver/src/rce_top.c @@ -115,7 +115,7 @@ int Rce_Probe(struct platform_device *pdev) { gDmaDevCount++; // Create a device name - strcpy(dev->devName,tmpName); + strcpy(dev->devName,tmpName);//NOLINT // Get Base Address of registers from pci structure. dev->baseAddr = pdev->resource[0].start; diff --git a/rce_memmap/driver/src/rce_map.c b/rce_memmap/driver/src/rce_map.c index 914ac77..5f50642 100755 --- a/rce_memmap/driver/src/rce_map.c +++ b/rce_memmap/driver/src/rce_map.c @@ -73,7 +73,7 @@ int Map_Init(void) { memset(&dev,0,sizeof(struct MapDevice)); - strcpy(dev.devName,MOD_NAME); + strcpy(dev.devName,MOD_NAME);//NOLINT // Allocate device numbers for character device. 1 minor numer starting at 0 res = alloc_chrdev_region(&(dev.devNum), 0, 1, dev.devName); diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index 3b2850b..8ae1d3a 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -345,7 +345,7 @@ int main (int argc, char **argv) { // Generating endpoints dCount = 0; - strcpy(tBuff,args.dest); + strcpy(tBuff,args.dest);//NOLINT tok = strtok(tBuff,","); while ( tok != NULL ) { x = strtoul(tok,NULL,10); @@ -366,7 +366,7 @@ int main (int argc, char **argv) { rxData[dCount]->prbEn = !args.prbsDis; rxData[dCount]->pause = args.pause; - sprintf(rxData[dCount]->id,"%i",x); + sprintf(rxData[dCount]->id,"%i",x);//NOLINT memcpy(txData[dCount],rxData[dCount],sizeof(RunData)); if ( pthread_create(&rxThread[dCount],NULL,runRead,rxData[dCount]) ) { diff --git a/rce_stream/app/src/dmaRead.cpp b/rce_stream/app/src/dmaRead.cpp index 6fe63c3..f51433f 100644 --- a/rce_stream/app/src/dmaRead.cpp +++ b/rce_stream/app/src/dmaRead.cpp @@ -110,7 +110,7 @@ int main (int argc, char **argv) { if ( args.dest == NULL ) { memset(mask,0xFF,DMA_MASK_SIZE); } else { - strcpy(tBuff,args.dest); + strcpy(tBuff,args.dest);//NOLINT tok = strtok(tBuff,","); while ( tok != NULL ) { x = strtoul(tok,NULL,10); diff --git a/rce_stream/driver/src/rce_top.c b/rce_stream/driver/src/rce_top.c index eb1ce14..ec09e56 100755 --- a/rce_stream/driver/src/rce_top.c +++ b/rce_stream/driver/src/rce_top.c @@ -133,7 +133,7 @@ int Rce_Probe(struct platform_device *pdev) { gDmaDevCount++; // Create a device name - strcpy(dev->devName,tmpName); + strcpy(dev->devName,tmpName);//NOLINT // Get Base Address of registers from pci structure. dev->baseAddr = pdev->resource[0].start; From f819afe2249b202e54e9b29b3059bd6ff98eb164 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Fri, 5 Jul 2024 18:45:02 -0700 Subject: [PATCH 03/23] resolving c++ linter Found C system header after other header. Should be: axis_gen1.h, c system, c++ system, other. [build/include_order] --- rce_hp_buffers/driver/src/rce_hp.h | 3 ++- rce_stream/driver/src/axis_gen1.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/rce_hp_buffers/driver/src/rce_hp.h b/rce_hp_buffers/driver/src/rce_hp.h index 109a3f8..758bed9 100755 --- a/rce_hp_buffers/driver/src/rce_hp.h +++ b/rce_hp_buffers/driver/src/rce_hp.h @@ -19,9 +19,10 @@ #ifndef __RCE_HP_H__ #define __RCE_HP_H__ +#include + #include "dma_common.h" #include "dma_buffer.h" -#include struct RceHpReg { uint32_t spare[100]; // skip 0x0 - 0x3FF diff --git a/rce_stream/driver/src/axis_gen1.h b/rce_stream/driver/src/axis_gen1.h index 08be3c4..12a7f2e 100755 --- a/rce_stream/driver/src/axis_gen1.h +++ b/rce_stream/driver/src/axis_gen1.h @@ -22,9 +22,10 @@ #ifndef __AXIS_GEN1_H__ #define __AXIS_GEN1_H__ +#include + #include "dma_common.h" #include "dma_buffer.h" -#include struct AxisG1Reg { uint32_t rxEnable; // 0x00000 From 684e6d37e959cebd5cc4bd6c5cefa6af448b0d8f Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Fri, 5 Jul 2024 18:48:23 -0700 Subject: [PATCH 04/23] resolving c++ linter linux/types.h already included at XXXX [build/include] --- petalinux/aximemorymap/files/aximemorymap.h | 1 - rce_memmap/driver/src/rce_map.h | 1 - 2 files changed, 2 deletions(-) diff --git a/petalinux/aximemorymap/files/aximemorymap.h b/petalinux/aximemorymap/files/aximemorymap.h index 73490d2..babdacd 100755 --- a/petalinux/aximemorymap/files/aximemorymap.h +++ b/petalinux/aximemorymap/files/aximemorymap.h @@ -28,7 +28,6 @@ #include #include #include -#include #include #include #include diff --git a/rce_memmap/driver/src/rce_map.h b/rce_memmap/driver/src/rce_map.h index 927655b..18feafc 100755 --- a/rce_memmap/driver/src/rce_map.h +++ b/rce_memmap/driver/src/rce_map.h @@ -26,7 +26,6 @@ #include #include #include -#include #include #include From 2a59b22ce4175150c4146a1ac705c84cc5f63d52 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Fri, 5 Jul 2024 18:52:27 -0700 Subject: [PATCH 05/23] resolving c++ linter [runtime/casting] is acceptable risk for this aximemorymap driver --- petalinux/aximemorymap/files/aximemorymap.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/petalinux/aximemorymap/files/aximemorymap.c b/petalinux/aximemorymap/files/aximemorymap.c index ab76304..41c5643 100644 --- a/petalinux/aximemorymap/files/aximemorymap.c +++ b/petalinux/aximemorymap/files/aximemorymap.c @@ -383,8 +383,8 @@ ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Write_Register: // Get register data from user space - if (!get_user(rData.address, &((struct DmaRegisterData __user *)arg)->address) && - !get_user(rData.data, &((struct DmaRegisterData __user *)arg)->data)) { + if (!get_user(rData.address, &((struct DmaRegisterData __user *)arg)->address) &&//NOLINT + !get_user(rData.data, &((struct DmaRegisterData __user *)arg)->data)) {//NOLINT // Find the memory base address for the register if ((base = Map_Find(rData.address)) != NULL) { // Write data to the register @@ -400,13 +400,13 @@ ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Read_Register: // Get register address from user space - if (!get_user(rData.address, &((struct DmaRegisterData __user *)arg)->address)) { + if (!get_user(rData.address, &((struct DmaRegisterData __user *)arg)->address)) {//NOLINT // Find the memory base address for the register if ((base = Map_Find(rData.address)) != NULL) { // Read data from the register rData.data = readl(base); // Put the updated register data back to user space - if (!put_user(rData.data, &((struct DmaRegisterData __user *)arg)->data)) { + if (!put_user(rData.data, &((struct DmaRegisterData __user *)arg)->data)) {//NOLINT ret = 0; // Success } else { pr_warn("%s: Dma_Read_Register: put_user failed.\n", MOD_NAME); From 01e31aaf93d8b27654f11cad4a31f10a7c6bbec3 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Fri, 5 Jul 2024 18:57:36 -0700 Subject: [PATCH 06/23] resolving c++ linter Add #include for YYY [build/include_what_you_use] --- common/driver/dma_buffer.c | 2 +- include/AxiVersion.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/common/driver/dma_buffer.c b/common/driver/dma_buffer.c index bb63b9d..b131a9f 100755 --- a/common/driver/dma_buffer.c +++ b/common/driver/dma_buffer.c @@ -570,7 +570,7 @@ void dmaRxBufferIrq(struct DmaDesc *desc, struct DmaBuffer *buff) { */ void dmaSortBuffers(struct DmaBufferList *list) { if (list->count > 0) - sort(list->sorted, list->count, sizeof(struct DmaBuffer *), dmaSortComp, NULL); + sort(list->sorted, list->count, sizeof(struct DmaBuffer *), dmaSortComp, NULL);//NOLINT } /** diff --git a/include/AxiVersion.h b/include/AxiVersion.h index 859ec60..e6d7c0f 100755 --- a/include/AxiVersion.h +++ b/include/AxiVersion.h @@ -59,7 +59,7 @@ struct AxiVersion { #ifndef DMA_IN_KERNEL // Everything below is hidden during kernel module compile #include - #include + #include //NOLINT #include #include #include From f80b26d566c8412a4c9d97c7786e86e913e35073 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Fri, 5 Jul 2024 18:58:44 -0700 Subject: [PATCH 07/23] adding CPPLINT.cfg --- CPPLINT.cfg | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 CPPLINT.cfg diff --git a/CPPLINT.cfg b/CPPLINT.cfg new file mode 100644 index 0000000..a7f8a32 --- /dev/null +++ b/CPPLINT.cfg @@ -0,0 +1,48 @@ +####################################################### +# CPPLINT.cfg +####################################################### + +# Increase the max number of characters on a given line +linelength=250 + +# List of filters to apply +filter=-legal/copyright + +# Disable the build/header_guard check +# Note changing header guard has wrong style +# E.g. from __ROGUE_UTILITIES_FILEIO_MODULE_H__ to INCLUDE_ROGUE_UTILITIES_MODULE_H_ +filter=-build/header_guard + +# Disable the readability/casting check +# Because we are using C code in the kernel driver (no C++) +filter=-readability/casting + +# Disable the runtime/int check +# Because linux kernel API sometimes need unsigned long types +# (e.g. include/linux/spinlock.h & typecheck(unsigned long, flags) macro) +filter=-runtime/int + +# Disable the runtime/threadsafe_fn check +# Because application rate testers are known to operation in unsafe thread mode +filter=-runtime/threadsafe_fn + +# Disable the build/include_subdir check +# Because headers are organized in same directory and C kernel driver code +filter=-build/include_subdir + +# TODO: Fix this in the future: +# Do not use namespace using-directives. Use using-declarations instead. [build/namespaces] +filter=-build/namespaces + +# TODO: Need to resolve these before pull request +filter=-whitespace/indent +filter=-whitespace/newline +filter=-whitespace/comma +filter=-whitespace/comments +filter=-whitespace/parens +filter=-whitespace/operators +filter=-whitespace/blank_line +filter=-whitespace/braces +filter=-whitespace/tab +filter=-whitespace/end_of_line +filter=-whitespace/empty_loop_body From 7c9ba91c89b0da6cbf026499f4a7b316cef83cfc Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Fri, 5 Jul 2024 19:03:09 -0700 Subject: [PATCH 08/23] adding C/C++ linter to CI workflow --- .github/workflows/aes_ci.yml | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/.github/workflows/aes_ci.yml b/.github/workflows/aes_ci.yml index dc82dfc..8b03e1d 100644 --- a/.github/workflows/aes_ci.yml +++ b/.github/workflows/aes_ci.yml @@ -16,10 +16,37 @@ name: Repo Integration on: [push] jobs: +# ---------------------------------------------------------------------------- + test_and_document: + name: Test And Generate Documentation + runs-on: ubuntu-22.04 + steps: + + # This step checks out a copy of your repository. + - uses: actions/checkout@v3 + with: + fetch-depth: 0 + + - uses: actions/setup-python@v4 + with: + python-version: 3.11 + + - name: Install dependencies + run: | + sudo apt-get update + sudo apt-get install python3 python3-pip + python -m pip install --upgrade pip + pip install cpplint + + # C/C++ Linter + - name: C/C++ Linter + run: | + find . -name '*.h' -o -name '*.cpp' -o -name '*.c' | xargs cpplint # ---------------------------------------------------------------------------- gen_release: + needs: [test_and_document] uses: slaclab/ruckus/.github/workflows/gen_release.yml@main with: version: '1.0.0' From 4835ca28e852a53a309c06d76bd80f5fa9e73029 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 07:59:57 -0700 Subject: [PATCH 09/23] resolving c++ linter Empty loop bodies should use {} or continue [whitespace/empty_loop_body] --- CPPLINT.cfg | 1 - data_dev/app/src/test.cpp | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index a7f8a32..2d7f48c 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -45,4 +45,3 @@ filter=-whitespace/blank_line filter=-whitespace/braces filter=-whitespace/tab filter=-whitespace/end_of_line -filter=-whitespace/empty_loop_body diff --git a/data_dev/app/src/test.cpp b/data_dev/app/src/test.cpp index 60578fe..f66a263 100644 --- a/data_dev/app/src/test.cpp +++ b/data_dev/app/src/test.cpp @@ -61,7 +61,7 @@ int main(int argc, char **argv) { // Perform DMA write operations do { - while ((ret = dmaWrite(s, txData, dmaSize, 0, 0)) == 0); + while ((ret = dmaWrite(s, txData, dmaSize, 0, 0)) == 0) {} if (ret < 0) { printf("DMA write error occurred\n"); From 2aadfbce3aefeed8c46a8df6a3ffa29ef7c2f291 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 08:03:43 -0700 Subject: [PATCH 10/23] resolving c++ linter Line ends in whitespace. Consider deleting these extra spaces. [whitespace/end_of_line] --- CPPLINT.cfg | 1 - common/driver/dma_buffer.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index 2d7f48c..d9c76fb 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -44,4 +44,3 @@ filter=-whitespace/operators filter=-whitespace/blank_line filter=-whitespace/braces filter=-whitespace/tab -filter=-whitespace/end_of_line diff --git a/common/driver/dma_buffer.c b/common/driver/dma_buffer.c index b131a9f..a415ea2 100755 --- a/common/driver/dma_buffer.c +++ b/common/driver/dma_buffer.c @@ -113,7 +113,7 @@ size_t dmaAllocBuffers ( struct DmaDevice *dev, struct DmaBufferList *list, buff->buffHandle = dma_map_single(list->dev->device, buff->buffAddr, list->dev->cfgSize, direction); // Check for mapping error if ( dma_mapping_error(list->dev->device,buff->buffHandle) ) { - // DMA mapping was successful + // DMA mapping was successful buff->buffHandle = 0; } else { // DMA mapping failed From 43b430626ae3f47dbeae316df56fce01902ebdc3 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 08:15:46 -0700 Subject: [PATCH 11/23] resolving c++ linter { should almost always be at the end of the previous line [whitespace/braces] --- CPPLINT.cfg | 2 -- common/driver/axis_gen2.c | 6 ++---- common/driver/dma_buffer.c | 9 +++------ common/driver/dma_common.c | 17 ++++++----------- common/driver/gpu_async.c | 11 ++++------- petalinux/axistreamdma/files/axistreamdma.c | 9 +++------ rce_memmap/driver/src/rce_map.c | 2 +- 7 files changed, 19 insertions(+), 37 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index d9c76fb..87ef8bd 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -42,5 +42,3 @@ filter=-whitespace/comments filter=-whitespace/parens filter=-whitespace/operators filter=-whitespace/blank_line -filter=-whitespace/braces -filter=-whitespace/tab diff --git a/common/driver/axis_gen2.c b/common/driver/axis_gen2.c index 75d2d95..5f0ed03 100755 --- a/common/driver/axis_gen2.c +++ b/common/driver/axis_gen2.c @@ -359,8 +359,7 @@ uint32_t AxisG2_Process (struct DmaDevice * dev, struct AxisG2Reg *reg, struct A * Return: * IRQ_HANDLED - Indicates that the interrupt was successfully handled. */ -irqreturn_t AxisG2_Irq(int irq, void *dev_id) -{ +irqreturn_t AxisG2_Irq(int irq, void *dev_id) { struct DmaDevice *dev; struct AxisG2Reg *reg; struct AxisG2Data *hwData; @@ -749,8 +748,7 @@ int32_t AxisG2_SendBuffer(struct DmaDevice *dev, struct DmaBuffer **buff, uint32 * Return: Status of the command execution. *--------------------------------------------------------------------------- */ -int32_t AxisG2_Command(struct DmaDevice *dev, uint32_t cmd, uint64_t arg) -{ +int32_t AxisG2_Command(struct DmaDevice *dev, uint32_t cmd, uint64_t arg) { struct AxisG2Reg *reg; reg = (struct AxisG2Reg *)dev->reg; diff --git a/common/driver/dma_buffer.c b/common/driver/dma_buffer.c index a415ea2..a2b0efb 100755 --- a/common/driver/dma_buffer.c +++ b/common/driver/dma_buffer.c @@ -679,8 +679,7 @@ size_t dmaQueueInit(struct DmaQueue *queue, uint32_t count) { * including the queue elements and the queue array itself. It resets the queue * count and sub-count to zero. */ -void dmaQueueFree(struct DmaQueue *queue) -{ +void dmaQueueFree(struct DmaQueue *queue) { uint32_t x; queue->count = 0; @@ -702,8 +701,7 @@ void dmaQueueFree(struct DmaQueue *queue) * comparing the read and write pointers. It is useful for deciding whether * data processing or retrieval operations are necessary. */ -uint32_t dmaQueueNotEmpty(struct DmaQueue *queue) -{ +uint32_t dmaQueueNotEmpty(struct DmaQueue *queue) { if (queue->read == queue->write) return 0; else @@ -724,8 +722,7 @@ uint32_t dmaQueueNotEmpty(struct DmaQueue *queue) * 1 on failure, indicating a buffer overflow or other issue preventing * the entry from being added to the queue. */ -uint32_t dmaQueuePush(struct DmaQueue *queue, struct DmaBuffer *entry) -{ +uint32_t dmaQueuePush(struct DmaQueue *queue, struct DmaBuffer *entry) { unsigned long iflags; uint32_t next; uint32_t ret; diff --git a/common/driver/dma_common.c b/common/driver/dma_common.c index 2072517..ef56ef1 100755 --- a/common/driver/dma_common.c +++ b/common/driver/dma_common.c @@ -271,7 +271,7 @@ int Dma_Init(struct DmaDevice *dev) { } // Remap the I/O register block for safe access - if ( Dma_MapReg(dev) < 0 ){ + if ( Dma_MapReg(dev) < 0 ) { dev_err(dev->device,"Init: Failed to map register block.\n"); goto cleanup_proc_create_data; } @@ -585,8 +585,7 @@ int Dma_Release(struct inode *inode, struct file *filp) { * * Return: The number of read structures on success or an error code on failure. */ -ssize_t Dma_Read(struct file *filp, char *buffer, size_t count, loff_t *f_pos) -{ +ssize_t Dma_Read(struct file *filp, char *buffer, size_t count, loff_t *f_pos) { struct DmaBuffer **buff; struct DmaReadData *rd; void *dp; @@ -693,8 +692,7 @@ ssize_t Dma_Read(struct file *filp, char *buffer, size_t count, loff_t *f_pos) * * Return: Number of bytes written on success, negative error code on failure. */ -ssize_t Dma_Write(struct file *filp, const char *buffer, size_t count, loff_t *f_pos) -{ +ssize_t Dma_Write(struct file *filp, const char *buffer, size_t count, loff_t *f_pos) { ssize_t ret; ssize_t res; void *dp; @@ -1107,8 +1105,7 @@ uint32_t Dma_Poll(struct file *filp, poll_table *wait) { * * Return: 0 on success, negative error code on failure. */ -int Dma_Mmap(struct file *filp, struct vm_area_struct *vma) -{ +int Dma_Mmap(struct file *filp, struct vm_area_struct *vma) { struct DmaDesc *desc; struct DmaDevice *dev; struct DmaBuffer *buff; @@ -1492,8 +1489,7 @@ int Dma_SetMaskBytes(struct DmaDevice *dev, struct DmaDesc *desc, uint8_t *mask) * * Return: 0 on success, or -1 on failure. */ -int32_t Dma_WriteRegister(struct DmaDevice *dev, uint64_t arg) -{ +int32_t Dma_WriteRegister(struct DmaDevice *dev, uint64_t arg) { int32_t ret; struct DmaRegisterData rData; @@ -1529,8 +1525,7 @@ int32_t Dma_WriteRegister(struct DmaDevice *dev, uint64_t arg) * * Return: 0 on success, -1 on failure. */ -int32_t Dma_ReadRegister(struct DmaDevice *dev, uint64_t arg) -{ +int32_t Dma_ReadRegister(struct DmaDevice *dev, uint64_t arg) { int32_t ret; struct DmaRegisterData rData; diff --git a/common/driver/gpu_async.c b/common/driver/gpu_async.c index dd1235f..fee811e 100755 --- a/common/driver/gpu_async.c +++ b/common/driver/gpu_async.c @@ -34,8 +34,7 @@ * it, and associates it with the given DmaDevice. It sets up * the base address for GPU operations and initializes buffer counts. */ -void Gpu_Init(struct DmaDevice *dev, uint32_t offset) -{ +void Gpu_Init(struct DmaDevice *dev, uint32_t offset) { struct GpuData *gpuData; /* Allocate memory for GPU utility data */ @@ -64,8 +63,7 @@ void Gpu_Init(struct DmaDevice *dev, uint32_t offset) * * Return: 0 on success, -1 on error. */ -int32_t Gpu_Command(struct DmaDevice *dev, uint32_t cmd, uint64_t arg) -{ +int32_t Gpu_Command(struct DmaDevice *dev, uint32_t cmd, uint64_t arg) { switch (cmd) { // Add NVIDIA Memory case GPU_Add_Nvidia_Memory: @@ -163,7 +161,7 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { buffer->dmaMapping->dma_addresses[0], mapSize, x); // Update buffer count and write DMA addresses to device - if (buffer->write){ + if (buffer->write) { writel(buffer->dmaMapping->dma_addresses[0] & 0xFFFFFFFF, data->base+0x100+data->writeBuffers.count*16); writel((buffer->dmaMapping->dma_addresses[0] >> 32) & 0xFFFFFFFF, data->base+0x104+data->writeBuffers.count*16); writel(mapSize,data->base+0x108+data->writeBuffers.count*16); @@ -208,8 +206,7 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { * * Return: Always returns 0 indicating success. */ -int32_t Gpu_RemNvidia(struct DmaDevice *dev, uint64_t arg) -{ +int32_t Gpu_RemNvidia(struct DmaDevice *dev, uint64_t arg) { uint32_t x; u64 virt_start; diff --git a/petalinux/axistreamdma/files/axistreamdma.c b/petalinux/axistreamdma/files/axistreamdma.c index 9d7fffc..664319b 100755 --- a/petalinux/axistreamdma/files/axistreamdma.c +++ b/petalinux/axistreamdma/files/axistreamdma.c @@ -94,8 +94,7 @@ MODULE_LICENSE("GPL"); ///< Module license * @dev: Device structure representing the DMA device. * @return: Always returns 0, indicating success. */ -static int Rce_runtime_suspend(struct device *dev) -{ +static int Rce_runtime_suspend(struct device *dev) { // Currently, there are no device-specific suspend actions required. // Placeholder for implementing suspend logic specific to the device. return 0; @@ -114,8 +113,7 @@ static int Rce_runtime_suspend(struct device *dev) * @dev: Device structure representing the DMA device. * @return: Always returns 0, indicating success. */ -static int Rce_runtime_resume(struct device *dev) -{ +static int Rce_runtime_resume(struct device *dev) { // Currently, no device-specific resume actions are required. // Placeholder for future implementation of resume logic specific to the device. return 0; @@ -297,8 +295,7 @@ int Rce_Probe(struct platform_device *pdev) { * @pdev: Platform device structure representing the DMA device. * @return: Returns 0 on successful cleanup, -1 if no matching device is found. */ -int Rce_Remove(struct platform_device *pdev) -{ +int Rce_Remove(struct platform_device *pdev) { int32_t x; const char *tmpName; int32_t tmpIdx; diff --git a/rce_memmap/driver/src/rce_map.c b/rce_memmap/driver/src/rce_map.c index 5f50642..dfbc835 100755 --- a/rce_memmap/driver/src/rce_map.c +++ b/rce_memmap/driver/src/rce_map.c @@ -62,7 +62,7 @@ struct file_operations MapFunctions = { }; // Devnode callback to set permissions of created devices -char *Map_DevNode(struct device *dev, umode_t *mode){ +char *Map_DevNode(struct device *dev, umode_t *mode) { if ( mode != NULL ) *mode = 0666; return(NULL); } From 8607dff019dc8281ed7c08563b7a9adcb96e0c62 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 08:27:47 -0700 Subject: [PATCH 12/23] resolving c++ linter Redundant blank line at the start of a code block should be deleted. [whitespace/blank_line] --- CPPLINT.cfg | 1 - common/driver/axis_gen2.c | 2 -- common/driver/dma_buffer.c | 2 -- common/driver/dma_common.c | 5 ----- common/driver/dma_common.h | 2 -- common/driver/gpu_async.c | 1 - rce_memmap/driver/src/rce_map.c | 5 ----- rce_memmap/driver/src/rce_map.h | 2 -- rce_stream/app/src/dmaLoopTest.cpp | 6 ------ rce_stream/app/src/dmaRead.cpp | 2 -- rce_stream/app/src/dmaWrite.cpp | 2 -- rce_stream/driver/src/axis_gen1.c | 7 ------- 12 files changed, 37 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index 87ef8bd..3c15f58 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -41,4 +41,3 @@ filter=-whitespace/comma filter=-whitespace/comments filter=-whitespace/parens filter=-whitespace/operators -filter=-whitespace/blank_line diff --git a/common/driver/axis_gen2.c b/common/driver/axis_gen2.c index 5f0ed03..b82a2d3 100755 --- a/common/driver/axis_gen2.c +++ b/common/driver/axis_gen2.c @@ -242,7 +242,6 @@ uint32_t AxisG2_Process (struct DmaDevice * dev, struct AxisG2Reg *reg, struct A // Attempt to find buffer in tx pool and return. otherwise return rx entry to hw. // Must adjust counters here and check for buffer need if ((buff = dmaRetBufferIdxIrq (dev,ret.index)) != NULL) { - // Add to receive/write software queue if ( hwData->hwWrBuffCnt >= (hwData->addrCount-1) ) { dmaQueuePushIrq(&(hwData->wrQueue),buff); @@ -753,7 +752,6 @@ int32_t AxisG2_Command(struct DmaDevice *dev, uint32_t cmd, uint64_t arg) { reg = (struct AxisG2Reg *)dev->reg; switch (cmd) { - case AXIS_Read_Ack: // Lock the device command execution context spin_lock(&dev->commandLock); diff --git a/common/driver/dma_buffer.c b/common/driver/dma_buffer.c index a2b0efb..165aee2 100755 --- a/common/driver/dma_buffer.c +++ b/common/driver/dma_buffer.c @@ -194,7 +194,6 @@ void dmaFreeBuffersList(struct DmaBufferList *list) { sli = x % BUFFERS_PER_LIST; if (list->indexed[sl][sli]->buffAddr != NULL) { - // Free coherent buffer if (list->dev->cfgMode & BUFF_COHERENT) { dma_free_coherent(list->dev->device, list->dev->cfgSize, @@ -915,7 +914,6 @@ struct DmaBuffer * dmaQueuePop ( struct DmaQueue *queue ) { if ( queue->read == queue->write ) { ret = NULL; } else { - ret = queue->queue[queue->read / BUFFERS_PER_LIST][queue->read % BUFFERS_PER_LIST]; // Increment read pointer safely within queue bounds diff --git a/common/driver/dma_common.c b/common/driver/dma_common.c index ef56ef1..f399499 100755 --- a/common/driver/dma_common.c +++ b/common/driver/dma_common.c @@ -214,7 +214,6 @@ int Dma_MapReg(struct DmaDevice *dev) { * Returns 0 on success, or a negative error code on failure. */ int Dma_Init(struct DmaDevice *dev) { - int32_t x; int32_t res; uint64_t tot; @@ -812,7 +811,6 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { // Determine command switch (cmd & 0xFFFF) { - // Get buffer count case DMA_Get_Buff_Count: return dev->rxBuffers.count + dev->txBuffers.count; @@ -970,10 +968,8 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { bCnt = 0; for (x=0; x < cnt; x++) { - // Attempt to find buffer in RX list if ( (buff = dmaGetBufferList(&(dev->rxBuffers),indexes[x])) != NULL ) { - // Only return if owned by current desc if ( buff->userHas == desc ) { buff->userHas = NULL; @@ -982,7 +978,6 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { // Attempt to find in tx list } else if ( (buff = dmaGetBufferList(&(dev->txBuffers),indexes[x])) != NULL ) { - // Only return if owned by current desc if ( buff->userHas == desc ) { buff->userHas = NULL; diff --git a/common/driver/dma_common.h b/common/driver/dma_common.h index 34ccb86..f9c886f 100755 --- a/common/driver/dma_common.h +++ b/common/driver/dma_common.h @@ -79,7 +79,6 @@ struct DmaDesc; */ struct DmaDevice { - // PCI address regions phys_addr_t baseAddr; uint32_t baseSize; @@ -152,7 +151,6 @@ struct DmaDevice { * DMA transfers for a specific destination or set of destinations. */ struct DmaDesc { - // Mask of destinations uint8_t destMask[DMA_MASK_SIZE]; diff --git a/common/driver/gpu_async.c b/common/driver/gpu_async.c index fee811e..0b4cee2 100755 --- a/common/driver/gpu_async.c +++ b/common/driver/gpu_async.c @@ -148,7 +148,6 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { dev_warn(dev->device,"Gpu_AddNvidia: error mapping page tables ret=%i\n",ret); } else { - // Determine how much memory is contiguous mapSize = 0; for (x=0; x < buffer->dmaMapping->entries; x++) { diff --git a/rce_memmap/driver/src/rce_map.c b/rce_memmap/driver/src/rce_map.c index dfbc835..e79c13f 100755 --- a/rce_memmap/driver/src/rce_map.c +++ b/rce_memmap/driver/src/rce_map.c @@ -175,7 +175,6 @@ int Map_Release(struct inode *inode, struct file *filp) { // Find or allocate map space uint8_t * Map_Find(uint32_t addr) { - struct MemMap *cur; struct MemMap *new; @@ -187,14 +186,12 @@ uint8_t * Map_Find(uint32_t addr) { } while (cur != NULL) { - // Current pointer matches if ( (addr >= cur->addr) && (addr < (cur->addr + MAP_SIZE)) ) return((uint8_t*)(cur->base + (addr-cur->addr))); // Next address is too high, insert new structure if ( (cur->next == NULL) || (addr < ((struct MemMap *)cur->next)->addr) ) { - // Create new map if ( (new = (struct MemMap *)kmalloc(sizeof(struct MemMap),GFP_KERNEL)) == NULL ) { printk(KERN_ERR MOD_NAME " Map_Find: Could not allocate map memory\n"); @@ -226,7 +223,6 @@ uint8_t * Map_Find(uint32_t addr) { cur->next = new; } cur = cur->next; - } return(NULL); @@ -240,7 +236,6 @@ ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { // Determine command switch (cmd) { - // Get API Version case DMA_Get_Version: return(DMA_VERSION); diff --git a/rce_memmap/driver/src/rce_map.h b/rce_memmap/driver/src/rce_map.h index 18feafc..7d04be7 100755 --- a/rce_memmap/driver/src/rce_map.h +++ b/rce_memmap/driver/src/rce_map.h @@ -41,7 +41,6 @@ struct MemMap { // Map structure struct MapDevice { - // Device tracking uint32_t major; dev_t devNum; @@ -49,7 +48,6 @@ struct MapDevice { struct cdev charDev; struct device * device; struct MemMap * maps; - }; char *Map_DevNode(struct device *dev, umode_t *mode); diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index 8ae1d3a..f77501f 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -150,7 +150,6 @@ void *runWrite ( void *t ) { while (txData->enable) { - // Setup fds for select call FD_ZERO(&fds); FD_SET(fd,&fds); @@ -160,7 +159,6 @@ void *runWrite ( void *t ) { timeout.tv_usec=100; ret = select(fd+1,NULL,&fds,NULL,&timeout); if ( ret != 0 ) { - if ( txData->idxEn ) { dmaIndex = dmaGetIndex(fd); if ( dmaIndex < 0 ) continue; @@ -260,7 +258,6 @@ void *runRead ( void *t ) { printf("Starting read thread. Dest=%i, Size=%i\n",rxData->dest,rxData->size); while (rxData->enable) { - // Setup fds for select call FD_ZERO(&fds); FD_SET(fd,&fds); @@ -270,7 +267,6 @@ void *runRead ( void *t ) { timeout.tv_usec=100; ret = select(fd+1,&fds,NULL,NULL,&timeout); if ( ret != 0 ) { - if ( idxEn ) { ret = dmaReadIndex(fd,&dmaIndex,&rxFlags,NULL,&rxDest); data = dmaBuffers[dmaIndex]; @@ -282,7 +278,6 @@ void *runRead ( void *t ) { rxLuser = axisGetLuser(rxFlags); if ( ret != 0 ) { - // data if ( (rxData->prbEn) && (! prbs.processData(data,ret)) ) { rxData->prbErr++; @@ -489,4 +484,3 @@ int main (int argc, char **argv) { return(0); } - diff --git a/rce_stream/app/src/dmaRead.cpp b/rce_stream/app/src/dmaRead.cpp index f51433f..749ee77 100644 --- a/rce_stream/app/src/dmaRead.cpp +++ b/rce_stream/app/src/dmaRead.cpp @@ -137,7 +137,6 @@ int main (int argc, char **argv) { count = 0; prbRes = 0; do { - // Setup fds for select call FD_ZERO(&fds); FD_SET(s,&fds); @@ -151,7 +150,6 @@ int main (int argc, char **argv) { if ( ret <= 0 ) { printf("Read timeout\n"); } else { - // DMA Read if ( args.idxEn ) { ret = dmaReadIndex(s,&dmaIndex,&rxFlags,NULL,&rxDest); diff --git a/rce_stream/app/src/dmaWrite.cpp b/rce_stream/app/src/dmaWrite.cpp index 3ab02fb..7b696d7 100644 --- a/rce_stream/app/src/dmaWrite.cpp +++ b/rce_stream/app/src/dmaWrite.cpp @@ -131,7 +131,6 @@ int main (int argc, char **argv) { prbValid = false; count = 0; do { - // Setup fds for select call FD_ZERO(&fds); FD_SET(s,&fds); @@ -145,7 +144,6 @@ int main (int argc, char **argv) { if ( ret <= 0 ) { printf("Write timeout\n"); } else { - if ( args.idxEn ) { dmaIndex = dmaGetIndex(s); if ( dmaIndex < 0 ) continue; diff --git a/rce_stream/driver/src/axis_gen1.c b/rce_stream/driver/src/axis_gen1.c index 136ab75..a7314d1 100755 --- a/rce_stream/driver/src/axis_gen1.c +++ b/rce_stream/driver/src/axis_gen1.c @@ -53,7 +53,6 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Read IRQ Status if ( ioread32(&(reg->intPendAck)) != 0 ) { - // Ack interrupt iowrite32(0x1,&(reg->intPendAck)); @@ -62,10 +61,8 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Read from FIFOs while ( (stat = ioread32(&(reg->fifoValid))) != 0 ) { - // Transmit return if ( (stat & 0x2) != 0 ) { - // Read handle if (((handle = ioread32(&(reg->txFree))) & 0x80000000) != 0 ) { handle &= 0x7FFFFFFC; @@ -82,7 +79,6 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Receive data if ( (stat & 0x1) != 0 ) { - // Read handle while (((handle = ioread32(&(reg->rxPend))) & 0x80000000) != 0 ) { handle &= 0x7FFFFFFC; @@ -112,7 +108,6 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Find RX buffer entry if ((buff = dmaFindBufferList (&(dev->rxBuffers),handle)) != NULL) { - // Extract data from descriptor buff->count++; buff->size = size; @@ -265,7 +260,6 @@ int32_t AxisG1_SendBuffer(struct DmaDevice *dev, struct DmaBuffer **buff, uint32 reg = (struct AxisG1Reg *)dev->reg; for (x=0; x < count; x++) { - // Create descriptor control = (buff[x]->dest ) & 0x000000FF; control += (buff[x]->flags << 8) & 0x00FFFF00; // flags[15:9] = luser, flags[7:0] = fuser @@ -294,7 +288,6 @@ int32_t AxisG1_Command(struct DmaDevice *dev, uint32_t cmd, uint64_t arg) { reg = (struct AxisG1Reg *)dev->reg; switch (cmd) { - // Read ACK case AXIS_Read_Ack: spin_lock(&dev->commandLock); From c9a32e1e029326dacdd251678b6cf5c23f07fc5b Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 08:38:45 -0700 Subject: [PATCH 13/23] resolving c++ linter Missing spaces around XXX [whitespace/operators] --- CPPLINT.cfg | 1 - common/driver/dma_common.c | 8 ++++++-- rce_memmap/driver/src/rce_map.c | 4 ++-- rce_stream/app/src/dmaLoopTest.cpp | 16 ++++++++-------- rce_stream/app/src/dmaRead.cpp | 4 ++-- rce_stream/app/src/dmaWrite.cpp | 7 +++---- rce_stream/driver/src/rce_top.c | 2 +- 7 files changed, 22 insertions(+), 20 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index 3c15f58..d0408aa 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -40,4 +40,3 @@ filter=-whitespace/newline filter=-whitespace/comma filter=-whitespace/comments filter=-whitespace/parens -filter=-whitespace/operators diff --git a/common/driver/dma_common.c b/common/driver/dma_common.c index f399499..1fb4b7f 100755 --- a/common/driver/dma_common.c +++ b/common/driver/dma_common.c @@ -866,7 +866,9 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { miss = 0; for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { buff = dmaGetBufferList(&(dev->rxBuffers),x); - if ( (buff->userHas==NULL) && (buff->inHw==0) && (buff->inQ==0) ) miss++; + if ((buff->userHas == NULL) && (buff->inHw == 0) && (buff->inQ == 0)) { + miss++; + } } return miss; break; @@ -921,7 +923,9 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { miss = 0; for (x=dev->txBuffers.baseIdx; x < (dev->txBuffers.baseIdx + dev->txBuffers.count); x++) { buff = dmaGetBufferList(&(dev->txBuffers),x); - if ( (buff->userHas==NULL) && (buff->inHw==0) && (buff->inQ==0) ) miss++; + if ((buff->userHas == NULL) && (buff->inHw == 0) && (buff->inQ == 0)) { + miss++; + } } return miss; break; diff --git a/rce_memmap/driver/src/rce_map.c b/rce_memmap/driver/src/rce_map.c index e79c13f..187803b 100755 --- a/rce_memmap/driver/src/rce_map.c +++ b/rce_memmap/driver/src/rce_map.c @@ -118,7 +118,7 @@ int Map_Init(void) { // Map space dev.maps->base = ioremap_wc(dev.maps->addr, MAP_SIZE); - if (! dev.maps->base ) { + if (!dev.maps->base ) { printk(KERN_ERR MOD_NAME " Init: Could not map memory addr %p with size 0x%x.\n",(void *)dev.maps->addr,MAP_SIZE); kfree(dev.maps); return (-1); @@ -203,7 +203,7 @@ uint8_t * Map_Find(uint32_t addr) { // Map space new->base = ioremap_wc(new->addr, MAP_SIZE); - if (! new->base ) { + if (!new->base) { printk(KERN_ERR MOD_NAME " Map_Find: Could not map memory addr %p (%p) with size 0x%x.\n",(void *)new->addr,(void*)addr,MAP_SIZE); kfree(new); return (NULL); diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index f77501f..9674178 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -155,8 +155,8 @@ void *runWrite ( void *t ) { FD_SET(fd,&fds); // Wait for write ready - timeout.tv_sec=0; - timeout.tv_usec=100; + timeout.tv_sec = 0; + timeout.tv_usec = 100; ret = select(fd+1,NULL,&fds,NULL,&timeout); if ( ret != 0 ) { if ( txData->idxEn ) { @@ -166,7 +166,7 @@ void *runWrite ( void *t ) { } // Gen data - if ( txData->prbEn && ! prbValid ) { + if ( txData->prbEn && !prbValid ) { prbs.genData(data,txData->size); prbValid = true; } @@ -263,8 +263,8 @@ void *runRead ( void *t ) { FD_SET(fd,&fds); // Wait for read ready - timeout.tv_sec=0; - timeout.tv_usec=100; + timeout.tv_sec = 0; + timeout.tv_usec = 100; ret = select(fd+1,&fds,NULL,NULL,&timeout); if ( ret != 0 ) { if ( idxEn ) { @@ -279,7 +279,7 @@ void *runRead ( void *t ) { if ( ret != 0 ) { // data - if ( (rxData->prbEn) && (! prbs.processData(data,ret)) ) { + if ( (rxData->prbEn) && (!prbs.processData(data,ret)) ) { rxData->prbErr++; printf("Prbs mismatch. count=%lu, dest=%i, index=%i\n",rxData->count,rxData->dest,dmaIndex); } @@ -441,7 +441,7 @@ int main (int argc, char **argv) { printf("\nRxBytes:"); for (x=0; x < dCount; x++) printf(" %15lu",rxData[x]->total); - if ( ! args.prbsDis ) { + if ( !args.prbsDis ) { printf("\n PrbErr:"); for (x=0; x < dCount; x++) printf(" %15lu",rxData[x]->prbErr); } @@ -464,7 +464,7 @@ int main (int argc, char **argv) { printf(" TotTx: %15lu\n",totTx); printf(" TotRx: %15lu\n",totRx); printf("TotFreq: %15lu\n",totRxFreq); - if ( ! args.prbsDis ) printf(" PrbErr: %15lu\n",totPrb); + if ( !args.prbsDis ) printf(" PrbErr: %15lu\n",totPrb); printf("TotRate: %15e\n",totRxRate); l_tme = c_tme; } diff --git a/rce_stream/app/src/dmaRead.cpp b/rce_stream/app/src/dmaRead.cpp index 749ee77..d5dc38d 100644 --- a/rce_stream/app/src/dmaRead.cpp +++ b/rce_stream/app/src/dmaRead.cpp @@ -142,8 +142,8 @@ int main (int argc, char **argv) { FD_SET(s,&fds); // Setup select timeout for 1 second - timeout.tv_sec=2; - timeout.tv_usec=0; + timeout.tv_sec = 2; + timeout.tv_usec = 0; // Wait for Socket data ready ret = select(s+1,&fds,NULL,NULL,&timeout); diff --git a/rce_stream/app/src/dmaWrite.cpp b/rce_stream/app/src/dmaWrite.cpp index 7b696d7..62b028b 100644 --- a/rce_stream/app/src/dmaWrite.cpp +++ b/rce_stream/app/src/dmaWrite.cpp @@ -136,8 +136,8 @@ int main (int argc, char **argv) { FD_SET(s,&fds); // Setup select timeout for 1 second - timeout.tv_sec=2; - timeout.tv_usec=0; + timeout.tv_sec = 2; + timeout.tv_usec = 0; // Wait for Socket data ready ret = select(s+1,NULL,&fds,NULL,&timeout); @@ -151,7 +151,7 @@ int main (int argc, char **argv) { } // Gen data - if ( args.prbsDis == 0 && ! prbValid ) { + if ( args.prbsDis == 0 && !prbValid ) { prbs.genData(txData,args.size); prbValid = true; } @@ -183,4 +183,3 @@ int main (int argc, char **argv) { close(s); return(0); } - diff --git a/rce_stream/driver/src/rce_top.c b/rce_stream/driver/src/rce_top.c index ec09e56..feafc4b 100755 --- a/rce_stream/driver/src/rce_top.c +++ b/rce_stream/driver/src/rce_top.c @@ -194,7 +194,7 @@ int Rce_Probe(struct platform_device *pdev) { // Coherent /* not available on arm64 */ -#if ! defined( __aarch64__) +#if !defined( __aarch64__) if( (dev->cfgMode & BUFF_ARM_ACP) || (dev->cfgMode & AXIS2_RING_ACP) ) { set_dma_ops(&pdev->dev,&arm_coherent_dma_ops); dev_info(dev->device,"Probe: Set COHERENT DMA =%i\n",dev->cfgMode); From d8a707bc6741d380b5c62bdd8df984848c9bb019 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 09:07:46 -0700 Subject: [PATCH 14/23] resolving c++ linter Extra space after ( in XXXX call [whitespace/parens] --- CPPLINT.cfg | 1 - common/driver/axis_gen2.c | 12 ++++++------ common/driver/axis_gen2.h | 14 +++++++------- common/driver/dma_buffer.c | 10 +++++----- common/driver/dma_common.c | 8 ++++---- common/driver/dma_common.h | 6 +++--- common/driver/gpu_async.c | 4 ++-- data_dev/app/src/dmaRate.cpp | 2 +- data_dev/driver/src/data_dev_top.c | 4 ++-- data_gpu/driver/src/data_gpu_top.c | 4 ++-- rce_memmap/driver/src/rce_map.c | 2 +- rce_stream/app/src/dmaLoopTest.cpp | 24 ++++++++++++------------ rce_stream/app/src/dmaRead.cpp | 8 ++++---- rce_stream/app/src/dmaSetDebug.cpp | 6 +++--- rce_stream/app/src/dmaWrite.cpp | 8 ++++---- rce_stream/driver/src/axis_gen1.c | 12 ++++++------ rce_stream/driver/src/rce_top.c | 2 +- 17 files changed, 63 insertions(+), 64 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index d0408aa..dd59e08 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -39,4 +39,3 @@ filter=-whitespace/indent filter=-whitespace/newline filter=-whitespace/comma filter=-whitespace/comments -filter=-whitespace/parens diff --git a/common/driver/axis_gen2.c b/common/driver/axis_gen2.c index b82a2d3..ca0145f 100755 --- a/common/driver/axis_gen2.c +++ b/common/driver/axis_gen2.c @@ -67,7 +67,7 @@ struct hardware_functions AxisG2_functions = { * * Return: Status of the mapping (0 for failure, 1 for success). */ -inline uint8_t AxisG2_MapReturn ( struct DmaDevice * dev, struct AxisG2Return *ret, uint32_t desc128En, uint32_t index, uint32_t *ring) { +inline uint8_t AxisG2_MapReturn(struct DmaDevice * dev, struct AxisG2Return *ret, uint32_t desc128En, uint32_t index, uint32_t *ring) { uint32_t * ptr; uint32_t chan; uint32_t dest; @@ -124,7 +124,7 @@ inline uint8_t AxisG2_MapReturn ( struct DmaDevice * dev, struct AxisG2Return *r * of free buffers. It writes the buffer index and, if enabled, the buffer handle * to the device's write FIFOs to mark the buffer as free. */ -inline void AxisG2_WriteFree ( struct DmaBuffer *buff, struct AxisG2Reg *reg, uint32_t desc128En ) { +inline void AxisG2_WriteFree(struct DmaBuffer *buff, struct AxisG2Reg *reg, uint32_t desc128En) { uint32_t wrData[2]; // Mask the buffer index to fit within the 28-bit field @@ -219,7 +219,7 @@ inline void AxisG2_WriteTx(struct DmaBuffer *buff, struct AxisG2Reg *reg, uint32 * * Returns: Number of processed items */ -uint32_t AxisG2_Process (struct DmaDevice * dev, struct AxisG2Reg *reg, struct AxisG2Data *hwData ) { +uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct AxisG2Data *hwData) { struct DmaDesc *desc; struct DmaBuffer *buff; struct AxisG2Return ret; @@ -241,7 +241,7 @@ uint32_t AxisG2_Process (struct DmaDevice * dev, struct AxisG2Reg *reg, struct A // Attempt to find buffer in tx pool and return. otherwise return rx entry to hw. // Must adjust counters here and check for buffer need - if ((buff = dmaRetBufferIdxIrq (dev,ret.index)) != NULL) { + if ((buff = dmaRetBufferIdxIrq(dev,ret.index)) != NULL) { // Add to receive/write software queue if ( hwData->hwWrBuffCnt >= (hwData->addrCount-1) ) { dmaQueuePushIrq(&(hwData->wrQueue),buff); @@ -340,7 +340,7 @@ uint32_t AxisG2_Process (struct DmaDevice * dev, struct AxisG2Reg *reg, struct A AxisG2_WriteFree(hwData->buffList[x],reg,hwData->desc128En); ++hwData->hwWrBuffCnt; } - } while(bCnt > 0); + } while (bCnt > 0); } return handleCount; @@ -430,7 +430,7 @@ void AxisG2_Init(struct DmaDevice *dev) { size = hwData->addrCount*(hwData->desc128En?16:8); // Allocate DMA buffers based on configuration mode - if(dev->cfgMode & AXIS2_RING_ACP) { + if (dev->cfgMode & AXIS2_RING_ACP) { // Allocate read and write buffers in contiguous physical memory hwData->readAddr = kzalloc(size, GFP_DMA | GFP_KERNEL); hwData->readHandle = virt_to_phys(hwData->readAddr); diff --git a/common/driver/axis_gen2.h b/common/driver/axis_gen2.h index 8fb5a9d..c7894fd 100755 --- a/common/driver/axis_gen2.h +++ b/common/driver/axis_gen2.h @@ -210,10 +210,10 @@ struct AxisG2Data { }; // Function prototypes -inline uint8_t AxisG2_MapReturn ( struct DmaDevice *dev, struct AxisG2Return *ret, uint32_t desc128En, uint32_t index, uint32_t *ring); -inline void AxisG2_WriteFree ( struct DmaBuffer *buff, struct AxisG2Reg *reg, uint32_t desc128En ); -inline void AxisG2_WriteTx ( struct DmaBuffer *buff, struct AxisG2Reg *reg, uint32_t desc128En ); -uint32_t AxisG2_Process (struct DmaDevice * dev, struct AxisG2Reg *reg, struct AxisG2Data *hwData ); +inline uint8_t AxisG2_MapReturn(struct DmaDevice *dev, struct AxisG2Return *ret, uint32_t desc128En, uint32_t index, uint32_t *ring); +inline void AxisG2_WriteFree(struct DmaBuffer *buff, struct AxisG2Reg *reg, uint32_t desc128En); +inline void AxisG2_WriteTx(struct DmaBuffer *buff, struct AxisG2Reg *reg, uint32_t desc128En); +uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct AxisG2Data *hwData); irqreturn_t AxisG2_Irq(int irq, void *dev_id); void AxisG2_Init(struct DmaDevice *dev); void AxisG2_Enable(struct DmaDevice *dev); @@ -223,8 +223,8 @@ int32_t AxisG2_SendBuffer(struct DmaDevice *dev, struct DmaBuffer **buff, uint32 int32_t AxisG2_Command(struct DmaDevice *dev, uint32_t cmd, uint64_t arg); void AxisG2_SeqShow(struct seq_file *s, struct DmaDevice *dev); extern struct hardware_functions AxisG2_functions; -void AxisG2_WqTask_IrqForce ( struct work_struct *work ); -void AxisG2_WqTask_Poll ( struct work_struct *work ); -void AxisG2_WqTask_Service ( struct work_struct *work ); +void AxisG2_WqTask_IrqForce(struct work_struct *work); +void AxisG2_WqTask_Poll(struct work_struct *work); +void AxisG2_WqTask_Service(struct work_struct *work); #endif // __AXIS_GEN2_H__ diff --git a/common/driver/dma_buffer.c b/common/driver/dma_buffer.c index 165aee2..b64f893 100755 --- a/common/driver/dma_buffer.c +++ b/common/driver/dma_buffer.c @@ -45,7 +45,7 @@ * * Return: the count of successfully allocated buffers, or 0 on failure. */ -size_t dmaAllocBuffers ( struct DmaDevice *dev, struct DmaBufferList *list, +size_t dmaAllocBuffers(struct DmaDevice *dev, struct DmaBufferList *list, uint32_t count, uint32_t baseIdx, enum dma_data_direction direction) { uint32_t x; uint32_t sl; @@ -66,7 +66,7 @@ size_t dmaAllocBuffers ( struct DmaDevice *dev, struct DmaBufferList *list, if ( count == 0 ) return 0; // Allocate first level pointers - if ((list->indexed = (struct DmaBuffer ***) kzalloc(sizeof(struct DmaBuffer**) * list->subCount, GFP_KERNEL)) == NULL ) { + if ((list->indexed = (struct DmaBuffer ***)kzalloc(sizeof(struct DmaBuffer**) * list->subCount, GFP_KERNEL)) == NULL) { dev_err(dev->device,"dmaAllocBuffers: Failed to allocate indexed list pointer. Count=%u.\n",list->subCount); goto cleanup_forced_exit; } @@ -89,7 +89,7 @@ size_t dmaAllocBuffers ( struct DmaDevice *dev, struct DmaBufferList *list, for (x=0; x < count; x++) { sl = x / BUFFERS_PER_LIST; sli = x % BUFFERS_PER_LIST; - if ( (buff = (struct DmaBuffer *) kzalloc(sizeof(struct DmaBuffer), GFP_KERNEL)) == NULL) { + if ((buff = (struct DmaBuffer *)kzalloc(sizeof(struct DmaBuffer), GFP_KERNEL)) == NULL) { dev_err(dev->device,"dmaAllocBuffers: Failed to create buffer structure index %ui. Unloading.\n",x); goto cleanup_buffers; } @@ -139,7 +139,7 @@ size_t dmaAllocBuffers ( struct DmaDevice *dev, struct DmaBufferList *list, } // Alloc or mapping failed - if ( buff->buffAddr == NULL || buff->buffHandle == 0) { + if (buff->buffAddr == NULL || buff->buffHandle == 0) { dev_err(dev->device,"dmaAllocBuffers: Failed to create stream buffer and dma mapping.\n"); goto cleanup_buffers; } @@ -905,7 +905,7 @@ uint32_t dmaQueuePushListIrq(struct DmaQueue *queue, struct DmaBuffer **buff, si * * Return: A pointer to a DmaBuffer if available; NULL if the queue is empty. */ -struct DmaBuffer * dmaQueuePop ( struct DmaQueue *queue ) { +struct DmaBuffer * dmaQueuePop(struct DmaQueue *queue ) { unsigned long iflags; struct DmaBuffer * ret; diff --git a/common/driver/dma_common.c b/common/driver/dma_common.c index 1fb4b7f..7475d06 100755 --- a/common/driver/dma_common.c +++ b/common/driver/dma_common.c @@ -264,7 +264,7 @@ int Dma_Init(struct DmaDevice *dev) { // Setup /proc - if ( NULL == proc_create_data(dev->devName, 0, NULL, &DmaProcOps, dev)) { + if (NULL == proc_create_data(dev->devName, 0, NULL, &DmaProcOps, dev)) { dev_err(dev->device,"Init: Failed to create proc entry.\n"); goto cleanup_device_create; } @@ -286,7 +286,7 @@ int Dma_Init(struct DmaDevice *dev) { // Create TX buffers dev_info(dev->device,"Init: Creating %i TX Buffers. Size=%i Bytes. Mode=%i.\n", dev->cfgTxCount,dev->cfgSize,dev->cfgMode); - res = dmaAllocBuffers (dev, &(dev->txBuffers), dev->cfgTxCount, 0, DMA_TO_DEVICE ); + res = dmaAllocBuffers(dev, &(dev->txBuffers), dev->cfgTxCount, 0, DMA_TO_DEVICE); tot = res * dev->cfgSize; dev_info(dev->device,"Init: Created %i out of %i TX Buffers. %llu Bytes.\n", res,dev->cfgTxCount,tot); @@ -309,7 +309,7 @@ int Dma_Init(struct DmaDevice *dev) { // Create RX buffers, bidirectional because RX buffers can be passed to TX dev_info(dev->device,"Init: Creating %i RX Buffers. Size=%i Bytes. Mode=%i.\n", dev->cfgRxCount,dev->cfgSize,dev->cfgMode); - res = dmaAllocBuffers (dev, &(dev->rxBuffers), dev->cfgRxCount, dev->txBuffers.count, DMA_BIDIRECTIONAL); + res = dmaAllocBuffers(dev, &(dev->rxBuffers), dev->cfgRxCount, dev->txBuffers.count, DMA_BIDIRECTIONAL); tot = res * dev->cfgSize; dev_info(dev->device,"Init: Created %i out of %i RX Buffers. %llu Bytes.\n", res,dev->cfgRxCount,tot); @@ -324,7 +324,7 @@ int Dma_Init(struct DmaDevice *dev) { // Set interrupt if ( dev->irq != 0 ) { dev_info(dev->device,"Init: IRQ %d\n", dev->irq); - res = request_irq( dev->irq, dev->hwFunc->irq, IRQF_SHARED, dev->devName, (void*)dev); + res = request_irq(dev->irq, dev->hwFunc->irq, IRQF_SHARED, dev->devName, (void*)dev); // Result of request IRQ from OS. if (res < 0) { diff --git a/common/driver/dma_common.h b/common/driver/dma_common.h index f9c886f..f4091c7 100755 --- a/common/driver/dma_common.h +++ b/common/driver/dma_common.h @@ -204,7 +204,7 @@ extern struct file_operations DmaFunctions; // Function prototypes char *Dma_DevNode(struct device *dev, umode_t *mode); -int Dma_MapReg ( struct DmaDevice *dev ); +int Dma_MapReg(struct DmaDevice *dev); int Dma_Init(struct DmaDevice *dev); void Dma_Clean(struct DmaDevice *dev); int Dma_Open(struct inode *inode, struct file *filp); @@ -212,7 +212,7 @@ int Dma_Release(struct inode *inode, struct file *filp); ssize_t Dma_Read(struct file *filp, char *buffer, size_t count, loff_t *f_pos); ssize_t Dma_Write(struct file *filp, const char* buffer, size_t count, loff_t* f_pos); ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg); -uint32_t Dma_Poll(struct file *filp, poll_table *wait ); +uint32_t Dma_Poll(struct file *filp, poll_table *wait); int Dma_Mmap(struct file *filp, struct vm_area_struct *vma); int Dma_Fasync(int fd, struct file *filp, int mode); int Dma_ProcOpen(struct inode *inode, struct file *file); @@ -220,7 +220,7 @@ void * Dma_SeqStart(struct seq_file *s, loff_t *pos); void * Dma_SeqNext(struct seq_file *s, void *v, loff_t *pos); void Dma_SeqStop(struct seq_file *s, void *v); int Dma_SeqShow(struct seq_file *s, void *v); -int Dma_SetMaskBytes(struct DmaDevice *dev, struct DmaDesc *desc, uint8_t * mask ); +int Dma_SetMaskBytes(struct DmaDevice *dev, struct DmaDesc *desc, uint8_t * mask); int32_t Dma_WriteRegister(struct DmaDevice *dev, uint64_t arg); int32_t Dma_ReadRegister(struct DmaDevice *dev, uint64_t arg); diff --git a/common/driver/gpu_async.c b/common/driver/gpu_async.c index 0b4cee2..58f2189 100755 --- a/common/driver/gpu_async.c +++ b/common/driver/gpu_async.c @@ -178,12 +178,12 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { x = 0; - if (data->writeBuffers.count > 0 ) { + if (data->writeBuffers.count > 0) { x |= 0x00000100; x |= (data->writeBuffers.count-1); } - if (data->readBuffers.count > 0 ) { + if (data->readBuffers.count > 0) { x |= 0x01000000; x |= (data->readBuffers.count-1) << 16; } diff --git a/data_dev/app/src/dmaRate.cpp b/data_dev/app/src/dmaRate.cpp index 486509b..8e33a23 100644 --- a/data_dev/app/src/dmaRate.cpp +++ b/data_dev/app/src/dmaRate.cpp @@ -56,7 +56,7 @@ static struct argp_option options[] = { error_t parseArgs(int key, char *arg, struct argp_state *state) { struct PrgArgs *args = (struct PrgArgs *)state->input; - switch(key) { + switch (key) { case 'p': args->path = arg; break; case 'c': args->count = atoi(arg); break; default: return ARGP_ERR_UNKNOWN; break; diff --git a/data_dev/driver/src/data_dev_top.c b/data_dev/driver/src/data_dev_top.c index 03b6d69..06301ac 100755 --- a/data_dev/driver/src/data_dev_top.c +++ b/data_dev/driver/src/data_dev_top.c @@ -215,8 +215,8 @@ int DataDev_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { pci_set_master(pcidev); // Set the device as bus master // Retrieve and store the base address and size of the device's register space - dev->baseAddr = pci_resource_start (pcidev, 0); - dev->baseSize = pci_resource_len (pcidev, 0); + dev->baseAddr = pci_resource_start(pcidev, 0); + dev->baseSize = pci_resource_len(pcidev, 0); // Map the device's register space for use in the driver if ( Dma_MapReg(dev) < 0 ) { diff --git a/data_gpu/driver/src/data_gpu_top.c b/data_gpu/driver/src/data_gpu_top.c index 615a94c..810f02b 100755 --- a/data_gpu/driver/src/data_gpu_top.c +++ b/data_gpu/driver/src/data_gpu_top.c @@ -195,8 +195,8 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { pci_set_master(pcidev); // Set the device as bus master // Retrieve and store the base address and size of the device's register space - dev->baseAddr = pci_resource_start (pcidev, 0); - dev->baseSize = pci_resource_len (pcidev, 0); + dev->baseAddr = pci_resource_start(pcidev, 0); + dev->baseSize = pci_resource_len(pcidev, 0); // Map the device's register space for use in the driver if ( Dma_MapReg(dev) < 0 ) { diff --git a/rce_memmap/driver/src/rce_map.c b/rce_memmap/driver/src/rce_map.c index 187803b..a453879 100755 --- a/rce_memmap/driver/src/rce_map.c +++ b/rce_memmap/driver/src/rce_map.c @@ -118,7 +118,7 @@ int Map_Init(void) { // Map space dev.maps->base = ioremap_wc(dev.maps->addr, MAP_SIZE); - if (!dev.maps->base ) { + if (!dev.maps->base) { printk(KERN_ERR MOD_NAME " Init: Could not map memory addr %p with size 0x%x.\n",(void *)dev.maps->addr,MAP_SIZE); kfree(dev.maps); return (-1); diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index 9674178..c4e943b 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -69,10 +69,10 @@ static struct argp_option options[] = { {0} }; -error_t parseArgs ( int key, char *arg, struct argp_state *state ) { +error_t parseArgs(int key, char *arg, struct argp_state *state) { struct PrgArgs *args = (struct PrgArgs *)state->input; - switch(key) { + switch (key) { case 'p': args->path = arg; break; case 'm': args->dest = arg; break; case 's': args->size = strtol(arg,NULL,10); break; @@ -107,7 +107,7 @@ class RunData { bool running; }; -void *runWrite ( void *t ) { +void *runWrite(void *t) { fd_set fds; struct timeval timeout; int32_t ret; @@ -122,20 +122,20 @@ void *runWrite ( void *t ) { RunData *txData = (RunData *)t; - if ( (fd = open(txData->dev, O_RDWR )) < 0 ) { + if ((fd = open(txData->dev, O_RDWR)) < 0) { printf("Error opening device\n"); txData->running = false; return(NULL); } if ( txData->idxEn ) { - if ((dmaBuffers = dmaMapDma(fd,&dmaCount,&dmaSize)) == NULL ) { + if ((dmaBuffers = dmaMapDma(fd,&dmaCount,&dmaSize)) == NULL) { printf("Write failed to map dma buffer\n"); txData->running = false; return(NULL); } } else { - if ((data = malloc(txData->size)) == NULL ) { + if ((data = malloc(txData->size)) == NULL) { printf("Write failed to allocate buffer\n"); txData->running = false; return(NULL); @@ -199,7 +199,7 @@ void *runWrite ( void *t ) { } -void *runRead ( void *t ) { +void *runRead(void *t) { fd_set fds; struct timeval timeout; int32_t ret; @@ -224,20 +224,20 @@ void *runRead ( void *t ) { maxSize = rxData->size*2; idxEn = rxData->idxEn; - if ( (fd = open(rxData->dev, O_RDWR )) < 0 ) { + if ( (fd = open(rxData->dev, O_RDWR)) < 0 ) { printf("Error opening device\n"); rxData->running = false; return NULL; } if ( rxData->idxEn ) { - if ((dmaBuffers = dmaMapDma(fd,&dmaCount,&dmaSize)) == NULL ) { + if ((dmaBuffers = dmaMapDma(fd,&dmaCount,&dmaSize)) == NULL) { printf("Read failed to map dma buffer\n"); rxData->running = false; return(NULL); } } else { - if ((data = malloc(maxSize)) == NULL ) { + if ((data = malloc(maxSize)) == NULL) { printf("Read failed to allocate buffer\n"); rxData->running = false; return(NULL); @@ -286,7 +286,7 @@ void *runRead ( void *t ) { if ( idxEn ) dmaRetIndex(fd,dmaIndex); // Stop on size mismatch or frame errors - if ( ret != (int)rxData->size || rxDest != rxData->dest || rxData->fuser != rxFuser || rxData->luser != rxLuser) { + if (ret != (int)rxData->size || rxDest != rxData->dest || rxData->fuser != rxFuser || rxData->luser != rxLuser) { printf("Read Error. Dest=%i, ExpDest=%i, Ret=%i, Exp=%i, Fuser=0x%.2x, Luser=0x%.2x\n", rxDest,rxData->dest,ret,rxData->size,rxFuser,rxLuser); break; @@ -310,7 +310,7 @@ void *runRead ( void *t ) { return(NULL); } -int main (int argc, char **argv) { +int main(int argc, char **argv) { RunData * txData[DMA_MASK_SIZE]; RunData * rxData[DMA_MASK_SIZE]; pthread_t txThread[DMA_MASK_SIZE]; diff --git a/rce_stream/app/src/dmaRead.cpp b/rce_stream/app/src/dmaRead.cpp index d5dc38d..fd3c9e4 100644 --- a/rce_stream/app/src/dmaRead.cpp +++ b/rce_stream/app/src/dmaRead.cpp @@ -56,10 +56,10 @@ static struct argp_option options[] = { {0} }; -error_t parseArgs ( int key, char *arg, struct argp_state *state ) { +error_t parseArgs(int key, char *arg, struct argp_state *state) { struct PrgArgs *args = (struct PrgArgs *)state->input; - switch(key) { + switch (key) { case 'p': args->path = arg; break; case 'm': args->dest = arg; break; case 'd': args->prbsDis = 1; break; @@ -72,7 +72,7 @@ error_t parseArgs ( int key, char *arg, struct argp_state *state ) { static struct argp argp = {options,parseArgs,args_doc,doc}; -int main (int argc, char **argv) { +int main(int argc, char **argv) { uint8_t mask[DMA_MASK_SIZE]; int32_t s; int32_t ret; @@ -128,7 +128,7 @@ int main (int argc, char **argv) { return(0); } } else { - if ((rxData = malloc(maxSize)) == NULL ) { + if ((rxData = malloc(maxSize)) == NULL) { printf("Failed to allocate rxData!\n"); return(0); } diff --git a/rce_stream/app/src/dmaSetDebug.cpp b/rce_stream/app/src/dmaSetDebug.cpp index 037c526..f06f45f 100755 --- a/rce_stream/app/src/dmaSetDebug.cpp +++ b/rce_stream/app/src/dmaSetDebug.cpp @@ -49,10 +49,10 @@ static struct argp_option options[] = { {0} }; -error_t parseArgs ( int key, char *arg, struct argp_state *state ) { +error_t parseArgs(int key, char *arg, struct argp_state *state) { struct PrgArgs *args = (struct PrgArgs *)state->input; - switch(key) { + switch (key) { case 'p': args->path = arg; break; case ARGP_KEY_ARG: switch (state->arg_num) { @@ -70,7 +70,7 @@ error_t parseArgs ( int key, char *arg, struct argp_state *state ) { static struct argp argp = {options,parseArgs,args_doc,doc}; -int main (int argc, char **argv) { +int main(int argc, char **argv) { int s; struct PrgArgs args; diff --git a/rce_stream/app/src/dmaWrite.cpp b/rce_stream/app/src/dmaWrite.cpp index 62b028b..ab7297d 100644 --- a/rce_stream/app/src/dmaWrite.cpp +++ b/rce_stream/app/src/dmaWrite.cpp @@ -63,10 +63,10 @@ static struct argp_option options[] = { {0} }; -error_t parseArgs ( int key, char *arg, struct argp_state *state ) { +error_t parseArgs(int key, char *arg, struct argp_state *state) { struct PrgArgs *args = (struct PrgArgs *)state->input; - switch(key) { + switch (key) { case 'p': args->path = arg; break; case 'd': args->prbsDis = 1; break; case 's': args->size = strtol(arg,NULL,10); break; @@ -91,7 +91,7 @@ error_t parseArgs ( int key, char *arg, struct argp_state *state ) { static struct argp argp = {options,parseArgs,args_doc,doc}; -int main (int argc, char **argv) { +int main(int argc, char **argv) { int32_t s; int32_t ret; uint32_t count; @@ -122,7 +122,7 @@ int main (int argc, char **argv) { return(0); } } else { - if ((txData = malloc(args.size)) == NULL ) { + if ((txData = malloc(args.size)) == NULL) { printf("Failed to allocate rxData!\n"); return(0); } diff --git a/rce_stream/driver/src/axis_gen1.c b/rce_stream/driver/src/axis_gen1.c index a7314d1..8e6bc5e 100755 --- a/rce_stream/driver/src/axis_gen1.c +++ b/rce_stream/driver/src/axis_gen1.c @@ -64,14 +64,14 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Transmit return if ( (stat & 0x2) != 0 ) { // Read handle - if (((handle = ioread32(&(reg->txFree))) & 0x80000000) != 0 ) { + if (((handle = ioread32(&(reg->txFree))) & 0x80000000) != 0) { handle &= 0x7FFFFFFC; if ( dev->debug > 0 ) dev_info(dev->device,"Irq: Return TX Status Value 0x%.8x.\n",handle); // Attempt to find buffer in tx pool and return. otherwise return rx entry to hw. - if ((buff = dmaRetBufferIrq (dev,handle)) != NULL) { + if ((buff = dmaRetBufferIrq(dev,handle)) != NULL) { iowrite32(handle,&(reg->rxFree)); } } @@ -80,7 +80,7 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Receive data if ( (stat & 0x1) != 0 ) { // Read handle - while (((handle = ioread32(&(reg->rxPend))) & 0x80000000) != 0 ) { + while (((handle = ioread32(&(reg->rxPend))) & 0x80000000) != 0) { handle &= 0x7FFFFFFC; // Read size @@ -107,12 +107,12 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { } // Find RX buffer entry - if ((buff = dmaFindBufferList (&(dev->rxBuffers),handle)) != NULL) { + if ((buff = dmaFindBufferList(&(dev->rxBuffers),handle)) != NULL) { // Extract data from descriptor buff->count++; buff->size = size; buff->flags = (status >> 8) & 0xFFFF; // 15:8 = luser, 7:0 = fuser - buff->dest = (status ) & 0xFF; + buff->dest = (status >> 0) & 0x00FF; buff->error = (size == 0)?DMA_ERR_FIFO:0; // Check for errors @@ -261,7 +261,7 @@ int32_t AxisG1_SendBuffer(struct DmaDevice *dev, struct DmaBuffer **buff, uint32 for (x=0; x < count; x++) { // Create descriptor - control = (buff[x]->dest ) & 0x000000FF; + control = (buff[x]->dest << 0) & 0x000000FF; control += (buff[x]->flags << 8) & 0x00FFFF00; // flags[15:9] = luser, flags[7:0] = fuser if ( dmaBufferToHw(buff[x]) < 0 ) { diff --git a/rce_stream/driver/src/rce_top.c b/rce_stream/driver/src/rce_top.c index feafc4b..648b3ae 100755 --- a/rce_stream/driver/src/rce_top.c +++ b/rce_stream/driver/src/rce_top.c @@ -195,7 +195,7 @@ int Rce_Probe(struct platform_device *pdev) { // Coherent /* not available on arm64 */ #if !defined( __aarch64__) - if( (dev->cfgMode & BUFF_ARM_ACP) || (dev->cfgMode & AXIS2_RING_ACP) ) { + if ( (dev->cfgMode & BUFF_ARM_ACP) || (dev->cfgMode & AXIS2_RING_ACP) ) { set_dma_ops(&pdev->dev,&arm_coherent_dma_ops); dev_info(dev->device,"Probe: Set COHERENT DMA =%i\n",dev->cfgMode); } From e4a8b895e64c697c1ee6dea2c4b16f8784113766 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 09:47:20 -0700 Subject: [PATCH 15/23] resolving c++ linter At least two spaces is best between code and comments [whitespace/comments] --- CPPLINT.cfg | 1 - common/app_lib/PrbsData.h | 2 +- common/driver/axi_version.h | 2 +- common/driver/axis_gen2.c | 34 ++++---- common/driver/axis_gen2.h | 90 ++++++++++----------- common/driver/dma_buffer.c | 12 +-- common/driver/dma_buffer.h | 2 +- common/driver/dma_common.c | 4 +- common/driver/dma_common.h | 4 +- common/driver/gpu_async.c | 2 +- common/driver/gpu_async.h | 2 +- data_dev/app/src/dmaWrite.cpp | 2 +- data_dev/app/src/setDebug.cpp | 4 +- data_dev/driver/src/data_dev_top.c | 34 ++++---- data_dev/driver/src/data_dev_top.h | 2 +- data_gpu/driver/src/data_gpu_top.c | 60 +++++++------- include/AxiVersion.h | 4 +- include/AxisDriver.h | 10 +-- include/DataDriver.h | 2 +- include/GpuAsync.h | 4 +- petalinux/aximemorymap/files/aximemorymap.c | 28 +++---- petalinux/aximemorymap/files/aximemorymap.h | 2 +- petalinux/axistreamdma/files/axistreamdma.c | 12 +-- rce_memmap/driver/src/rce_map.c | 2 +- rce_stream/app/src/dmaLoopTest.cpp | 2 +- rce_stream/driver/src/axis_gen1.c | 4 +- rce_stream/driver/src/axis_gen1.h | 41 +++++----- rce_stream/driver/src/rce_top.h | 2 +- 28 files changed, 184 insertions(+), 186 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index dd59e08..af4556a 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -38,4 +38,3 @@ filter=-build/namespaces filter=-whitespace/indent filter=-whitespace/newline filter=-whitespace/comma -filter=-whitespace/comments diff --git a/common/app_lib/PrbsData.h b/common/app_lib/PrbsData.h index 79a53bd..0bc68b9 100644 --- a/common/app_lib/PrbsData.h +++ b/common/app_lib/PrbsData.h @@ -45,4 +45,4 @@ class PrbsData { bool processData(const void *data, uint32_t size); }; -#endif // __PRBS_DATA_H__ +#endif // __PRBS_DATA_H__ diff --git a/common/driver/axi_version.h b/common/driver/axi_version.h index a037819..ec1ba97 100755 --- a/common/driver/axi_version.h +++ b/common/driver/axi_version.h @@ -86,4 +86,4 @@ void AxiVersion_Read(struct DmaDevice *dev, void *base, struct AxiVersion *aVer) void AxiVersion_Show(struct seq_file *s, struct DmaDevice *dev, struct AxiVersion *aVer); void AxiVersion_SetUserReset(void *base, bool state); -#endif // __AXI__VERSION_H__ +#endif // __AXI__VERSION_H__ diff --git a/common/driver/axis_gen2.c b/common/driver/axis_gen2.c index ca0145f..1831a23 100755 --- a/common/driver/axis_gen2.c +++ b/common/driver/axis_gen2.c @@ -101,7 +101,7 @@ inline uint8_t AxisG2_MapReturn(struct DmaDevice * dev, struct AxisG2Return *ret ret->index = (ptr[0] >> 4) & 0xFFF; ret->cont = (ptr[0] >> 3) & 0x1; ret->result = ptr[0] & 0x7; - ret->id = 0; // ID is set to 0 for 64-bit descriptors + ret->id = 0; // ID is set to 0 for 64-bit descriptors } // Logging for debug purposes @@ -169,34 +169,34 @@ inline void AxisG2_WriteTx(struct DmaBuffer *buff, struct AxisG2Reg *reg, uint32 uint32_t chan; // Configure buffer flags for transmission - rdData[0] = (buff->flags >> 13) & 0x00000008; // bit[3] = continue = flags[16] - rdData[0] |= (buff->flags << 8) & 0x00FF0000; // Bits[23:16] = lastUser = flags[15:8] - rdData[0] |= (buff->flags << 24) & 0xFF000000; // Bits[31:24] = firstUser = flags[7:0] + rdData[0] = (buff->flags >> 13) & 0x00000008; // bit[3] = continue = flags[16] + rdData[0] |= (buff->flags << 8) & 0x00FF0000; // Bits[23:16] = lastUser = flags[15:8] + rdData[0] |= (buff->flags << 24) & 0xFF000000; // Bits[31:24] = firstUser = flags[7:0] if (desc128En) { // For 128-bit descriptor enabled dest = buff->dest % 256; chan = buff->dest / 256; - rdData[0] |= (chan << 4) & 0x000000F0; // Channel number - rdData[0] |= (dest << 8) & 0x0000FF00; // Destination ID + rdData[0] |= (chan << 4) & 0x000000F0; // Channel number + rdData[0] |= (dest << 8) & 0x0000FF00; // Destination ID - rdData[1] = buff->size; // Buffer size + rdData[1] = buff->size; // Buffer size // Buffer index and handle for 128-bit descriptor rdData[2] = buff->index & 0x0FFFFFFF; - rdData[2] |= (buff->buffHandle << 24) & 0xF0000000; // Addr bits[31:28] - rdData[3] = (buff->buffHandle >> 8) & 0xFFFFFFFF; // Addr bits[39:8] + rdData[2] |= (buff->buffHandle << 24) & 0xF0000000; // Addr bits[31:28] + rdData[3] = (buff->buffHandle >> 8) & 0xFFFFFFFF; // Addr bits[39:8] // Write to FIFO registers for 128-bit descriptor writel(rdData[3], &(reg->readFifoD)); writel(rdData[2], &(reg->readFifoC)); } else { // For 64-bit descriptors - rdData[0] |= (buff->index << 4) & 0x0000FFF0; // Buffer ID + rdData[0] |= (buff->index << 4) & 0x0000FFF0; // Buffer ID - rdData[1] = buff->size & 0x00FFFFFF; // Buffer size - rdData[1] |= (buff->dest << 24) & 0xFF000000; // Destination ID + rdData[1] = buff->size & 0x00FFFFFF; // Buffer size + rdData[1] |= (buff->dest << 24) & 0xFF000000; // Destination ID // Write buffer handle to DMA address table writel(buff->buffHandle, &(reg->dmaAddr[buff->index])); @@ -284,9 +284,9 @@ uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct Ax buff->error = (ret.size == 0)?DMA_ERR_FIFO:ret.result; buff->id = ret.id; - buff->flags = ret.fuser; // firstUser = flags[7:0] - buff->flags |= (ret.luser << 8) & 0x0000FF00; // lastUser = flags[15:8] - buff->flags |= (ret.cont << 16) & 0x00010000; // continue = flags[16] + buff->flags = ret.fuser; // firstUser = flags[7:0] + buff->flags |= (ret.luser << 8) & 0x0000FF00; // lastUser = flags[15:8] + buff->flags |= (ret.cont << 16) & 0x00010000; // continue = flags[16] hwData->contCount += ret.cont; @@ -465,8 +465,8 @@ void AxisG2_Init(struct DmaDevice *dev) { // Configure cache mode based on device configuration: // bits3:0 = descWr, bits 11:8 = bufferWr, bits 15:12 = bufferRd x = 0; - if (dev->cfgMode & BUFF_ARM_ACP) x |= 0xA600; // Buffer write and read cache policy - if (dev->cfgMode & AXIS2_RING_ACP) x |= 0x00A6; // Descriptor write cache policy + if (dev->cfgMode & BUFF_ARM_ACP) x |= 0xA600; // Buffer write and read cache policy + if (dev->cfgMode & AXIS2_RING_ACP) x |= 0x00A6; // Descriptor write cache policy writel(x, &(reg->cacheConfig)); // Set maximum transfer size diff --git a/common/driver/axis_gen2.h b/common/driver/axis_gen2.h index c7894fd..cc18882 100755 --- a/common/driver/axis_gen2.h +++ b/common/driver/axis_gen2.h @@ -75,42 +75,42 @@ * hardware access to perform DMA operations. */ struct AxisG2Reg { - uint32_t enableVer; // 0x0000 - uint32_t intEnable; // 0x0004 - uint32_t contEnable; // 0x0008 - uint32_t dropEnable; // 0x000C - uint32_t wrBaseAddrLow; // 0x0010 - uint32_t wrBaseAddrHigh; // 0x0014 - uint32_t rdBaseAddrLow; // 0x0018 - uint32_t rdBaseAddrHigh; // 0x001C - uint32_t fifoReset; // 0x0020 - uint32_t spareA; // 0x0024 - uint32_t maxSize; // 0x0028 - uint32_t online; // 0x002C - uint32_t acknowledge; // 0x0030 - uint32_t channelCount; // 0x0034 - uint32_t addrWidth; // 0x0038 - uint32_t cacheConfig; // 0x003C - uint32_t readFifoA; // 0x0040 - uint32_t readFifoB; // 0x0044 - uint32_t writeFifoA; // 0x0048 - uint32_t intAckAndEnable; // 0x004C - uint32_t intReqCount; // 0x0050 - uint32_t hwWrIndex; // 0x0054 - uint32_t hwRdIndex; // 0x0058 - uint32_t wrReqMissed; // 0x005C - uint32_t readFifoC; // 0x0060 - uint32_t readFifoD; // 0x0064 - uint32_t spareB[2]; // 0x0068 - 0x006C - uint32_t writeFifoB; // 0x0070 - uint32_t spareC[3]; // 0x0074 - 0x007C - uint32_t forceInt; // 0x0080 - uint32_t irqHoldOff; // 0x0084 - uint32_t spareD[2]; // 0x0088 - 0x008C - uint32_t bgThold[8]; // 0x0090 - 0x00AC - uint32_t bgCount[8]; // 0x00B0 - 0x00CC - uint32_t spareE[4044]; // 0x00D0 - 0x3FFC - uint32_t dmaAddr[4096]; // 0x4000 - 0x7FFC + uint32_t enableVer; // 0x0000 + uint32_t intEnable; // 0x0004 + uint32_t contEnable; // 0x0008 + uint32_t dropEnable; // 0x000C + uint32_t wrBaseAddrLow; // 0x0010 + uint32_t wrBaseAddrHigh; // 0x0014 + uint32_t rdBaseAddrLow; // 0x0018 + uint32_t rdBaseAddrHigh; // 0x001C + uint32_t fifoReset; // 0x0020 + uint32_t spareA; // 0x0024 + uint32_t maxSize; // 0x0028 + uint32_t online; // 0x002C + uint32_t acknowledge; // 0x0030 + uint32_t channelCount; // 0x0034 + uint32_t addrWidth; // 0x0038 + uint32_t cacheConfig; // 0x003C + uint32_t readFifoA; // 0x0040 + uint32_t readFifoB; // 0x0044 + uint32_t writeFifoA; // 0x0048 + uint32_t intAckAndEnable; // 0x004C + uint32_t intReqCount; // 0x0050 + uint32_t hwWrIndex; // 0x0054 + uint32_t hwRdIndex; // 0x0058 + uint32_t wrReqMissed; // 0x005C + uint32_t readFifoC; // 0x0060 + uint32_t readFifoD; // 0x0064 + uint32_t spareB[2]; // 0x0068 - 0x006C + uint32_t writeFifoB; // 0x0070 + uint32_t spareC[3]; // 0x0074 - 0x007C + uint32_t forceInt; // 0x0080 + uint32_t irqHoldOff; // 0x0084 + uint32_t spareD[2]; // 0x0088 - 0x008C + uint32_t bgThold[8]; // 0x0090 - 0x00AC + uint32_t bgCount[8]; // 0x00B0 - 0x00CC + uint32_t spareE[4044]; // 0x00D0 - 0x3FFC + uint32_t dmaAddr[4096]; // 0x4000 - 0x7FFC }; /** @@ -138,14 +138,14 @@ struct AxisG2Reg { * and referencing purposes. */ struct AxisG2Return { - uint32_t index; // Index of the operation - uint32_t size; // Size of the data transferred - uint8_t result; // Result of the operation - uint8_t fuser; // First user-defined value - uint8_t luser; // Last user-defined value - uint16_t dest; // Destination identifier - uint8_t cont; // Continuous operation flag - uint8_t id; // Operation identifier + uint32_t index; // Index of the operation + uint32_t size; // Size of the data transferred + uint8_t result; // Result of the operation + uint8_t fuser; // First user-defined value + uint8_t luser; // Last user-defined value + uint16_t dest; // Destination identifier + uint8_t cont; // Continuous operation flag + uint8_t id; // Operation identifier }; /** @@ -227,4 +227,4 @@ void AxisG2_WqTask_IrqForce(struct work_struct *work); void AxisG2_WqTask_Poll(struct work_struct *work); void AxisG2_WqTask_Service(struct work_struct *work); -#endif // __AXIS_GEN2_H__ +#endif // __AXIS_GEN2_H__ diff --git a/common/driver/dma_buffer.c b/common/driver/dma_buffer.c index b64f893..22888ba 100755 --- a/common/driver/dma_buffer.c +++ b/common/driver/dma_buffer.c @@ -443,8 +443,8 @@ struct DmaBuffer *dmaRetBufferIrq(struct DmaDevice *dev, dma_addr_t handle) { // Attempt to return buffer to transmit queue if found if ((buff = dmaFindBufferList(&(dev->txBuffers), handle)) != NULL) { - dmaBufferFromHw(buff); // Prepare buffer for hardware interaction - dmaQueuePushIrq(&(dev->tq), buff); // Re-queue the buffer + dmaBufferFromHw(buff); // Prepare buffer for hardware interaction + dmaQueuePushIrq(&(dev->tq), buff); // Re-queue the buffer return NULL; // Attempt to return rx buffer if found in receive list @@ -735,12 +735,12 @@ uint32_t dmaQueuePush(struct DmaQueue *queue, struct DmaBuffer *entry) { // Check for buffer overflow - this condition should ideally never occur if (next == queue->read) { - ret = 1; // Indicate failure due to no space left in the queue + ret = 1; // Indicate failure due to no space left in the queue } else { // Add the entry to the queue and update the write index queue->queue[queue->write / BUFFERS_PER_LIST][queue->write % BUFFERS_PER_LIST] = entry; queue->write = next; - entry->inQ = 1; // Mark the buffer as queued + entry->inQ = 1; // Mark the buffer as queued } // Release the spinlock and restore interrupts @@ -876,13 +876,13 @@ uint32_t dmaQueuePushListIrq(struct DmaQueue *queue, struct DmaBuffer **buff, si // Check for buffer overflow - this condition should not normally occur. if (next == queue->read) { - ret = 1; // Indicate failure due to overflow. + ret = 1; // Indicate failure due to overflow. break; } else { // Properly place buffer in queue and mark it as in queue. queue->queue[queue->write / BUFFERS_PER_LIST][queue->write % BUFFERS_PER_LIST] = buff[x]; queue->write = next; - buff[x]->inQ = 1; // Mark buffer as enqueued. + buff[x]->inQ = 1; // Mark buffer as enqueued. } } spin_unlock(&(queue->lock)); diff --git a/common/driver/dma_buffer.h b/common/driver/dma_buffer.h index 45dabaf..0a8ef57 100755 --- a/common/driver/dma_buffer.h +++ b/common/driver/dma_buffer.h @@ -164,4 +164,4 @@ ssize_t dmaQueuePopListIrq(struct DmaQueue *queue, struct DmaBuffer **buff, size void dmaQueuePoll(struct DmaQueue *queue, struct file *filp, poll_table *wait); void dmaQueueWait(struct DmaQueue *queue); -#endif // __DMA_BUFFER_H__ +#endif // __DMA_BUFFER_H__ diff --git a/common/driver/dma_common.c b/common/driver/dma_common.c index 7475d06..c9404ba 100755 --- a/common/driver/dma_common.c +++ b/common/driver/dma_common.c @@ -464,7 +464,7 @@ int Dma_Open(struct inode *inode, struct file *filp) { desc = (struct DmaDesc *)kzalloc(sizeof(struct DmaDesc), GFP_KERNEL); if (!desc) { dev_err(dev->device, "Open: kzalloc failed\n"); - return -ENOMEM; // Return an error if allocation fails + return -ENOMEM; // Return an error if allocation fails } memset(desc, 0, sizeof(struct DmaDesc)); @@ -1269,7 +1269,7 @@ void *Dma_SeqStart(struct seq_file *s, loff_t *pos) { */ void *Dma_SeqNext(struct seq_file *s, void *v, loff_t *pos) { (*pos)++; - return NULL; // Always return NULL as there is no next item + return NULL; // Always return NULL as there is no next item } /** diff --git a/common/driver/dma_common.h b/common/driver/dma_common.h index f4091c7..10b04f1 100755 --- a/common/driver/dma_common.h +++ b/common/driver/dma_common.h @@ -87,7 +87,7 @@ struct DmaDevice { uint8_t * base; // Register pointers, may be the same as reg - void * reg; // hardware specific + void * reg; // hardware specific // Direct read/write offset and size uint8_t * rwBase; @@ -224,4 +224,4 @@ int Dma_SetMaskBytes(struct DmaDevice *dev, struct DmaDesc *desc, uint8_t * mask int32_t Dma_WriteRegister(struct DmaDevice *dev, uint64_t arg); int32_t Dma_ReadRegister(struct DmaDevice *dev, uint64_t arg); -#endif // __DMA_COMMON_H__ +#endif // __DMA_COMMON_H__ diff --git a/common/driver/gpu_async.c b/common/driver/gpu_async.c index 58f2189..63e6846 100755 --- a/common/driver/gpu_async.c +++ b/common/driver/gpu_async.c @@ -40,7 +40,7 @@ void Gpu_Init(struct DmaDevice *dev, uint32_t offset) { /* Allocate memory for GPU utility data */ gpuData = (struct GpuData *)kzalloc(sizeof(struct GpuData), GFP_KERNEL); if (!gpuData) - return; // Handle memory allocation failure if necessary + return; // Handle memory allocation failure if necessary /* Associate GPU utility data with the device */ dev->utilData = gpuData; diff --git a/common/driver/gpu_async.h b/common/driver/gpu_async.h index 859cbb9..79f45e6 100755 --- a/common/driver/gpu_async.h +++ b/common/driver/gpu_async.h @@ -103,4 +103,4 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg); int32_t Gpu_RemNvidia(struct DmaDevice *dev, uint64_t arg); void Gpu_FreeNvidia(void * data); -#endif // __GPU_ASYNC_2_H__ +#endif // __GPU_ASYNC_2_H__ diff --git a/data_dev/app/src/dmaWrite.cpp b/data_dev/app/src/dmaWrite.cpp index 513ff0a..88d1399 100644 --- a/data_dev/app/src/dmaWrite.cpp +++ b/data_dev/app/src/dmaWrite.cpp @@ -93,7 +93,7 @@ int main(int argc, char **argv) { uint32_t count; fd_set fds; void *txData = NULL; - PrbsData prbs(32, 4, 1, 2, 6, 31); // Example PRBS (Pseudo-Random Binary Sequence) generator initialization + PrbsData prbs(32, 4, 1, 2, 6, 31); // Example PRBS (Pseudo-Random Binary Sequence) generator initialization void **dmaBuffers = NULL; uint32_t dmaSize; uint32_t dmaCount; diff --git a/data_dev/app/src/setDebug.cpp b/data_dev/app/src/setDebug.cpp index 1ef4a54..e05bee4 100755 --- a/data_dev/app/src/setDebug.cpp +++ b/data_dev/app/src/setDebug.cpp @@ -63,12 +63,12 @@ error_t parseArgs(int key, char *arg, struct argp_state *state) { if (state->arg_num == 0) { args->level = strtol(arg, NULL, 10); } else { - argp_usage(state); // Too many arguments + argp_usage(state); // Too many arguments } break; case ARGP_KEY_END: if (state->arg_num < 1) { - argp_usage(state); // Not enough arguments + argp_usage(state); // Not enough arguments } break; default: diff --git a/data_dev/driver/src/data_dev_top.c b/data_dev/driver/src/data_dev_top.c index 06301ac..bc9006b 100755 --- a/data_dev/driver/src/data_dev_top.c +++ b/data_dev/driver/src/data_dev_top.c @@ -35,7 +35,7 @@ // Init Configuration values int cfgTxCount = 1024; int cfgRxCount = 1024; -int cfgSize = 0x20000; // 128kB +int cfgSize = 0x20000; // 128kB int cfgMode = BUFF_COHERENT; int cfgCont = 1; int cfgIrqHold = 10000; @@ -161,7 +161,7 @@ int DataDev_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { // Validate buffer mode configuration if ( cfgMode != BUFF_COHERENT && cfgMode != BUFF_STREAM ) { pr_err("%s: Probe: Invalid buffer mode = %i.\n", MOD_NAME, cfgMode); - return -EINVAL; // Return directly with an error code + return -EINVAL; // Return directly with an error code } // Initialize hardware function pointers @@ -184,7 +184,7 @@ int DataDev_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { // Check for device slots overflow if (id->driver_data < 0) { pr_err("%s: Probe: Too Many Devices.\n", MOD_NAME); - return -ENOMEM; // Return directly with an error code + return -ENOMEM; // Return directly with an error code } dev = &gDmaDevices[id->driver_data]; dev->index = id->driver_data; @@ -202,17 +202,17 @@ int DataDev_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { if (ret < 0 || ret >= sizeof(dev->devName)) { pr_err("%s: Probe: Error in snprintf() while formatting device name\n", MOD_NAME); probeReturn = -EINVAL; - goto err_pre_en; // Bail out, but clean up first + goto err_pre_en; // Bail out, but clean up first } // Activate the PCI device ret = pci_enable_device(pcidev); if (ret) { pr_err("%s: Probe: pci_enable_device() = %i.\n", MOD_NAME, ret); - probeReturn = ret; // Return directly with error code - goto err_pre_en; // Bail out, but clean up first + probeReturn = ret; // Return directly with error code + goto err_pre_en; // Bail out, but clean up first } - pci_set_master(pcidev); // Set the device as bus master + pci_set_master(pcidev); // Set the device as bus master // Retrieve and store the base address and size of the device's register space dev->baseAddr = pci_resource_start(pcidev, 0); @@ -220,7 +220,7 @@ int DataDev_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { // Map the device's register space for use in the driver if ( Dma_MapReg(dev) < 0 ) { - probeReturn = -ENOMEM; // Memory allocation error + probeReturn = -ENOMEM; // Memory allocation error goto err_post_en; } @@ -245,24 +245,24 @@ int DataDev_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { dev->irq = pcidev->irq; // Set basic device context - dev->pcidev = pcidev; // PCI device structure - dev->device = &(pcidev->dev); // Device structure - dev->hwFunc = hfunc; // Hardware function pointer + dev->pcidev = pcidev; // PCI device structure + dev->device = &(pcidev->dev); // Device structure + dev->hwFunc = hfunc; // Hardware function pointer // Initialize device memory regions - dev->reg = dev->base + AGEN2_OFF; // Register base address - dev->rwBase = dev->base + PHY_OFF; // Read/Write base address - dev->rwSize = (2*USER_SIZE) - PHY_OFF; // Read/Write region size + dev->reg = dev->base + AGEN2_OFF; // Register base address + dev->rwBase = dev->base + PHY_OFF; // Read/Write base address + dev->rwSize = (2*USER_SIZE) - PHY_OFF; // Read/Write region size // Manage device reset cycle dev_info(dev->device,"Init: Setting user reset\n"); - AxiVersion_SetUserReset(dev->base + AVER_OFF,true); // Set user reset + AxiVersion_SetUserReset(dev->base + AVER_OFF,true); // Set user reset dev_info(dev->device,"Init: Clearing user reset\n"); - AxiVersion_SetUserReset(dev->base + AVER_OFF,false); // Clear user reset + AxiVersion_SetUserReset(dev->base + AVER_OFF,false); // Clear user reset // Configure DMA based on AXI address width: 128bit desc, = 64-bit address map if ((readl(dev->reg) & 0x10000) != 0) { - axiWidth = (readl(dev->reg + 0x34) >> 8) & 0xFF; // Extract AXI address width + axiWidth = (readl(dev->reg + 0x34) >> 8) & 0xFF; // Extract AXI address width // Attempt to set DMA and coherent DMA masks based on AXI width if (!dma_set_mask(dev->device, DMA_BIT_MASK(axiWidth))) { diff --git a/data_dev/driver/src/data_dev_top.h b/data_dev/driver/src/data_dev_top.h index 69fe910..dbe04f5 100755 --- a/data_dev/driver/src/data_dev_top.h +++ b/data_dev/driver/src/data_dev_top.h @@ -52,4 +52,4 @@ int32_t DataDev_Command(struct DmaDevice *dev, uint32_t cmd, uint64_t arg); void DataDev_SeqShow(struct seq_file *s, struct DmaDevice *dev); extern struct hardware_functions DataDev_functions; -#endif // __DATA_DEV_TOP_H__ +#endif // __DATA_DEV_TOP_H__ diff --git a/data_gpu/driver/src/data_gpu_top.c b/data_gpu/driver/src/data_gpu_top.c index 810f02b..fed4c59 100755 --- a/data_gpu/driver/src/data_gpu_top.c +++ b/data_gpu/driver/src/data_gpu_top.c @@ -40,8 +40,8 @@ */ int cfgTxCount = 1024; // Transmit buffer count int cfgRxCount = 1024; // Receive buffer count -int cfgSize = 0x20000; // Size of the buffer: 128kB -int cfgMode = BUFF_COHERENT; // Buffer mode: coherent +int cfgSize = 0x20000; // Size of the buffer: 128kB +int cfgMode = BUFF_COHERENT; // Buffer mode: coherent int cfgCont = 1; // Continuous operation flag int cfgDevName = 0; @@ -56,26 +56,26 @@ struct DmaDevice gDmaDevices[MAX_DMA_DEVICES]; * This array is used by the kernel to match this driver to the specific hardware based on PCI IDs. */ static struct pci_device_id DataGpu_Ids[] = { - { PCI_DEVICE(PCI_VENDOR_ID_SLAC, PCI_DEVICE_ID_DDEV) }, // Device ID for SLAC vendor, specific device - { 0, } // Terminator for the ID list + { PCI_DEVICE(PCI_VENDOR_ID_SLAC, PCI_DEVICE_ID_DDEV) }, // Device ID for SLAC vendor, specific device + { 0, } // Terminator for the ID list }; /* Module metadata definitions */ -#define MOD_NAME "datagpu" // Name of the module -MODULE_LICENSE("GPL"); // License type: GPL for open source compliance -MODULE_DEVICE_TABLE(pci, DataGpu_Ids); // Associate the PCI ID table with this module -module_init(DataGpu_Init); // Initialize the module with DataGpu_Init function -module_exit(DataGpu_Exit); // Clean-up the module with DataGpu_Exit function +#define MOD_NAME "datagpu" // Name of the module +MODULE_LICENSE("GPL"); // License type: GPL for open source compliance +MODULE_DEVICE_TABLE(pci, DataGpu_Ids); // Associate the PCI ID table with this module +module_init(DataGpu_Init); // Initialize the module with DataGpu_Init function +module_exit(DataGpu_Exit); // Clean-up the module with DataGpu_Exit function /* * PCI driver structure definition. * This structure contains callback functions and device IDs for the DataGpu driver. */ static struct pci_driver DataGpuDriver = { - .name = MOD_NAME, // Name of the driver - .id_table = DataGpu_Ids, // PCI device ID table - .probe = DataGpu_Probe, // Probe function for device discovery - .remove = DataGpu_Remove, // Remove function for device disconnection + .name = MOD_NAME, // Name of the driver + .id_table = DataGpu_Ids, // PCI device ID table + .probe = DataGpu_Probe, // Probe function for device discovery + .remove = DataGpu_Remove, // Remove function for device disconnection }; /** @@ -141,7 +141,7 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { // Validate buffer mode configuration if ( cfgMode != BUFF_COHERENT && cfgMode != BUFF_STREAM ) { pr_err("%s: Probe: Invalid buffer mode = %i.\n", MOD_NAME, cfgMode); - return -EINVAL; // Return directly with an error code + return -EINVAL; // Return directly with an error code } // Initialize hardware function pointers @@ -164,7 +164,7 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { // Check for device slots overflow if (id->driver_data < 0) { pr_err("%s: Probe: Too Many Devices.\n", MOD_NAME); - return -ENOMEM; // Return directly with an error code + return -ENOMEM; // Return directly with an error code } dev = &gDmaDevices[id->driver_data]; dev->index = id->driver_data; @@ -181,7 +181,7 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { } if (ret < 0 || ret >= sizeof(dev->devName)) { pr_err("%s: Probe: Error in snprintf() while formatting device name\n", MOD_NAME); - probeReturn = -EINVAL; // Return directly with an error code + probeReturn = -EINVAL; // Return directly with an error code goto err_pre_en; } @@ -189,10 +189,10 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { ret = pci_enable_device(pcidev); if (ret) { pr_err("%s: Probe: pci_enable_device() = %i.\n", MOD_NAME, ret); - probeReturn = ret; // Return with error code + probeReturn = ret; // Return with error code goto err_pre_en; } - pci_set_master(pcidev); // Set the device as bus master + pci_set_master(pcidev); // Set the device as bus master // Retrieve and store the base address and size of the device's register space dev->baseAddr = pci_resource_start(pcidev, 0); @@ -200,7 +200,7 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { // Map the device's register space for use in the driver if ( Dma_MapReg(dev) < 0 ) { - probeReturn = -ENOMEM; // Memory allocation error + probeReturn = -ENOMEM; // Memory allocation error goto err_post_en; } @@ -215,27 +215,27 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { dev->irq = pcidev->irq; // Set basic device context - dev->pcidev = pcidev; // PCI device structure - dev->device = &(pcidev->dev); // Device structure - dev->hwFunc = hfunc; // Hardware function pointer + dev->pcidev = pcidev; // PCI device structure + dev->device = &(pcidev->dev); // Device structure + dev->hwFunc = hfunc; // Hardware function pointer // Initialize device memory regions - dev->reg = dev->base + AGEN2_OFF; // Register base address - dev->rwBase = dev->base + PHY_OFF; // Read/Write base address - dev->rwSize = (2*USER_SIZE) - PHY_OFF; // Read/Write region size + dev->reg = dev->base + AGEN2_OFF; // Register base address + dev->rwBase = dev->base + PHY_OFF; // Read/Write base address + dev->rwSize = (2*USER_SIZE) - PHY_OFF; // Read/Write region size // GPU Init Gpu_Init(dev, GPU_OFF); // Manage device reset cycle dev_info(dev->device,"Init: Setting user reset\n"); - AxiVersion_SetUserReset(dev->base + AVER_OFF,true); // Set user reset + AxiVersion_SetUserReset(dev->base + AVER_OFF,true); // Set user reset dev_info(dev->device,"Init: Clearing user reset\n"); - AxiVersion_SetUserReset(dev->base + AVER_OFF,false); // Clear user reset + AxiVersion_SetUserReset(dev->base + AVER_OFF,false); // Clear user reset // Configure DMA based on AXI address width: 128bit desc, = 64-bit address map if ((readl(dev->reg) & 0x10000) != 0) { - axiWidth = (readl(dev->reg + 0x34) >> 8) & 0xFF; // Extract AXI address width + axiWidth = (readl(dev->reg + 0x34) >> 8) & 0xFF; // Extract AXI address width // Attempt to set DMA and coherent DMA masks based on AXI width if (!dma_set_mask(dev->device, DMA_BIT_MASK(axiWidth))) { @@ -267,8 +267,8 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { dev_info(dev->device,"Init: Top Register = 0x%x\n",readl(dev->reg)); // Finalize device probe successfully - gDmaDevCount++; // Increment global device count - return 0; // Success + gDmaDevCount++; // Increment global device count + return 0; // Success err_post_en: pci_disable_device(pcidev); // Disable PCI device on failure diff --git a/include/AxiVersion.h b/include/AxiVersion.h index e6d7c0f..210aaf4 100755 --- a/include/AxiVersion.h +++ b/include/AxiVersion.h @@ -82,5 +82,5 @@ struct AxiVersion { return(ioctl(fd, AVER_Get, aVer)); } -#endif // !DMA_IN_KERNEL -#endif // __AXI_VERSION_H__ +#endif // !DMA_IN_KERNEL +#endif // __AXI_VERSION_H__ diff --git a/include/AxisDriver.h b/include/AxisDriver.h index 104b982..9fdcf54 100755 --- a/include/AxisDriver.h +++ b/include/AxisDriver.h @@ -44,9 +44,9 @@ static inline uint32_t axisSetFlags(uint32_t fuser, uint32_t luser, uint32_t con uint32_t flags; // Set flags based on input parameters, ensuring each is in its correct position - flags = fuser & 0xFF; // First user-defined flag - flags |= (luser << 8) & 0xFF00; // Last user-defined flag - flags |= (cont << 16) & 0x10000; // Continuation flag + flags = fuser & 0xFF; // First user-defined flag + flags |= (luser << 8) & 0xFF00; // Last user-defined flag + flags |= (cont << 16) & 0x10000; // Continuation flag return flags; } @@ -102,5 +102,5 @@ static inline void axisWriteReqMissed(int32_t fd) { ioctl(fd, AXIS_Write_ReqMissed, 0); } -#endif // !DMA_IN_KERNEL -#endif // __ASIS_DRIVER_H__ +#endif // !DMA_IN_KERNEL +#endif // __ASIS_DRIVER_H__ diff --git a/include/DataDriver.h b/include/DataDriver.h index 620eced..ed87768 100755 --- a/include/DataDriver.h +++ b/include/DataDriver.h @@ -24,4 +24,4 @@ #include // Direct Memory Access (DMA) Driver #include // Kernel AXI Version Interface -#endif // __DATA_DRIVER_H__ +#endif // __DATA_DRIVER_H__ diff --git a/include/GpuAsync.h b/include/GpuAsync.h index b983947..c874052 100755 --- a/include/GpuAsync.h +++ b/include/GpuAsync.h @@ -85,5 +85,5 @@ static inline ssize_t gpuRemNvidiaMemory(int32_t fd) { return(ioctl(fd, GPU_Rem_Nvidia_Memory, 0)); } -#endif // !DMA_IN_KERNEL -#endif // __GPU_ASYNC_H__ +#endif // !DMA_IN_KERNEL +#endif // __GPU_ASYNC_H__ diff --git a/petalinux/aximemorymap/files/aximemorymap.c b/petalinux/aximemorymap/files/aximemorymap.c index 41c5643..cbd5d8d 100644 --- a/petalinux/aximemorymap/files/aximemorymap.c +++ b/petalinux/aximemorymap/files/aximemorymap.c @@ -116,8 +116,8 @@ char *Map_DevNode(struct device *dev, umode_t *mode) { #else char *Map_DevNode(const struct device *dev, umode_t *mode) { #endif - if (mode != NULL) *mode = 0666; // Set default permissions to read and write for user, group, and others - return NULL; // Return NULL as no specific device node name alteration is required + if (mode != NULL) *mode = 0666; // Set default permissions to read and write for user, group, and others + return NULL; // Return NULL as no specific device node name alteration is required } /** @@ -167,7 +167,7 @@ int Map_Init(void) { #endif if (IS_ERR(gCl)) { pr_err("%s: Init: Failed to create device class\n", MOD_NAME); - unregister_chrdev_region(dev.devNum, 1); // Clean up allocated resources + unregister_chrdev_region(dev.devNum, 1); // Clean up allocated resources return PTR_ERR(gCl); } gCl->devnode = Map_DevNode; @@ -175,7 +175,7 @@ int Map_Init(void) { // Step 5: Create a device file if (device_create(gCl, NULL, dev.devNum, NULL, dev.devName) == NULL) { pr_err("%s: Init: Failed to create device file\n", MOD_NAME); - class_destroy(gCl); // Clean up on failure + class_destroy(gCl); // Clean up on failure unregister_chrdev_region(dev.devNum, 1); return -1; } @@ -187,7 +187,7 @@ int Map_Init(void) { // Step 7: Add the character device if (cdev_add(&dev.charDev, dev.devNum, 1) == -1) { pr_err("%s: Init: Failed to add device file.\n", MOD_NAME); - device_destroy(gCl, dev.devNum); // Clean up on failure + device_destroy(gCl, dev.devNum); // Clean up on failure class_destroy(gCl); unregister_chrdev_region(dev.devNum, 1); return -1; @@ -197,7 +197,7 @@ int Map_Init(void) { dev.maps = (struct MemMap *)kzalloc(sizeof(struct MemMap), GFP_KERNEL); if (dev.maps == NULL) { pr_err("%s: Init: Could not allocate map memory\n", MOD_NAME); - cdev_del(&dev.charDev); // Clean up on failure + cdev_del(&dev.charDev); // Clean up on failure device_destroy(gCl, dev.devNum); class_destroy(gCl); unregister_chrdev_region(dev.devNum, 1); @@ -210,7 +210,7 @@ int Map_Init(void) { dev.maps->base = ioremap_wc(dev.maps->addr, MAP_SIZE); if (!dev.maps->base) { pr_err("%s: Init: Could not map memory addr 0x%llx with size 0x%x.\n", MOD_NAME, (uint64_t)dev.maps->addr, MAP_SIZE); - kfree(dev.maps); // Clean up on failure + kfree(dev.maps); // Clean up on failure cdev_del(&dev.charDev); device_destroy(gCl, dev.devNum); class_destroy(gCl); @@ -335,8 +335,8 @@ uint8_t *Map_Find(uint64_t addr) { return NULL; } - new->addr = (addr / MAP_SIZE) * MAP_SIZE; // Align to MAP_SIZE - new->base = ioremap_wc(new->addr, MAP_SIZE); // Map physical address + new->addr = (addr / MAP_SIZE) * MAP_SIZE; // Align to MAP_SIZE + new->base = ioremap_wc(new->addr, MAP_SIZE); // Map physical address if (!new->base) { pr_err("%s: Map_Find: Could not map memory addr 0x%llx (0x%llx) with size 0x%x.\n", MOD_NAME, (uint64_t)new->addr, (uint64_t)addr, MAP_SIZE); @@ -372,7 +372,7 @@ uint8_t *Map_Find(uint64_t addr) { ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { struct DmaRegisterData rData; uint8_t *base; - ssize_t ret = -1; // Default return value for error + ssize_t ret = -1; // Default return value for error // Determine which IOCTL command is being executed switch (cmd) { @@ -389,7 +389,7 @@ ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { if ((base = Map_Find(rData.address)) != NULL) { // Write data to the register writel(rData.data, base); - ret = 0; // Success + ret = 0; // Success } else { pr_warn("%s: Dma_Write_Register: Map_Find failed.\n", MOD_NAME); } @@ -407,7 +407,7 @@ ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { rData.data = readl(base); // Put the updated register data back to user space if (!put_user(rData.data, &((struct DmaRegisterData __user *)arg)->data)) {//NOLINT - ret = 0; // Success + ret = 0; // Success } else { pr_warn("%s: Dma_Read_Register: put_user failed.\n", MOD_NAME); } @@ -424,7 +424,7 @@ ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { pr_warn("%s: Map_Ioctl: Unsupported IOCTL command.\n", MOD_NAME); } - return ret; // Return the result + return ret; // Return the result } /** @@ -468,7 +468,7 @@ ssize_t Map_Read(struct file *filp, char *buffer, size_t count, loff_t *f_pos) { * Return: On success, the number of bytes written. On error, a negative value. */ ssize_t Map_Write(struct file *filp, const char* buffer, size_t count, loff_t* f_pos) { - return -1; // DMA write operation is not supported + return -1; // DMA write operation is not supported } /** diff --git a/petalinux/aximemorymap/files/aximemorymap.h b/petalinux/aximemorymap/files/aximemorymap.h index babdacd..a08f830 100755 --- a/petalinux/aximemorymap/files/aximemorymap.h +++ b/petalinux/aximemorymap/files/aximemorymap.h @@ -85,4 +85,4 @@ ssize_t Map_Write(struct file *filp, const char *buffer, size_t count, loff_t *f uint8_t *Map_Find(uint64_t addr); ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg); -#endif // __AXI_MEMORY_MAP_H__ +#endif // __AXI_MEMORY_MAP_H__ diff --git a/petalinux/axistreamdma/files/axistreamdma.c b/petalinux/axistreamdma/files/axistreamdma.c index 664319b..719cb2e 100755 --- a/petalinux/axistreamdma/files/axistreamdma.c +++ b/petalinux/axistreamdma/files/axistreamdma.c @@ -76,11 +76,11 @@ const char *RceDevNames[MAX_DMA_DEVICES] = { }; /* Module metadata */ -#define MOD_NAME "axi_stream_dma" ///< Module name +#define MOD_NAME "axi_stream_dma" ///< Module name -MODULE_AUTHOR("Ryan Herbst"); ///< Module author -MODULE_DESCRIPTION("AXI Stream DMA driver. V3"); ///< Module description -MODULE_LICENSE("GPL"); ///< Module license +MODULE_AUTHOR("Ryan Herbst"); ///< Module author +MODULE_DESCRIPTION("AXI Stream DMA driver. V3"); ///< Module description +MODULE_LICENSE("GPL"); ///< Module license /** * Rce_runtime_suspend - Suspend routine for runtime power management. @@ -242,7 +242,7 @@ int Rce_Probe(struct platform_device *pdev) { dev->cfgMode = cfgMode2; break; default: - return -1; // Invalid index + return -1; // Invalid index } // Instance-independent configuration @@ -271,7 +271,7 @@ int Rce_Probe(struct platform_device *pdev) { // Initialize DMA and check for success if (Dma_Init(dev) < 0) - return -1; // Return error if DMA initialization fails + return -1; // Return error if DMA initialization fails // Successful DMA initialization increments device count gDmaDevCount++; diff --git a/rce_memmap/driver/src/rce_map.c b/rce_memmap/driver/src/rce_map.c index a453879..d19a05c 100755 --- a/rce_memmap/driver/src/rce_map.c +++ b/rce_memmap/driver/src/rce_map.c @@ -151,7 +151,7 @@ void Map_Exit(void) { tmp = dev.maps; dev.maps = dev.maps->next; - //release_mem_region(tmp->addr, MAP_SIZE); + // release_mem_region(tmp->addr, MAP_SIZE); iounmap(tmp->base); kfree(tmp); } diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index c4e943b..00b12ec 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -355,7 +355,7 @@ int main(int argc, char **argv) { rxData[dCount]->dest = x; rxData[dCount]->fuser = args.fuser; rxData[dCount]->luser = args.luser; - rxData[dCount]->size = (args.size + (x*4)); // (lane * 4 + vc) * 4 + rxData[dCount]->size = (args.size + (x*4)); // (lane * 4 + vc) * 4 rxData[dCount]->dev = args.path; rxData[dCount]->idxEn = args.idxEn; rxData[dCount]->prbEn = !args.prbsDis; diff --git a/rce_stream/driver/src/axis_gen1.c b/rce_stream/driver/src/axis_gen1.c index 8e6bc5e..dd35cfa 100755 --- a/rce_stream/driver/src/axis_gen1.c +++ b/rce_stream/driver/src/axis_gen1.c @@ -111,7 +111,7 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Extract data from descriptor buff->count++; buff->size = size; - buff->flags = (status >> 8) & 0xFFFF; // 15:8 = luser, 7:0 = fuser + buff->flags = (status >> 8) & 0xFFFF; // 15:8 = luser, 7:0 = fuser buff->dest = (status >> 0) & 0x00FF; buff->error = (size == 0)?DMA_ERR_FIFO:0; @@ -262,7 +262,7 @@ int32_t AxisG1_SendBuffer(struct DmaDevice *dev, struct DmaBuffer **buff, uint32 for (x=0; x < count; x++) { // Create descriptor control = (buff[x]->dest << 0) & 0x000000FF; - control += (buff[x]->flags << 8) & 0x00FFFF00; // flags[15:9] = luser, flags[7:0] = fuser + control += (buff[x]->flags << 8) & 0x00FFFF00; // flags[15:9] = luser, flags[7:0] = fuser if ( dmaBufferToHw(buff[x]) < 0 ) { dev_warn(dev->device,"SendBuffer: Failed to map dma buffer.\n"); diff --git a/rce_stream/driver/src/axis_gen1.h b/rce_stream/driver/src/axis_gen1.h index 12a7f2e..02a2124 100755 --- a/rce_stream/driver/src/axis_gen1.h +++ b/rce_stream/driver/src/axis_gen1.h @@ -28,25 +28,25 @@ #include "dma_buffer.h" struct AxisG1Reg { - uint32_t rxEnable; // 0x00000 - uint32_t txEnable; // 0x00004 - uint32_t fifoClear; // 0x00008 - uint32_t intEnable; // 0x0000C - uint32_t fifoValid; // 0x00010 - uint32_t maxRxSize; // 0x00014 - uint32_t onlineAck; // 0x00018 - uint32_t intPendAck; // 0x0001C - uint32_t swCache; // 0x00020 - uint32_t spareA[16384-9]; // 0x00024 - 0x0FFFC - uint32_t rxPend; // 0x10000 - uint32_t txFree; // 0x10004 - uint32_t spareB[126]; // 0x10008 - 0x101FC - uint32_t rxFree; // 0x10200 - uint32_t spaceC[15]; // 0x10204 - 0x1023C - uint32_t txPostA; // 0x10240 - uint32_t txPostB; // 0x10244 - uint32_t txPostC; // 0x10248 - uint32_t txPass; // 0x1024C + uint32_t rxEnable; // 0x00000 + uint32_t txEnable; // 0x00004 + uint32_t fifoClear; // 0x00008 + uint32_t intEnable; // 0x0000C + uint32_t fifoValid; // 0x00010 + uint32_t maxRxSize; // 0x00014 + uint32_t onlineAck; // 0x00018 + uint32_t intPendAck; // 0x0001C + uint32_t swCache; // 0x00020 + uint32_t spareA[16384-9]; // 0x00024 - 0x0FFFC + uint32_t rxPend; // 0x10000 + uint32_t txFree; // 0x10004 + uint32_t spareB[126]; // 0x10008 - 0x101FC + uint32_t rxFree; // 0x10200 + uint32_t spaceC[15]; // 0x10204 - 0x1023C + uint32_t txPostA; // 0x10240 + uint32_t txPostB; // 0x10244 + uint32_t txPostC; // 0x10248 + uint32_t txPass; // 0x1024C }; // Interrupt handler @@ -76,5 +76,4 @@ void AxisG1_SeqShow(struct seq_file *s, struct DmaDevice *dev); // Set functions for gen2 card extern struct hardware_functions AxisG1_functions; -#endif - +#endif // __AXIS_GEN1_H__ diff --git a/rce_stream/driver/src/rce_top.h b/rce_stream/driver/src/rce_top.h index c0d374d..46e4094 100755 --- a/rce_stream/driver/src/rce_top.h +++ b/rce_stream/driver/src/rce_top.h @@ -54,4 +54,4 @@ int Rce_Probe(struct platform_device *pdev); */ int Rce_Remove(struct platform_device *pdev); -#endif // __RCE_TOP_H__ +#endif // __RCE_TOP_H__ From 57309b936516bff0b9cf2ec4c608cc2d84ad41ea Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 10:47:32 -0700 Subject: [PATCH 16/23] resolving c++ linter Missing space after , [whitespace/comma] --- CPPLINT.cfg | 1 - common/driver/axi_version.c | 36 +++--- common/driver/axis_gen2.c | 132 ++++++++++----------- common/driver/dma_buffer.c | 18 +-- common/driver/dma_common.c | 172 ++++++++++++++-------------- common/driver/gpu_async.c | 8 +- data_dev/driver/src/data_dev_top.c | 46 ++++---- data_gpu/driver/src/data_gpu_top.c | 16 +-- rce_hp_buffers/driver/src/rce_hp.c | 22 ++-- rce_hp_buffers/driver/src/rce_top.c | 12 +- rce_memmap/driver/src/rce_map.c | 30 ++--- rce_stream/app/src/dmaLoopTest.cpp | 141 +++++++++++------------ rce_stream/app/src/dmaRead.cpp | 56 ++++----- rce_stream/app/src/dmaSetDebug.cpp | 16 +-- rce_stream/app/src/dmaWrite.cpp | 58 +++++----- rce_stream/driver/src/axis_gen1.c | 104 ++++++++--------- rce_stream/driver/src/rce_top.c | 40 +++---- 17 files changed, 453 insertions(+), 455 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index af4556a..1c36827 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -37,4 +37,3 @@ filter=-build/namespaces # TODO: Need to resolve these before pull request filter=-whitespace/indent filter=-whitespace/newline -filter=-whitespace/comma diff --git a/common/driver/axi_version.c b/common/driver/axi_version.c index 692f0de..451c161 100755 --- a/common/driver/axi_version.c +++ b/common/driver/axi_version.c @@ -121,37 +121,37 @@ void AxiVersion_Show(struct seq_file *s, struct DmaDevice *dev, struct AxiVersio int32_t x; bool gitDirty = true; - seq_printf(s,"---------- Firmware Axi Version -----------\n"); - seq_printf(s," Firmware Version : 0x%x\n",aVer->firmwareVersion); - seq_printf(s," ScratchPad : 0x%x\n",aVer->scratchPad); - seq_printf(s," Up Time Count : %u\n",aVer->upTimeCount); - - // seq_printf(s," Fd Value : 0x"); - // for (x=0; x < 8; x++) seq_printf(s,"%.02x",aVer->fdValue[8-x]); - // seq_printf(s,"\n"); + seq_printf(s, "---------- Firmware Axi Version -----------\n"); + seq_printf(s, " Firmware Version : 0x%x\n", aVer->firmwareVersion); + seq_printf(s, " ScratchPad : 0x%x\n", aVer->scratchPad); + seq_printf(s, " Up Time Count : %u\n", aVer->upTimeCount); + + // seq_printf(s, " Fd Value : 0x"); + // for (x=0; x < 8; x++) seq_printf(s, "%.02x", aVer->fdValue[8-x]); + // seq_printf(s, "\n"); // for (x=0; x < 64; x++) - // seq_printf(s," User Values : 0x%x\n",aVer->userValues[x]); - // seq_printf(s," Device ID : 0x%x\n",aVer->deviceId); + // seq_printf(s, " User Values : 0x%x\n", aVer->userValues[x]); + // seq_printf(s, " Device ID : 0x%x\n", aVer->deviceId); // Git hash processing to determine if code is 'dirty' - seq_printf(s," Git Hash : "); + seq_printf(s, " Git Hash : "); for (x=0; x < 20; x++) { if ( aVer->gitHash[19-x] != 0 ) gitDirty = false; } if ( gitDirty ) { - seq_printf(s,"dirty (uncommitted code)"); + seq_printf(s, "dirty (uncommitted code)"); } else { - for (x=0; x < 20; x++) seq_printf(s,"%.02x",aVer->gitHash[19-x]); + for (x=0; x < 20; x++) seq_printf(s, "%.02x", aVer->gitHash[19-x]); } - seq_printf(s,"\n"); + seq_printf(s, "\n"); // Displaying DNA value - seq_printf(s," DNA Value : 0x"); - for (x=0; x < 16; x++) seq_printf(s,"%.02x",aVer->dnaValue[15-x]); - seq_printf(s,"\n"); + seq_printf(s, " DNA Value : 0x"); + for (x=0; x < 16; x++) seq_printf(s, "%.02x", aVer->dnaValue[15-x]); + seq_printf(s, "\n"); // Build string display - seq_printf(s," Build String : %s\n",aVer->buildString); + seq_printf(s, " Build String : %s\n", aVer->buildString); } /** diff --git a/common/driver/axis_gen2.c b/common/driver/axis_gen2.c index 1831a23..a78c415 100755 --- a/common/driver/axis_gen2.c +++ b/common/driver/axis_gen2.c @@ -106,10 +106,10 @@ inline uint8_t AxisG2_MapReturn(struct DmaDevice * dev, struct AxisG2Return *ret // Logging for debug purposes if ( dev->debug > 0 ) - dev_info(dev->device,"MapReturn: desc idx %i, raw 0x%x, 0x%x, 0x%x, 0x%x\n",index,ptr[0],ptr[1],ptr[2],ptr[3]); + dev_info(dev->device, "MapReturn: desc idx %i, raw 0x%x, 0x%x, 0x%x, 0x%x\n", index, ptr[0], ptr[1], ptr[2], ptr[3]); // Clear the processed descriptor area - memset(ptr,0,(desc128En?16:8)); + memset(ptr, 0, (desc128En?16:8)); return 1; } @@ -233,22 +233,22 @@ uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct Ax ////////////////// Transmit Buffers ///////////////////////// // Check read (transmit) returns - while ( AxisG2_MapReturn(dev,&ret,hwData->desc128En,hwData->readIndex,hwData->readAddr) ) { + while ( AxisG2_MapReturn(dev, &ret, hwData->desc128En, hwData->readIndex, hwData->readAddr) ) { ++handleCount; --(hwData->hwRdBuffCnt); - if ( dev->debug > 0 ) dev_info(dev->device,"Process: Got TX Descriptor: Idx=%i, Pos=%i\n",ret.index,hwData->readIndex); + if ( dev->debug > 0 ) dev_info(dev->device, "Process: Got TX Descriptor: Idx=%i, Pos=%i\n", ret.index, hwData->readIndex); // Attempt to find buffer in tx pool and return. otherwise return rx entry to hw. // Must adjust counters here and check for buffer need - if ((buff = dmaRetBufferIdxIrq(dev,ret.index)) != NULL) { + if ((buff = dmaRetBufferIdxIrq(dev, ret.index)) != NULL) { // Add to receive/write software queue if ( hwData->hwWrBuffCnt >= (hwData->addrCount-1) ) { - dmaQueuePushIrq(&(hwData->wrQueue),buff); + dmaQueuePushIrq(&(hwData->wrQueue), buff); } else { // Add directly to receive/write hardware queue ++(hwData->hwWrBuffCnt); - AxisG2_WriteFree(buff,reg,hwData->desc128En); + AxisG2_WriteFree(buff, reg, hwData->desc128En); } } hwData->readIndex = ((hwData->readIndex+1) % hwData->addrCount); @@ -258,7 +258,7 @@ uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct Ax if ( hwData->desc128En ) { while ( (hwData->hwRdBuffCnt < (hwData->addrCount-1)) && ((buff = dmaQueuePopIrq(&(hwData->rdQueue))) != NULL) ) { // Write to hardware - AxisG2_WriteTx(buff,reg,hwData->desc128En); + AxisG2_WriteTx(buff, reg, hwData->desc128En); ++hwData->hwRdBuffCnt; } } @@ -269,13 +269,13 @@ uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct Ax spin_lock(&dev->maskLock); // Check write (receive) descriptors - while ( AxisG2_MapReturn(dev,&ret,hwData->desc128En,hwData->writeIndex,hwData->writeAddr) ) { + while ( AxisG2_MapReturn(dev, &ret, hwData->desc128En, hwData->writeIndex, hwData->writeAddr) ) { ++handleCount; --(hwData->hwWrBuffCnt); - if ( dev->debug > 0 ) dev_info(dev->device,"Process: Got RX Descriptor: Idx=%i, Pos=%i\n",ret.index,hwData->writeIndex); + if ( dev->debug > 0 ) dev_info(dev->device, "Process: Got RX Descriptor: Idx=%i, Pos=%i\n", ret.index, hwData->writeIndex); - if ( (buff = dmaGetBufferList(&(dev->rxBuffers),ret.index)) != NULL ) { + if ( (buff = dmaGetBufferList(&(dev->rxBuffers), ret.index)) != NULL ) { // Set buffer properties based on descriptor info buff->count++; @@ -291,7 +291,7 @@ uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct Ax hwData->contCount += ret.cont; if ( dev->debug > 0 ) { - dev_info(dev->device,"Process: Rx size=%i, Dest=0x%x, fuser=0x%x, luser=0x%x, cont=%i, Error=0x%x\n", + dev_info(dev->device, "Process: Rx size=%i, Dest=0x%x, fuser=0x%x, luser=0x%x, cont=%i, Error=0x%x\n", ret.size, ret.dest, ret.fuser, ret.luser, ret.cont, buff->error); } @@ -304,24 +304,24 @@ uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct Ax // Return entry to FPGA if descriptor is not open if ( desc == NULL ) { - if ( dev->debug > 0 ) dev_info(dev->device,"Process: Port not open return to free list.\n"); + if ( dev->debug > 0 ) dev_info(dev->device, "Process: Port not open return to free list.\n"); if (hwData->hwWrBuffCnt < (hwData->addrCount-1)) { - AxisG2_WriteFree(buff,reg,hwData->desc128En); + AxisG2_WriteFree(buff, reg, hwData->desc128En); ++hwData->hwWrBuffCnt; } - else dmaQueuePushIrq(&(hwData->wrQueue),buff); + else dmaQueuePushIrq(&(hwData->wrQueue), buff); // Background operation handling if ( (hwData->bgEnable >> buff->id) & 0x1 ) { - writel(0x1,&(reg->bgCount[buff->id])); + writel(0x1, &(reg->bgCount[buff->id])); } } // Lane/VC is open; add to RX queue - else dmaRxBufferIrq(desc,buff); + else dmaRxBufferIrq(desc, buff); } - else dev_warn(dev->device,"Process: Failed to locate RX buffer index %i.\n", ret.index); + else dev_warn(dev->device, "Process: Failed to locate RX buffer index %i.\n", ret.index); // Update write index hwData->writeIndex = ((hwData->writeIndex+1) % hwData->addrCount); @@ -335,9 +335,9 @@ uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct Ax do { rCnt = ((hwData->addrCount-1) - hwData->hwWrBuffCnt); if (rCnt > BUFF_LIST_SIZE ) rCnt = BUFF_LIST_SIZE; - bCnt = dmaQueuePopListIrq(&(hwData->wrQueue),hwData->buffList,rCnt); + bCnt = dmaQueuePopListIrq(&(hwData->wrQueue), hwData->buffList, rCnt); for (x=0; x < bCnt; x++) { - AxisG2_WriteFree(hwData->buffList[x],reg,hwData->desc128En); + AxisG2_WriteFree(hwData->buffList[x], reg, hwData->desc128En); ++hwData->hwWrBuffCnt; } } while (bCnt > 0); @@ -404,10 +404,10 @@ void AxisG2_Init(struct DmaDevice *dev) { reg = (struct AxisG2Reg *)dev->reg; // Initialize destination mask to all 1's - memset(dev->destMask,0xFF,DMA_MASK_SIZE); + memset(dev->destMask, 0xFF, DMA_MASK_SIZE); // Allocate and initialize hardware data structure - hwData = (struct AxisG2Data *)kzalloc(sizeof(struct AxisG2Data),GFP_KERNEL); + hwData = (struct AxisG2Data *)kzalloc(sizeof(struct AxisG2Data), GFP_KERNEL); dev->hwData = hwData; hwData->dev = dev; @@ -420,9 +420,9 @@ void AxisG2_Init(struct DmaDevice *dev) { // Initialize software queues if in 128-bit descriptor mode if ( hwData->desc128En ) { - dmaQueueInit(&hwData->wrQueue,dev->rxBuffers.count); - dmaQueueInit(&hwData->rdQueue,dev->txBuffers.count + dev->rxBuffers.count); - hwData->buffList = (struct DmaBuffer **)kzalloc(BUFF_LIST_SIZE * sizeof(struct DmaBuffer *),GFP_ATOMIC); + dmaQueueInit(&hwData->wrQueue, dev->rxBuffers.count); + dmaQueueInit(&hwData->rdQueue, dev->txBuffers.count + dev->rxBuffers.count); + hwData->buffList = (struct DmaBuffer **)kzalloc(BUFF_LIST_SIZE * sizeof(struct DmaBuffer *), GFP_ATOMIC); } // Calculate and set the addressable space based on register settings @@ -443,19 +443,19 @@ void AxisG2_Init(struct DmaDevice *dev) { } // Log buffer addresses - dev_info(dev->device,"Init: Read ring at: sw 0x%llx -> hw 0x%llx.\n",(uint64_t)hwData->readAddr,(uint64_t)hwData->readHandle); - dev_info(dev->device,"Init: Write ring at: sw 0x%llx -> hw 0x%llx.\n",(uint64_t)hwData->writeAddr,(uint64_t)hwData->writeHandle); + dev_info(dev->device, "Init: Read ring at: sw 0x%llx -> hw 0x%llx.\n", (uint64_t)hwData->readAddr, (uint64_t)hwData->readHandle); + dev_info(dev->device, "Init: Write ring at: sw 0x%llx -> hw 0x%llx.\n", (uint64_t)hwData->writeAddr, (uint64_t)hwData->writeHandle); // Initialize read ring buffer addresses and indices - writel(hwData->readHandle&0xFFFFFFFF,&(reg->rdBaseAddrLow)); - writel((hwData->readHandle >> 32)&0xFFFFFFFF,&(reg->rdBaseAddrHigh)); - memset(hwData->readAddr,0,size); + writel(hwData->readHandle&0xFFFFFFFF, &(reg->rdBaseAddrLow)); + writel((hwData->readHandle >> 32)&0xFFFFFFFF, &(reg->rdBaseAddrHigh)); + memset(hwData->readAddr, 0, size); hwData->readIndex = 0; // Initialize write ring buffer addresses and indices - writel(hwData->writeHandle&0xFFFFFFFF,&(reg->wrBaseAddrLow)); - writel((hwData->writeHandle>>32)&0xFFFFFFFF,&(reg->wrBaseAddrHigh)); - memset(hwData->writeAddr,0,size); + writel(hwData->writeHandle&0xFFFFFFFF, &(reg->wrBaseAddrLow)); + writel((hwData->writeHandle>>32)&0xFFFFFFFF, &(reg->wrBaseAddrHigh)); + memset(hwData->writeAddr, 0, size); hwData->writeIndex = 0; // Initialize interrupt and continuity counters @@ -470,35 +470,35 @@ void AxisG2_Init(struct DmaDevice *dev) { writel(x, &(reg->cacheConfig)); // Set maximum transfer size - writel(dev->cfgSize,&(reg->maxSize)); + writel(dev->cfgSize, &(reg->maxSize)); // Reset FIFOs to clear any residual data - writel(0x1,&(reg->fifoReset)); - writel(0x0,&(reg->fifoReset)); + writel(0x1, &(reg->fifoReset)); + writel(0x0, &(reg->fifoReset)); // Enable continuous mode and disable drop mode - writel(0x1,&(reg->contEnable)); - writel(0x0,&(reg->dropEnable)); + writel(0x1, &(reg->contEnable)); + writel(0x0, &(reg->dropEnable)); // Set IRQ holdoff time if supported by hardware version - if ( ((readl(&(reg->enableVer)) >> 24) & 0xFF) >= 3 ) writel(dev->cfgIrqHold,&(reg->irqHoldOff)); + if ( ((readl(&(reg->enableVer)) >> 24) & 0xFF) >= 3 ) writel(dev->cfgIrqHold, &(reg->irqHoldOff)); // Push RX buffers to hardware and map for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->rxBuffers),x); + buff = dmaGetBufferList(&(dev->rxBuffers), x); // Map failure if ( dmaBufferToHw(buff) < 0 ) { - dev_warn(dev->device,"Init: Failed to map dma buffer.\n"); + dev_warn(dev->device, "Init: Failed to map dma buffer.\n"); // Add to software queue, if enabled and hardware is full } else if ( hwData->desc128En && (hwData->hwWrBuffCnt >= (hwData->addrCount-1)) ) { - dmaQueuePush(&(hwData->wrQueue),buff); + dmaQueuePush(&(hwData->wrQueue), buff); // Add to hardware queue } else { ++hwData->hwWrBuffCnt; - AxisG2_WriteFree(buff,reg,hwData->desc128En); + AxisG2_WriteFree(buff, reg, hwData->desc128En); } } @@ -507,11 +507,11 @@ void AxisG2_Init(struct DmaDevice *dev) { if ( ((readl(&(reg->enableVer)) >> 24) & 0xFF) >= 4 ) { for (x =0; x < 8; x++) { if ( dev->cfgBgThold[x] != 0 ) hwData->bgEnable |= (1 << x); - writel(dev->cfgBgThold[x],&(reg->bgThold[x])); + writel(dev->cfgBgThold[x], &(reg->bgThold[x])); } } - dev_info(dev->device,"Init: Found Version 2 Device. Desc128En=%i\n",hwData->desc128En); + dev_info(dev->device, "Init: Found Version 2 Device. Desc128En=%i\n", hwData->desc128En); } /** @@ -794,30 +794,30 @@ void AxisG2_SeqShow(struct seq_file *s, struct DmaDevice *dev) { reg = (struct AxisG2Reg *)dev->reg; hwData = (struct AxisG2Data *)dev->hwData; - seq_printf(s,"\n"); - seq_printf(s,"---------- DMA Firmware General ----------\n"); - seq_printf(s," Int Req Count : %u\n",(readl(&(reg->intReqCount)))); -// seq_printf(s," Hw Dma Wr Index : %u\n",(readl(&(reg->hwWrIndex)))); -// seq_printf(s," Sw Dma Wr Index : %u\n",hwData->writeIndex); -// seq_printf(s," Hw Dma Rd Index : %u\n",(readl(&(reg->hwRdIndex)))); -// seq_printf(s," Sw Dma Rd Index : %u\n",hwData->readIndex); -// seq_printf(s," Missed Wr Requests : %u\n",(readl(&(reg->wrReqMissed)))); -// seq_printf(s," Missed IRQ Count : %u\n",hwData->missedIrq); - seq_printf(s," Continue Count : %u\n",hwData->contCount); - seq_printf(s," Address Count : %i\n",hwData->addrCount); - seq_printf(s," Hw Write Buff Count : %i\n",hwData->hwWrBuffCnt); - seq_printf(s," Hw Read Buff Count : %i\n",hwData->hwRdBuffCnt); - seq_printf(s," Cache Config : 0x%x\n",(readl(&(reg->cacheConfig)))); - seq_printf(s," Desc 128 En : %i\n",hwData->desc128En); - seq_printf(s," Enable Ver : 0x%x\n",(readl(&(reg->enableVer)))); - seq_printf(s," Driver Load Count : %u\n",((readl(&(reg->enableVer)))>>8)&0xFF); - seq_printf(s," IRQ Hold : %u\n",(readl(&(reg->irqHoldOff)))); - seq_printf(s," BG Enable : 0x%x\n",hwData->bgEnable); + seq_printf(s, "\n"); + seq_printf(s, "---------- DMA Firmware General ----------\n"); + seq_printf(s, " Int Req Count : %u\n", (readl(&(reg->intReqCount)))); +// seq_printf(s, " Hw Dma Wr Index : %u\n", (readl(&(reg->hwWrIndex)))); +// seq_printf(s, " Sw Dma Wr Index : %u\n", hwData->writeIndex); +// seq_printf(s, " Hw Dma Rd Index : %u\n", (readl(&(reg->hwRdIndex)))); +// seq_printf(s, " Sw Dma Rd Index : %u\n", hwData->readIndex); +// seq_printf(s, " Missed Wr Requests : %u\n", (readl(&(reg->wrReqMissed)))); +// seq_printf(s, " Missed IRQ Count : %u\n", hwData->missedIrq); + seq_printf(s, " Continue Count : %u\n", hwData->contCount); + seq_printf(s, " Address Count : %i\n", hwData->addrCount); + seq_printf(s, " Hw Write Buff Count : %i\n", hwData->hwWrBuffCnt); + seq_printf(s, " Hw Read Buff Count : %i\n", hwData->hwRdBuffCnt); + seq_printf(s, " Cache Config : 0x%x\n", (readl(&(reg->cacheConfig)))); + seq_printf(s, " Desc 128 En : %i\n", hwData->desc128En); + seq_printf(s, " Enable Ver : 0x%x\n", (readl(&(reg->enableVer)))); + seq_printf(s, " Driver Load Count : %u\n", ((readl(&(reg->enableVer)))>>8)&0xFF); + seq_printf(s, " IRQ Hold : %u\n", (readl(&(reg->irqHoldOff)))); + seq_printf(s, " BG Enable : 0x%x\n", hwData->bgEnable); for ( x=0; x < 8; x++ ) { if ( (hwData->bgEnable >> x) & 0x1 ) { - seq_printf(s," BG %i Threshold : %u\n",x,readl(&(reg->bgThold[x]))); - seq_printf(s," BG %i Count : %u\n",x,readl(&(reg->bgCount[x]))); + seq_printf(s, " BG %i Threshold : %u\n", x, readl(&(reg->bgThold[x]))); + seq_printf(s, " BG %i Count : %u\n", x, readl(&(reg->bgCount[x]))); } } } diff --git a/common/driver/dma_buffer.c b/common/driver/dma_buffer.c index 22888ba..f675daa 100755 --- a/common/driver/dma_buffer.c +++ b/common/driver/dma_buffer.c @@ -67,14 +67,14 @@ size_t dmaAllocBuffers(struct DmaDevice *dev, struct DmaBufferList *list, // Allocate first level pointers if ((list->indexed = (struct DmaBuffer ***)kzalloc(sizeof(struct DmaBuffer**) * list->subCount, GFP_KERNEL)) == NULL) { - dev_err(dev->device,"dmaAllocBuffers: Failed to allocate indexed list pointer. Count=%u.\n",list->subCount); + dev_err(dev->device, "dmaAllocBuffers: Failed to allocate indexed list pointer. Count=%u.\n", list->subCount); goto cleanup_forced_exit; } // Allocate sub lists for (x=0; x < list->subCount; x++) { if ((list->indexed[x] = (struct DmaBuffer **) kzalloc((sizeof(struct DmaBuffer *) * BUFFERS_PER_LIST), GFP_KERNEL)) == NULL) { - dev_err(dev->device,"dmaAllocBuffers: Failed to allocate sub list. Idx=%u.\n",x); + dev_err(dev->device, "dmaAllocBuffers: Failed to allocate sub list. Idx=%u.\n", x); goto cleanup_list_heads; } } @@ -90,12 +90,12 @@ size_t dmaAllocBuffers(struct DmaDevice *dev, struct DmaBufferList *list, sl = x / BUFFERS_PER_LIST; sli = x % BUFFERS_PER_LIST; if ((buff = (struct DmaBuffer *)kzalloc(sizeof(struct DmaBuffer), GFP_KERNEL)) == NULL) { - dev_err(dev->device,"dmaAllocBuffers: Failed to create buffer structure index %ui. Unloading.\n",x); + dev_err(dev->device, "dmaAllocBuffers: Failed to create buffer structure index %ui. Unloading.\n", x); goto cleanup_buffers; } // Init record - memset(buff,0,sizeof(struct DmaBuffer)); + memset(buff, 0, sizeof(struct DmaBuffer)); // Setup pointer back to list buff->buffList = list; @@ -112,7 +112,7 @@ size_t dmaAllocBuffers(struct DmaDevice *dev, struct DmaBufferList *list, if (buff->buffAddr != NULL) { buff->buffHandle = dma_map_single(list->dev->device, buff->buffAddr, list->dev->cfgSize, direction); // Check for mapping error - if ( dma_mapping_error(list->dev->device,buff->buffHandle) ) { + if ( dma_mapping_error(list->dev->device, buff->buffHandle) ) { // DMA mapping was successful buff->buffHandle = 0; } else { @@ -140,7 +140,7 @@ size_t dmaAllocBuffers(struct DmaDevice *dev, struct DmaBufferList *list, // Alloc or mapping failed if (buff->buffAddr == NULL || buff->buffHandle == 0) { - dev_err(dev->device,"dmaAllocBuffers: Failed to create stream buffer and dma mapping.\n"); + dev_err(dev->device, "dmaAllocBuffers: Failed to create stream buffer and dma mapping.\n"); goto cleanup_buffers; } @@ -154,7 +154,7 @@ size_t dmaAllocBuffers(struct DmaDevice *dev, struct DmaBufferList *list, } // Sort the buffers - if ( list->sorted != NULL ) sort(list->sorted,list->count,sizeof(struct DmaBuffer *),dmaSortComp,NULL); + if ( list->sorted != NULL ) sort(list->sorted, list->count, sizeof(struct DmaBuffer *), dmaSortComp, NULL); return list->count; @@ -909,7 +909,7 @@ struct DmaBuffer * dmaQueuePop(struct DmaQueue *queue ) { unsigned long iflags; struct DmaBuffer * ret; - spin_lock_irqsave(&(queue->lock),iflags); + spin_lock_irqsave(&(queue->lock), iflags); if ( queue->read == queue->write ) { ret = NULL; @@ -922,7 +922,7 @@ struct DmaBuffer * dmaQueuePop(struct DmaQueue *queue ) { // Mark the buffer as not in queue ret->inQ = 0; } - spin_unlock_irqrestore(&(queue->lock),iflags); + spin_unlock_irqrestore(&(queue->lock), iflags); return ret; } diff --git a/common/driver/dma_common.c b/common/driver/dma_common.c index c9404ba..c149e73 100755 --- a/common/driver/dma_common.c +++ b/common/driver/dma_common.c @@ -224,7 +224,7 @@ int Dma_Init(struct DmaDevice *dev) { // Allocate device numbers for character device. 1 minor numer starting at 0 res = alloc_chrdev_region(&(dev->devNum), 0, 1, dev->devName); if (res < 0) { - dev_err(dev->device,"Init: Cannot register char device\n"); + dev_err(dev->device, "Init: Cannot register char device\n"); return -1; } @@ -234,13 +234,13 @@ int Dma_Init(struct DmaDevice *dev) { // Add the character device if (cdev_add(&(dev->charDev), dev->devNum, 1) == -1) { - dev_err(dev->device,"Init: Failed to add device file.\n"); + dev_err(dev->device, "Init: Failed to add device file.\n"); goto cleanup_alloc_chrdev_region; } // Create class struct if it does not already exist if (gCl == NULL) { - dev_info(dev->device,"Init: Creating device class\n"); + dev_info(dev->device, "Init: Creating device class\n"); #if LINUX_VERSION_CODE < KERNEL_VERSION(6, 4, 0) gCl = class_create(THIS_MODULE, dev->devName); @@ -249,7 +249,7 @@ int Dma_Init(struct DmaDevice *dev) { #endif if (gCl == NULL) { - dev_err(dev->device,"Init: Failed to create device class\n"); + dev_err(dev->device, "Init: Failed to create device class\n"); goto cleanup_cdev_add; } @@ -258,20 +258,20 @@ int Dma_Init(struct DmaDevice *dev) { // Attempt to create the device if (device_create(gCl, NULL, dev->devNum, NULL, "%s", dev->devName) == NULL) { - dev_err(dev->device,"Init: Failed to create device file\n"); + dev_err(dev->device, "Init: Failed to create device file\n"); goto cleanup_class_create; } // Setup /proc if (NULL == proc_create_data(dev->devName, 0, NULL, &DmaProcOps, dev)) { - dev_err(dev->device,"Init: Failed to create proc entry.\n"); + dev_err(dev->device, "Init: Failed to create proc entry.\n"); goto cleanup_device_create; } // Remap the I/O register block for safe access if ( Dma_MapReg(dev) < 0 ) { - dev_err(dev->device,"Init: Failed to map register block.\n"); + dev_err(dev->device, "Init: Failed to map register block.\n"); goto cleanup_proc_create_data; } @@ -284,35 +284,35 @@ int Dma_Init(struct DmaDevice *dev) { spin_lock_init(&(dev->maskLock)); // Create TX buffers - dev_info(dev->device,"Init: Creating %i TX Buffers. Size=%i Bytes. Mode=%i.\n", - dev->cfgTxCount,dev->cfgSize,dev->cfgMode); + dev_info(dev->device, "Init: Creating %i TX Buffers. Size=%i Bytes. Mode=%i.\n", + dev->cfgTxCount, dev->cfgSize, dev->cfgMode); res = dmaAllocBuffers(dev, &(dev->txBuffers), dev->cfgTxCount, 0, DMA_TO_DEVICE); tot = res * dev->cfgSize; - dev_info(dev->device,"Init: Created %i out of %i TX Buffers. %llu Bytes.\n", res,dev->cfgTxCount,tot); + dev_info(dev->device, "Init: Created %i out of %i TX Buffers. %llu Bytes.\n", res, dev->cfgTxCount, tot); // Handle bad buffer allocation for TX if ( dev->cfgTxCount > 0 && res == 0 ) goto cleanup_dma_mapreg; // Initialize transmit queue - res = dmaQueueInit(&(dev->tq),dev->txBuffers.count); + res = dmaQueueInit(&(dev->tq), dev->txBuffers.count); if (res == 0 && dev->txBuffers.count > 0) { - dev_err(dev->device,"dmaQueueInit: Failed to initialize DMA queues.\n"); + dev_err(dev->device, "dmaQueueInit: Failed to initialize DMA queues.\n"); goto cleanup_tx_buffers; } // Populate transmit queue for (x=dev->txBuffers.baseIdx; x < (dev->txBuffers.baseIdx + dev->txBuffers.count); x++) - dmaQueuePush(&(dev->tq),dmaGetBufferList(&(dev->txBuffers),x)); + dmaQueuePush(&(dev->tq), dmaGetBufferList(&(dev->txBuffers), x)); // Create RX buffers, bidirectional because RX buffers can be passed to TX - dev_info(dev->device,"Init: Creating %i RX Buffers. Size=%i Bytes. Mode=%i.\n", - dev->cfgRxCount,dev->cfgSize,dev->cfgMode); + dev_info(dev->device, "Init: Creating %i RX Buffers. Size=%i Bytes. Mode=%i.\n", + dev->cfgRxCount, dev->cfgSize, dev->cfgMode); res = dmaAllocBuffers(dev, &(dev->rxBuffers), dev->cfgRxCount, dev->txBuffers.count, DMA_BIDIRECTIONAL); tot = res * dev->cfgSize; - dev_info(dev->device,"Init: Created %i out of %i RX Buffers. %llu Bytes.\n", res,dev->cfgRxCount,tot); + dev_info(dev->device, "Init: Created %i out of %i RX Buffers. %llu Bytes.\n", res, dev->cfgRxCount, tot); // Bad buffer allocation if ( dev->cfgRxCount > 0 && res == 0 ) @@ -323,12 +323,12 @@ int Dma_Init(struct DmaDevice *dev) { // Set interrupt if ( dev->irq != 0 ) { - dev_info(dev->device,"Init: IRQ %d\n", dev->irq); + dev_info(dev->device, "Init: IRQ %d\n", dev->irq); res = request_irq(dev->irq, dev->hwFunc->irq, IRQF_SHARED, dev->devName, (void*)dev); // Result of request IRQ from OS. if (res < 0) { - dev_err(dev->device,"Init: Unable to allocate IRQ."); + dev_err(dev->device, "Init: Unable to allocate IRQ."); goto cleanup_card_clear; } } @@ -358,7 +358,7 @@ int Dma_Init(struct DmaDevice *dev) { Dma_UnmapReg(dev); cleanup_proc_create_data: - remove_proc_entry(dev->devName,NULL); + remove_proc_entry(dev->devName, NULL); cleanup_device_create: if ( gCl != NULL ) device_destroy(gCl, dev->devNum); @@ -825,7 +825,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_RxBuffinUser_Count: userCnt = 0; for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->rxBuffers),x); + buff = dmaGetBufferList(&(dev->rxBuffers), x); if ( buff->userHas ) userCnt++; } return userCnt; @@ -835,7 +835,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_RxBuffinHW_Count: hwCnt = 0; for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->rxBuffers),x); + buff = dmaGetBufferList(&(dev->rxBuffers), x); if ( buff->inHw && (!buff->inQ) ) hwCnt++; } return hwCnt; @@ -845,7 +845,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_RxBuffinPreHWQ_Count: hwQCnt = 0; for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->rxBuffers),x); + buff = dmaGetBufferList(&(dev->rxBuffers), x); if ( buff->inHw && buff->inQ ) hwQCnt++; } return hwQCnt; @@ -855,7 +855,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_RxBuffinSWQ_Count: qCnt = 0; for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->rxBuffers),x); + buff = dmaGetBufferList(&(dev->rxBuffers), x); if ( (!buff->inHw) && buff->inQ ) qCnt++; } return qCnt; @@ -865,7 +865,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_RxBuffMiss_Count: miss = 0; for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->rxBuffers),x); + buff = dmaGetBufferList(&(dev->rxBuffers), x); if ((buff->userHas == NULL) && (buff->inHw == 0) && (buff->inQ == 0)) { miss++; } @@ -882,7 +882,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_TxBuffinUser_Count: userCnt = 0; for (x=dev->txBuffers.baseIdx; x < (dev->txBuffers.baseIdx + dev->txBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->txBuffers),x); + buff = dmaGetBufferList(&(dev->txBuffers), x); if ( buff->userHas ) userCnt++; } return userCnt; @@ -892,7 +892,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_TxBuffinHW_Count: hwCnt = 0; for (x=dev->txBuffers.baseIdx; x < (dev->txBuffers.baseIdx + dev->txBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->txBuffers),x); + buff = dmaGetBufferList(&(dev->txBuffers), x); if ( buff->inHw && (!buff->inQ) ) hwCnt++; } return hwCnt; @@ -902,7 +902,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_TxBuffinPreHWQ_Count: hwQCnt = 0; for (x=dev->txBuffers.baseIdx; x < (dev->txBuffers.baseIdx + dev->txBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->txBuffers),x); + buff = dmaGetBufferList(&(dev->txBuffers), x); if ( buff->inHw && buff->inQ ) hwQCnt++; } return hwQCnt; @@ -912,7 +912,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_TxBuffinSWQ_Count: qCnt = 0; for (x=dev->txBuffers.baseIdx; x < (dev->txBuffers.baseIdx + dev->txBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->txBuffers),x); + buff = dmaGetBufferList(&(dev->txBuffers), x); if ( (!buff->inHw) && buff->inQ ) qCnt++; } return qCnt; @@ -922,7 +922,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { case DMA_Get_TxBuffMiss_Count: miss = 0; for (x=dev->txBuffers.baseIdx; x < (dev->txBuffers.baseIdx + dev->txBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->txBuffers),x); + buff = dmaGetBufferList(&(dev->txBuffers), x); if ((buff->userHas == NULL) && (buff->inHw == 0) && (buff->inQ == 0)) { miss++; } @@ -943,21 +943,21 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { // Set debug level case DMA_Set_Debug: dev->debug = arg; - dev_info(dev->device,"debug set to %u.\n",(uint32_t)arg); + dev_info(dev->device, "debug set to %u.\n", (uint32_t)arg); return 0; break; // Attempt to reserve destination case DMA_Set_Mask: - memset(newMask,0,DMA_MASK_SIZE); + memset(newMask, 0, DMA_MASK_SIZE); ((uint32_t *)newMask)[0] = arg; - return Dma_SetMaskBytes(dev,desc,newMask); + return Dma_SetMaskBytes(dev, desc, newMask); break; // Attempt to reserve destination case DMA_Set_MaskBytes: - if ( copy_from_user(newMask,(void *)arg,DMA_MASK_SIZE) ) return -1; - return Dma_SetMaskBytes(dev,desc,newMask); + if ( copy_from_user(newMask, (void *)arg, DMA_MASK_SIZE) ) return -1; + return Dma_SetMaskBytes(dev, desc, newMask); break; // Return buffer index @@ -965,15 +965,15 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { cnt = (cmd >> 16) & 0xFFFF; if ( cnt == 0 ) return 0; - indexes = kzalloc(cnt * sizeof(uint32_t),GFP_KERNEL); - if (copy_from_user(indexes,(void *)arg,(cnt * sizeof(uint32_t)))) return -1; + indexes = kzalloc(cnt * sizeof(uint32_t), GFP_KERNEL); + if (copy_from_user(indexes, (void *)arg, (cnt * sizeof(uint32_t)))) return -1; - buffList = (struct DmaBuffer **)kzalloc(cnt * sizeof(struct DmaBuffer *),GFP_KERNEL); + buffList = (struct DmaBuffer **)kzalloc(cnt * sizeof(struct DmaBuffer *), GFP_KERNEL); bCnt = 0; for (x=0; x < cnt; x++) { // Attempt to find buffer in RX list - if ( (buff = dmaGetBufferList(&(dev->rxBuffers),indexes[x])) != NULL ) { + if ( (buff = dmaGetBufferList(&(dev->rxBuffers), indexes[x])) != NULL ) { // Only return if owned by current desc if ( buff->userHas == desc ) { buff->userHas = NULL; @@ -981,23 +981,23 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { } // Attempt to find in tx list - } else if ( (buff = dmaGetBufferList(&(dev->txBuffers),indexes[x])) != NULL ) { + } else if ( (buff = dmaGetBufferList(&(dev->txBuffers), indexes[x])) != NULL ) { // Only return if owned by current desc if ( buff->userHas == desc ) { buff->userHas = NULL; // Return entry to TX queue - dmaQueuePush(&(dev->tq),buff); + dmaQueuePush(&(dev->tq), buff); } } else { - dev_warn(dev->device,"Command: Invalid index posted: %i.\n", indexes[x]); + dev_warn(dev->device, "Command: Invalid index posted: %i.\n", indexes[x]); kfree(indexes); return -1; } } // Return receive buffers - dev->hwFunc->retRxBuffer(dev,buffList,bCnt); + dev->hwFunc->retRxBuffer(dev, buffList, bCnt); kfree(buffList); kfree(indexes); @@ -1017,7 +1017,7 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { buff->userHas = desc; if ( dev->debug > 0 ) - dev_info(dev->device,"Command: Returning buffer %i to user\n",buff->index); + dev_info(dev->device, "Command: Returning buffer %i to user\n", buff->index); return buff->index; } break; @@ -1037,17 +1037,17 @@ ssize_t Dma_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { // Register write case DMA_Write_Register: - return Dma_WriteRegister(dev,arg); + return Dma_WriteRegister(dev, arg); break; // Register read case DMA_Read_Register: - return Dma_ReadRegister(dev,arg); + return Dma_ReadRegister(dev, arg); break; // All other commands handled by card specific functions default: - return dev->hwFunc->command(dev,cmd,arg); + return dev->hwFunc->command(dev, cmd, arg); break; } return 0; @@ -1224,9 +1224,9 @@ int Dma_ProcOpen(struct inode *inode, struct file *file) { struct seq_file *sf; struct DmaDevice *dev; -#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,18,0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) dev = (struct DmaDevice *)pde_data(inode); -#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0) dev = (struct DmaDevice *)PDE_DATA(inode); #else dev = (struct DmaDevice *)PDE(inode)->data; @@ -1313,17 +1313,17 @@ int Dma_SeqShow(struct seq_file *s, void *v) { dev = (struct DmaDevice *)s->private; // Call applications specific show function first - dev->hwFunc->seqShow(s,dev); - - seq_printf(s,"\n"); - seq_printf(s,"-------- DMA Kernel Driver General --------\n"); - seq_printf(s," DMA Driver's Git Version : " GITV "\n"); - seq_printf(s," DMA Driver's API Version : 0x%x\n",DMA_VERSION); - seq_printf(s,"\n"); - seq_printf(s,"---- Read Buffers (Firmware->Software) ----\n"); - seq_printf(s," Buffer Count : %u\n",dev->rxBuffers.count); - seq_printf(s," Buffer Size : %u\n",dev->cfgSize); - seq_printf(s," Buffer Mode : %u\n",dev->cfgMode); + dev->hwFunc->seqShow(s, dev); + + seq_printf(s, "\n"); + seq_printf(s, "-------- DMA Kernel Driver General --------\n"); + seq_printf(s, " DMA Driver's Git Version : " GITV "\n"); + seq_printf(s, " DMA Driver's API Version : 0x%x\n", DMA_VERSION); + seq_printf(s, "\n"); + seq_printf(s, "---- Read Buffers (Firmware->Software) ----\n"); + seq_printf(s, " Buffer Count : %u\n", dev->rxBuffers.count); + seq_printf(s, " Buffer Size : %u\n", dev->cfgSize); + seq_printf(s, " Buffer Mode : %u\n", dev->cfgMode); userCnt = 0; hwCnt = 0; @@ -1335,7 +1335,7 @@ int Dma_SeqShow(struct seq_file *s, void *v) { sum = 0; for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->rxBuffers),x); + buff = dmaGetBufferList(&(dev->rxBuffers), x); if ( buff->count > max ) max = buff->count; if ( buff->count < min ) min = buff->count; @@ -1354,21 +1354,21 @@ int Dma_SeqShow(struct seq_file *s, void *v) { } else avg = sum/dev->rxBuffers.count; - seq_printf(s," Buffers In User : %u\n",userCnt); - seq_printf(s," Buffers In Hw : %u\n",hwCnt); - seq_printf(s," Buffers In Pre-Hw Q : %u\n",hwQCnt); - seq_printf(s," Buffers In Rx Queue : %u\n",qCnt); -// seq_printf(s," Missing Buffers : %u\n",miss); -// seq_printf(s," Min Buffer Use : %u\n",min); -// seq_printf(s," Max Buffer Use : %u\n",max); -// seq_printf(s," Avg Buffer Use : %u\n",avg); -// seq_printf(s," Tot Buffer Use : %u\n",sum); - - seq_printf(s,"\n"); - seq_printf(s,"---- Write Buffers (Software->Firmware) ---\n"); - seq_printf(s," Buffer Count : %u\n",dev->txBuffers.count); - seq_printf(s," Buffer Size : %u\n",dev->cfgSize); - seq_printf(s," Buffer Mode : %u\n",dev->cfgMode); + seq_printf(s, " Buffers In User : %u\n", userCnt); + seq_printf(s, " Buffers In Hw : %u\n", hwCnt); + seq_printf(s, " Buffers In Pre-Hw Q : %u\n", hwQCnt); + seq_printf(s, " Buffers In Rx Queue : %u\n", qCnt); +// seq_printf(s, " Missing Buffers : %u\n", miss); +// seq_printf(s, " Min Buffer Use : %u\n", min); +// seq_printf(s, " Max Buffer Use : %u\n", max); +// seq_printf(s, " Avg Buffer Use : %u\n", avg); +// seq_printf(s, " Tot Buffer Use : %u\n", sum); + + seq_printf(s, "\n"); + seq_printf(s, "---- Write Buffers (Software->Firmware) ---\n"); + seq_printf(s, " Buffer Count : %u\n", dev->txBuffers.count); + seq_printf(s, " Buffer Size : %u\n", dev->cfgSize); + seq_printf(s, " Buffer Mode : %u\n", dev->cfgMode); userCnt = 0; hwCnt = 0; @@ -1380,7 +1380,7 @@ int Dma_SeqShow(struct seq_file *s, void *v) { sum = 0; for (x=dev->txBuffers.baseIdx; x < (dev->txBuffers.baseIdx + dev->txBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->txBuffers),x); + buff = dmaGetBufferList(&(dev->txBuffers), x); if ( buff->count > max ) max = buff->count; if ( buff->count < min ) min = buff->count; @@ -1399,16 +1399,16 @@ int Dma_SeqShow(struct seq_file *s, void *v) { } else avg = sum/dev->txBuffers.count; - seq_printf(s," Buffers In User : %u\n",userCnt); - seq_printf(s," Buffers In Hw : %u\n",hwCnt); - seq_printf(s," Buffers In Pre-Hw Q : %u\n",hwQCnt); - seq_printf(s," Buffers In Sw Queue : %u\n",qCnt); -// seq_printf(s," Missing Buffers : %u\n",miss); -// seq_printf(s," Min Buffer Use : %u\n",min); -// seq_printf(s," Max Buffer Use : %u\n",max); -// seq_printf(s," Avg Buffer Use : %u\n",avg); -// seq_printf(s," Tot Buffer Use : %u\n",sum); - seq_printf(s,"\n"); + seq_printf(s, " Buffers In User : %u\n", userCnt); + seq_printf(s, " Buffers In Hw : %u\n", hwCnt); + seq_printf(s, " Buffers In Pre-Hw Q : %u\n", hwQCnt); + seq_printf(s, " Buffers In Sw Queue : %u\n", qCnt); +// seq_printf(s, " Missing Buffers : %u\n", miss); +// seq_printf(s, " Min Buffer Use : %u\n", min); +// seq_printf(s, " Max Buffer Use : %u\n", max); +// seq_printf(s, " Avg Buffer Use : %u\n", avg); +// seq_printf(s, " Tot Buffer Use : %u\n", sum); + seq_printf(s, "\n"); return 0; } diff --git a/common/driver/gpu_async.c b/common/driver/gpu_async.c index 63e6846..1191264 100755 --- a/common/driver/gpu_async.c +++ b/common/driver/gpu_async.c @@ -145,7 +145,7 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { dev_warn(dev->device, "Gpu_AddNvidia: dma map done. ret = %i\n", ret); if (ret != 0) { - dev_warn(dev->device,"Gpu_AddNvidia: error mapping page tables ret=%i\n",ret); + dev_warn(dev->device, "Gpu_AddNvidia: error mapping page tables ret=%i\n", ret); } else { // Determine how much memory is contiguous @@ -163,7 +163,7 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { if (buffer->write) { writel(buffer->dmaMapping->dma_addresses[0] & 0xFFFFFFFF, data->base+0x100+data->writeBuffers.count*16); writel((buffer->dmaMapping->dma_addresses[0] >> 32) & 0xFFFFFFFF, data->base+0x104+data->writeBuffers.count*16); - writel(mapSize,data->base+0x108+data->writeBuffers.count*16); + writel(mapSize, data->base+0x108+data->writeBuffers.count*16); data->writeBuffers.count++; } else { writel(buffer->dmaMapping->dma_addresses[0] & 0xFFFFFFFF, data->base+0x200+data->readBuffers.count*16); @@ -172,7 +172,7 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { } } } else { - dev_warn(dev->device,"Gpu_AddNvidia: failed to pin memory with address=0x%llx. ret=%i\n", dat.address,ret); + dev_warn(dev->device, "Gpu_AddNvidia: failed to pin memory with address=0x%llx. ret=%i\n", dat.address, ret); return -1; } @@ -188,7 +188,7 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { x |= (data->readBuffers.count-1) << 16; } - writel(x,data->base+0x008); + writel(x, data->base+0x008); return 0; } diff --git a/data_dev/driver/src/data_dev_top.c b/data_dev/driver/src/data_dev_top.c index bc9006b..0c7206b 100755 --- a/data_dev/driver/src/data_dev_top.c +++ b/data_dev/driver/src/data_dev_top.c @@ -255,10 +255,10 @@ int DataDev_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { dev->rwSize = (2*USER_SIZE) - PHY_OFF; // Read/Write region size // Manage device reset cycle - dev_info(dev->device,"Init: Setting user reset\n"); - AxiVersion_SetUserReset(dev->base + AVER_OFF,true); // Set user reset - dev_info(dev->device,"Init: Clearing user reset\n"); - AxiVersion_SetUserReset(dev->base + AVER_OFF,false); // Clear user reset + dev_info(dev->device, "Init: Setting user reset\n"); + AxiVersion_SetUserReset(dev->base + AVER_OFF, true); // Set user reset + dev_info(dev->device, "Init: Clearing user reset\n"); + AxiVersion_SetUserReset(dev->base + AVER_OFF, false); // Clear user reset // Configure DMA based on AXI address width: 128bit desc, = 64-bit address map if ((readl(dev->reg) & 0x10000) != 0) { @@ -292,9 +292,9 @@ int DataDev_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { hwData = (struct AxisG2Data *)dev->hwData; // Log memory mapping information - dev_info(dev->device,"Init: Reg space mapped to 0x%p.\n",dev->reg); - dev_info(dev->device,"Init: User space mapped to 0x%p with size 0x%x.\n",dev->rwBase,dev->rwSize); - dev_info(dev->device,"Init: Top Register = 0x%x\n",readl(dev->reg)); + dev_info(dev->device, "Init: Reg space mapped to 0x%p.\n", dev->reg); + dev_info(dev->device, "Init: User space mapped to 0x%p with size 0x%x.\n", dev->rwBase, dev->rwSize); + dev_info(dev->device, "Init: Top Register = 0x%x\n", readl(dev->reg)); // Finalize device probe successfully gDmaDevCount++; // Increment global device count @@ -432,50 +432,50 @@ struct hardware_functions DataDev_functions = { }; // Parameters -module_param(cfgTxCount,int,0); +module_param(cfgTxCount, int, 0); MODULE_PARM_DESC(cfgTxCount, "TX buffer count"); -module_param(cfgRxCount,int,0); +module_param(cfgRxCount, int, 0); MODULE_PARM_DESC(cfgRxCount, "RX buffer count"); -module_param(cfgSize,int,0); +module_param(cfgSize, int, 0); MODULE_PARM_DESC(cfgSize, "Rx/TX Buffer size"); -module_param(cfgMode,int,0); +module_param(cfgMode, int, 0); MODULE_PARM_DESC(cfgMode, "RX buffer mode"); -module_param(cfgCont,int,0); +module_param(cfgCont, int, 0); MODULE_PARM_DESC(cfgCont, "RX continue enable"); -module_param(cfgIrqHold,int,0); +module_param(cfgIrqHold, int, 0); MODULE_PARM_DESC(cfgIrqHold, "IRQ Holdoff"); -module_param(cfgIrqDis,int,0); +module_param(cfgIrqDis, int, 0); MODULE_PARM_DESC(cfgIrqDis, "IRQ Disable"); -module_param(cfgBgThold0,int,0); +module_param(cfgBgThold0, int, 0); MODULE_PARM_DESC(cfgBgThold0, "Buff Group Threshold 0"); -module_param(cfgBgThold1,int,0); +module_param(cfgBgThold1, int, 0); MODULE_PARM_DESC(cfgBgThold1, "Buff Group Threshold 1"); -module_param(cfgBgThold2,int,0); +module_param(cfgBgThold2, int, 0); MODULE_PARM_DESC(cfgBgThold2, "Buff Group Threshold 2"); -module_param(cfgBgThold3,int,0); +module_param(cfgBgThold3, int, 0); MODULE_PARM_DESC(cfgBgThold3, "Buff Group Threshold 3"); -module_param(cfgBgThold4,int,0); +module_param(cfgBgThold4, int, 0); MODULE_PARM_DESC(cfgBgThold4, "Buff Group Threshold 4"); -module_param(cfgBgThold5,int,0); +module_param(cfgBgThold5, int, 0); MODULE_PARM_DESC(cfgBgThold5, "Buff Group Threshold 5"); -module_param(cfgBgThold6,int,0); +module_param(cfgBgThold6, int, 0); MODULE_PARM_DESC(cfgBgThold6, "Buff Group Threshold 6"); -module_param(cfgBgThold7,int,0); +module_param(cfgBgThold7, int, 0); MODULE_PARM_DESC(cfgBgThold7, "Buff Group Threshold 7"); -module_param(cfgDevName,int,0); +module_param(cfgDevName, int, 0); MODULE_PARM_DESC(cfgDevName, "Device Name Formating Setting"); diff --git a/data_gpu/driver/src/data_gpu_top.c b/data_gpu/driver/src/data_gpu_top.c index fed4c59..7dd425a 100755 --- a/data_gpu/driver/src/data_gpu_top.c +++ b/data_gpu/driver/src/data_gpu_top.c @@ -228,10 +228,10 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { Gpu_Init(dev, GPU_OFF); // Manage device reset cycle - dev_info(dev->device,"Init: Setting user reset\n"); - AxiVersion_SetUserReset(dev->base + AVER_OFF,true); // Set user reset - dev_info(dev->device,"Init: Clearing user reset\n"); - AxiVersion_SetUserReset(dev->base + AVER_OFF,false); // Clear user reset + dev_info(dev->device, "Init: Setting user reset\n"); + AxiVersion_SetUserReset(dev->base + AVER_OFF, true); // Set user reset + dev_info(dev->device, "Init: Clearing user reset\n"); + AxiVersion_SetUserReset(dev->base + AVER_OFF, false); // Clear user reset // Configure DMA based on AXI address width: 128bit desc, = 64-bit address map if ((readl(dev->reg) & 0x10000) != 0) { @@ -262,9 +262,9 @@ int DataGpu_Probe(struct pci_dev *pcidev, const struct pci_device_id *dev_id) { } // Log memory mapping information - dev_info(dev->device,"Init: Reg space mapped to 0x%p.\n",dev->reg); - dev_info(dev->device,"Init: User space mapped to 0x%p with size 0x%x.\n",dev->rwBase,dev->rwSize); - dev_info(dev->device,"Init: Top Register = 0x%x\n",readl(dev->reg)); + dev_info(dev->device, "Init: Reg space mapped to 0x%p.\n", dev->reg); + dev_info(dev->device, "Init: User space mapped to 0x%p with size 0x%x.\n", dev->rwBase, dev->rwSize); + dev_info(dev->device, "Init: Top Register = 0x%x\n", readl(dev->reg)); // Finalize device probe successfully gDmaDevCount++; // Increment global device count @@ -457,5 +457,5 @@ MODULE_PARM_DESC(cfgCont, "RX continue enable: Enable/disable continuous receive /* Used to determine the device name formatting */ -module_param(cfgDevName,int,0); +module_param(cfgDevName, int, 0); MODULE_PARM_DESC(cfgDevName, "Device Name Formating Setting"); diff --git a/rce_hp_buffers/driver/src/rce_hp.c b/rce_hp_buffers/driver/src/rce_hp.c index 6285a0f..98e4dae 100755 --- a/rce_hp_buffers/driver/src/rce_hp.c +++ b/rce_hp_buffers/driver/src/rce_hp.c @@ -42,23 +42,23 @@ void RceHp_Init(struct DmaDevice *dev) { reg = (struct RceHpReg *)dev->reg; // Clear Buffers - iowrite32(0x1,&(reg->bufferClear)); - iowrite32(0x0,&(reg->bufferClear)); + iowrite32(0x1, &(reg->bufferClear)); + iowrite32(0x0, &(reg->bufferClear)); // Set buffer size - iowrite32(dev->cfgSize,&(reg->bufferSize)); + iowrite32(dev->cfgSize, &(reg->bufferSize)); // Push buffers to hardware for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->rxBuffers),x); + buff = dmaGetBufferList(&(dev->rxBuffers), x); if ( dmaBufferToHw(buff) < 0 ) - dev_warn(dev->device,"Init: Failed to map dma buffer.\n"); - else iowrite32(buff->buffHandle,&(reg->bufferAlloc)); + dev_warn(dev->device, "Init: Failed to map dma buffer.\n"); + else iowrite32(buff->buffHandle, &(reg->bufferAlloc)); } // Set dest mask - memset(dev->destMask,0x0,DMA_MASK_SIZE); - dev_info(dev->device,"Init: Done.\n"); + memset(dev->destMask, 0x0, DMA_MASK_SIZE); + dev_info(dev->device, "Init: Done.\n"); } // Enable the card @@ -67,7 +67,7 @@ void RceHp_Enable(struct DmaDevice *dev) { reg = (struct RceHpReg *)dev->reg; // Enable - iowrite32(0x1,&(reg->enable)); + iowrite32(0x1, &(reg->enable)); } // Clear card in top level Remove @@ -76,10 +76,10 @@ void RceHp_Clear(struct DmaDevice *dev) { reg = (struct RceHpReg *)dev->reg; // Clear FIFOs - iowrite32(0x1,&(reg->bufferClear)); + iowrite32(0x1, &(reg->bufferClear)); // Disable - iowrite32(0x0,&(reg->enable)); + iowrite32(0x0, &(reg->enable)); } diff --git a/rce_hp_buffers/driver/src/rce_top.c b/rce_hp_buffers/driver/src/rce_top.c index 0426ba9..290e38e 100755 --- a/rce_hp_buffers/driver/src/rce_top.c +++ b/rce_hp_buffers/driver/src/rce_top.c @@ -92,7 +92,7 @@ int Rce_Probe(struct platform_device *pdev) { // Find matching entry tmpIdx = -1; for ( x=0; x < MAX_DMA_DEVICES; x++ ) { - if (strcmp(tmpName,RceDevNames[x]) == 0) { + if (strcmp(tmpName, RceDevNames[x]) == 0) { tmpIdx = x; break; } @@ -100,7 +100,7 @@ int Rce_Probe(struct platform_device *pdev) { // Matching device not found if ( tmpIdx < 0 ) { - pr_warn("%s: Probe: Matching device not found: %s.\n", MOD_NAME,tmpName); + pr_warn("%s: Probe: Matching device not found: %s.\n", MOD_NAME, tmpName); return(-1); } dev = &gDmaDevices[tmpIdx]; @@ -108,7 +108,7 @@ int Rce_Probe(struct platform_device *pdev) { pr_info("%s: Probe: Using index %i for %s.\n", MOD_NAME, tmpIdx, tmpName); // Init structure - memset(dev,0,sizeof(struct DmaDevice)); + memset(dev, 0, sizeof(struct DmaDevice)); dev->index = tmpIdx; // Increment count @@ -156,7 +156,7 @@ int Rce_Remove(struct platform_device *pdev) { // Find matching entry tmpIdx = -1; for ( x=0; x < MAX_DMA_DEVICES; x++ ) { - if (strcmp(tmpName,RceDevNames[x]) == 0) { + if (strcmp(tmpName, RceDevNames[x]) == 0) { tmpIdx = x; break; } @@ -179,9 +179,9 @@ int Rce_Remove(struct platform_device *pdev) { } // Parameters -module_param(cfgCount,int,0); +module_param(cfgCount, int, 0); MODULE_PARM_DESC(cfgCount, "Buffer count"); -module_param(cfgSize,int,0); +module_param(cfgSize, int, 0); MODULE_PARM_DESC(cfgSize, "Buffer size"); diff --git a/rce_memmap/driver/src/rce_map.c b/rce_memmap/driver/src/rce_map.c index d19a05c..88007ec 100755 --- a/rce_memmap/driver/src/rce_map.c +++ b/rce_memmap/driver/src/rce_map.c @@ -71,11 +71,11 @@ char *Map_DevNode(struct device *dev, umode_t *mode) { int Map_Init(void) { int32_t res; - memset(&dev,0,sizeof(struct MapDevice)); + memset(&dev, 0, sizeof(struct MapDevice)); strcpy(dev.devName,MOD_NAME);//NOLINT - // Allocate device numbers for character device. 1 minor numer starting at 0 + // Allocate device numbers for character device. 1 minor number starting at 0 res = alloc_chrdev_region(&(dev.devNum), 0, 1, dev.devName); if (res < 0) { printk(KERN_ERR MOD_NAME " Init: Cannot register char device\n"); @@ -109,7 +109,7 @@ int Map_Init(void) { } // Map initial space - if ( (dev.maps = (struct MemMap *)kmalloc(sizeof(struct MemMap),GFP_KERNEL)) == NULL ) { + if ( (dev.maps = (struct MemMap *)kmalloc(sizeof(struct MemMap), GFP_KERNEL)) == NULL ) { printk(KERN_ERR MOD_NAME " Init: Could not allocate map memory\n"); return (-1); } @@ -119,11 +119,11 @@ int Map_Init(void) { // Map space dev.maps->base = ioremap_wc(dev.maps->addr, MAP_SIZE); if (!dev.maps->base) { - printk(KERN_ERR MOD_NAME " Init: Could not map memory addr %p with size 0x%x.\n",(void *)dev.maps->addr,MAP_SIZE); + printk(KERN_ERR MOD_NAME " Init: Could not map memory addr %p with size 0x%x.\n", (void *)dev.maps->addr, MAP_SIZE); kfree(dev.maps); return (-1); } - printk(KERN_INFO MOD_NAME " Init: Mapped addr %p with size 0x%x to %p.\n",(void *)dev.maps->addr,MAP_SIZE,(void *)dev.maps->base); + printk(KERN_INFO MOD_NAME " Init: Mapped addr %p with size 0x%x to %p.\n", (void *)dev.maps->addr, MAP_SIZE, (void *)dev.maps->base); // Hold memory region // if ( request_mem_region(dev.maps->addr, MAP_SIZE, dev.devName) == NULL ) { @@ -181,7 +181,7 @@ uint8_t * Map_Find(uint32_t addr) { cur = dev.maps; if ( (addr < cfgMinAddr) || (addr > cfgMaxAddr) ) { - printk(KERN_ERR MOD_NAME " Map_Find: Invalid address %p. Allowed range %p - %p\n",(void *)addr,(void *)cfgMinAddr,(void*)cfgMaxAddr); + printk(KERN_ERR MOD_NAME " Map_Find: Invalid address %p. Allowed range %p - %p\n", (void *)addr, (void *)cfgMinAddr, (void*)cfgMaxAddr); return (NULL); } @@ -193,7 +193,7 @@ uint8_t * Map_Find(uint32_t addr) { // Next address is too high, insert new structure if ( (cur->next == NULL) || (addr < ((struct MemMap *)cur->next)->addr) ) { // Create new map - if ( (new = (struct MemMap *)kmalloc(sizeof(struct MemMap),GFP_KERNEL)) == NULL ) { + if ( (new = (struct MemMap *)kmalloc(sizeof(struct MemMap), GFP_KERNEL)) == NULL ) { printk(KERN_ERR MOD_NAME " Map_Find: Could not allocate map memory\n"); return NULL; } @@ -204,11 +204,11 @@ uint8_t * Map_Find(uint32_t addr) { // Map space new->base = ioremap_wc(new->addr, MAP_SIZE); if (!new->base) { - printk(KERN_ERR MOD_NAME " Map_Find: Could not map memory addr %p (%p) with size 0x%x.\n",(void *)new->addr,(void*)addr,MAP_SIZE); + printk(KERN_ERR MOD_NAME " Map_Find: Could not map memory addr %p (%p) with size 0x%x.\n", (void *)new->addr, (void*)addr, MAP_SIZE); kfree(new); return (NULL); } - printk(KERN_INFO MOD_NAME " Map_Find: Mapped addr %p with size 0x%x to %p.\n",(void *)new->addr,MAP_SIZE,(void *)new->base); + printk(KERN_INFO MOD_NAME " Map_Find: Mapped addr %p with size 0x%x to %p.\n", (void *)new->addr, MAP_SIZE, (void *)new->base); // Hold memory region // if ( request_mem_region(new->addr, MAP_SIZE, dev.devName) == NULL ) { @@ -244,21 +244,21 @@ ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { // Register write case DMA_Write_Register: - if ((ret = copy_from_user(&rData,(void *)arg,sizeof(struct DmaRegisterData)))) { + if ((ret = copy_from_user(&rData, (void *)arg, sizeof(struct DmaRegisterData)))) { printk(KERN_WARNING MOD_NAME " Dma_Write_Register: copy_from_user failed. ret=%i, user=%p kern=%p\n", ret, (void *)arg, &rData); return(-1); } if ( (base = Map_Find(rData.address)) == NULL ) return(-1); - iowrite32(rData.data,base); + iowrite32(rData.data, base); return(0); break; // Register read case DMA_Read_Register: - if ((ret=copy_from_user(&rData,(void *)arg,sizeof(struct DmaRegisterData)))) { + if ((ret=copy_from_user(&rData, (void *)arg, sizeof(struct DmaRegisterData)))) { printk(KERN_WARNING MOD_NAME " Dma_Read_Register: copy_from_user failed. ret=%i, user=%p kern=%p\n", ret, (void *)arg, &rData); return(-1); } @@ -267,7 +267,7 @@ ssize_t Map_Ioctl(struct file *filp, uint32_t cmd, unsigned long arg) { rData.data = ioread32(base); // Return the data structure - if ((ret=copy_to_user((void *)arg,&rData,sizeof(struct DmaRegisterData)))) { + if ((ret=copy_to_user((void *)arg, &rData, sizeof(struct DmaRegisterData)))) { printk(KERN_WARNING MOD_NAME " Dma_Read_Register: copy_to_user failed. ret=%i, user=%p kern=%p\n", ret, (void *)arg, &rData); return(-1); } @@ -290,9 +290,9 @@ ssize_t Map_Write(struct file *filp, const char* buffer, size_t count, loff_t* f return -1; } -module_param(cfgMinAddr,uint,0); +module_param(cfgMinAddr, uint, 0); MODULE_PARM_DESC(cfgMinAddr, "Min Map Addr"); -module_param(cfgMaxAddr,uint,0); +module_param(cfgMaxAddr, uint, 0); MODULE_PARM_DESC(cfgMaxAddr, "Max Map Addr"); diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index 00b12ec..676e296 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -51,21 +51,21 @@ struct PrgArgs { uint32_t txDis; }; -static struct PrgArgs DefArgs = { "/dev/axi_stream_dma_0", "0", 0, 10000, 0,0x2,0x0,0,0 }; +static struct PrgArgs DefArgs = { "/dev/axi_stream_dma_0", "0", 0, 10000, 0, 0x2, 0x0, 0, 0 }; static char args_doc[] = ""; static char doc[] = ""; static struct argp_option options[] = { - { "path", 'p', "PATH", OPTION_ARG_OPTIONAL, "Path of pgpcard device to use. Default=/dev/pgpcard_0.",0}, - { "dest", 'm', "LIST", OPTION_ARG_OPTIONAL, "Comman seperated list of destinations.",0}, - { "prbsdis", 'd', 0, OPTION_ARG_OPTIONAL, "Disable PRBS checking.",0}, - { "size", 's', "SIZE", OPTION_ARG_OPTIONAL, "Size for transmitted frames.",0}, - { "indexen", 'i', 0, OPTION_ARG_OPTIONAL, "Use index based receive buffers.",0}, - { "fuser", 'f', "FUSER", OPTION_ARG_OPTIONAL, "Value for first user field in hex. Default=0x2",0}, - { "luser", 'l', "LUSER", OPTION_ARG_OPTIONAL, "Value for last user field in hex. Default=0x0",0}, - { "time", 't', "TIME", OPTION_ARG_OPTIONAL, "Pause time between writes in uSec. Default=0",0}, - { "txdis", 'r', "TIME", OPTION_ARG_OPTIONAL, "Disable transmit threads. Default=0",0}, + { "path", 'p', "PATH", OPTION_ARG_OPTIONAL, "Path of pgpcard device to use. Default=/dev/pgpcard_0.", 0}, + { "dest", 'm', "LIST", OPTION_ARG_OPTIONAL, "Comman seperated list of destinations.", 0}, + { "prbsdis", 'd', 0, OPTION_ARG_OPTIONAL, "Disable PRBS checking.", 0}, + { "size", 's', "SIZE", OPTION_ARG_OPTIONAL, "Size for transmitted frames.", 0}, + { "indexen", 'i', 0, OPTION_ARG_OPTIONAL, "Use index based receive buffers.", 0}, + { "fuser", 'f', "FUSER", OPTION_ARG_OPTIONAL, "Value for first user field in hex. Default=0x2", 0}, + { "luser", 'l', "LUSER", OPTION_ARG_OPTIONAL, "Value for last user field in hex. Default=0x0", 0}, + { "time", 't', "TIME", OPTION_ARG_OPTIONAL, "Pause time between writes in uSec. Default=0", 0}, + { "txdis", 'r', "TIME", OPTION_ARG_OPTIONAL, "Disable transmit threads. Default=0", 0}, {0} }; @@ -75,19 +75,19 @@ error_t parseArgs(int key, char *arg, struct argp_state *state) { switch (key) { case 'p': args->path = arg; break; case 'm': args->dest = arg; break; - case 's': args->size = strtol(arg,NULL,10); break; + case 's': args->size = strtol(arg, NULL, 10); break; case 'd': args->prbsDis = 1; break; case 'i': args->idxEn = 1; break; - case 'f': args->fuser = strtol(arg,NULL,16); break; - case 'l': args->luser = strtol(arg,NULL,16); break; - case 't': args->pause = strtol(arg,NULL,10); break; - case 'r': args->txDis = strtol(arg,NULL,10); break; + case 'f': args->fuser = strtol(arg, NULL, 16); break; + case 'l': args->luser = strtol(arg, NULL, 16); break; + case 't': args->pause = strtol(arg, NULL, 10); break; + case 'r': args->txDis = strtol(arg, NULL, 10); break; default: return ARGP_ERR_UNKNOWN; break; } return(0); } -static struct argp argp = {options,parseArgs,args_doc,doc}; +static struct argp argp = {options, parseArgs, args_doc, doc}; class RunData { public: @@ -113,7 +113,7 @@ void *runWrite(void *t) { int32_t ret; void * data; int32_t fd; - PrbsData prbs(32,4,1,2,6,31); + PrbsData prbs(32, 4, 1, 2, 6, 31); void ** dmaBuffers; uint32_t dmaSize; uint32_t dmaCount; @@ -129,7 +129,7 @@ void *runWrite(void *t) { } if ( txData->idxEn ) { - if ((dmaBuffers = dmaMapDma(fd,&dmaCount,&dmaSize)) == NULL) { + if ((dmaBuffers = dmaMapDma(fd, &dmaCount, &dmaSize)) == NULL) { printf("Write failed to map dma buffer\n"); txData->running = false; return(NULL); @@ -146,18 +146,18 @@ void *runWrite(void *t) { prbValid = false; usleep(1000000+100*(txData->dest)); - printf("Starting write thread. Dest=%i, Size=%i\n",txData->dest,txData->size); + printf("Starting write thread. Dest=%i, Size=%i\n", txData->dest, txData->size); while (txData->enable) { // Setup fds for select call FD_ZERO(&fds); - FD_SET(fd,&fds); + FD_SET(fd, &fds); // Wait for write ready timeout.tv_sec = 0; timeout.tv_usec = 100; - ret = select(fd+1,NULL,&fds,NULL,&timeout); + ret = select(fd+1, NULL, &fds, NULL, &timeout); if ( ret != 0 ) { if ( txData->idxEn ) { dmaIndex = dmaGetIndex(fd); @@ -167,15 +167,15 @@ void *runWrite(void *t) { // Gen data if ( txData->prbEn && !prbValid ) { - prbs.genData(data,txData->size); + prbs.genData(data, txData->size); prbValid = true; } - if ( txData->idxEn ) ret = dmaWriteIndex(fd,dmaIndex,txData->size,axisSetFlags(txData->fuser,txData->luser,0),txData->dest); - else ret = dmaWrite(fd,data,txData->size,axisSetFlags(txData->fuser,txData->luser,0),txData->dest); + if ( txData->idxEn ) ret = dmaWriteIndex(fd, dmaIndex, txData->size, axisSetFlags(txData->fuser, txData->luser, 0), txData->dest); + else ret = dmaWrite(fd, data, txData->size, axisSetFlags(txData->fuser, txData->luser, 0), txData->dest); if ( ret < 0 ) { - printf("Write Error at count %lu. Dest=%i\n",txData->count,txData->dest); + printf("Write Error at count %lu. Dest=%i\n", txData->count, txData->dest); break; } else if ( ret > 0 ) { txData->count++; @@ -186,19 +186,18 @@ void *runWrite(void *t) { } } - if ( txData->idxEn ) dmaUnMapDma(fd,dmaBuffers); + if ( txData->idxEn ) dmaUnMapDma(fd, dmaBuffers); else free(data); close(fd); txData->running = false; - printf("Write thread stopped!. Dest=%i\n",txData->dest); + printf("Write thread stopped!. Dest=%i\n", txData->dest); pthread_exit(NULL); return(NULL); } - void *runRead(void *t) { fd_set fds; struct timeval timeout; @@ -217,7 +216,7 @@ void *runRead(void *t) { bool idxEn; uint8_t mask[DMA_MASK_SIZE]; - PrbsData prbs(32,4,1,2,6,31); + PrbsData prbs(32, 4, 1, 2, 6, 31); RunData *rxData = (RunData *)t; @@ -231,7 +230,7 @@ void *runRead(void *t) { } if ( rxData->idxEn ) { - if ((dmaBuffers = dmaMapDma(fd,&dmaCount,&dmaSize)) == NULL) { + if ((dmaBuffers = dmaMapDma(fd, &dmaCount, &dmaSize)) == NULL) { printf("Read failed to map dma buffer\n"); rxData->running = false; return(NULL); @@ -245,33 +244,33 @@ void *runRead(void *t) { } dmaInitMaskBytes(mask); - dmaAddMaskBytes(mask,rxData->dest); + dmaAddMaskBytes(mask, rxData->dest); usleep(100*rxData->dest); - if ( dmaSetMaskBytes(fd,mask) != 0 ) { - printf("Error setting mask. Dest=%i\n",rxData->dest); + if ( dmaSetMaskBytes(fd, mask) != 0 ) { + printf("Error setting mask. Dest=%i\n", rxData->dest); rxData->running = false; close(fd); return NULL; } - printf("Starting read thread. Dest=%i, Size=%i\n",rxData->dest,rxData->size); + printf("Starting read thread. Dest=%i, Size=%i\n", rxData->dest, rxData->size); while (rxData->enable) { // Setup fds for select call FD_ZERO(&fds); - FD_SET(fd,&fds); + FD_SET(fd, &fds); // Wait for read ready timeout.tv_sec = 0; timeout.tv_usec = 100; - ret = select(fd+1,&fds,NULL,NULL,&timeout); + ret = select(fd+1, &fds, NULL, NULL, &timeout); if ( ret != 0 ) { if ( idxEn ) { - ret = dmaReadIndex(fd,&dmaIndex,&rxFlags,NULL,&rxDest); + ret = dmaReadIndex(fd, &dmaIndex, &rxFlags, NULL, &rxDest); data = dmaBuffers[dmaIndex]; } else { - ret = dmaRead(fd,data,maxSize,&rxFlags,NULL,&rxDest); + ret = dmaRead(fd, data, maxSize, &rxFlags, NULL, &rxDest); } rxFuser = axisGetFuser(rxFlags); @@ -279,16 +278,16 @@ void *runRead(void *t) { if ( ret != 0 ) { // data - if ( (rxData->prbEn) && (!prbs.processData(data,ret)) ) { + if ( (rxData->prbEn) && (!prbs.processData(data, ret)) ) { rxData->prbErr++; - printf("Prbs mismatch. count=%lu, dest=%i, index=%i\n",rxData->count,rxData->dest,dmaIndex); + printf("Prbs mismatch. count=%lu, dest=%i, index=%i\n", rxData->count, rxData->dest, dmaIndex); } - if ( idxEn ) dmaRetIndex(fd,dmaIndex); + if ( idxEn ) dmaRetIndex(fd, dmaIndex); // Stop on size mismatch or frame errors if (ret != (int)rxData->size || rxDest != rxData->dest || rxData->fuser != rxFuser || rxData->luser != rxLuser) { printf("Read Error. Dest=%i, ExpDest=%i, Ret=%i, Exp=%i, Fuser=0x%.2x, Luser=0x%.2x\n", - rxDest,rxData->dest,ret,rxData->size,rxFuser,rxLuser); + rxDest, rxData->dest, ret, rxData->size, rxFuser, rxLuser); break; } else { rxData->count++; @@ -298,13 +297,13 @@ void *runRead(void *t) { } } - if ( idxEn ) dmaUnMapDma(fd,dmaBuffers); + if ( idxEn ) dmaUnMapDma(fd, dmaBuffers); else free(data); close(fd); rxData->running = false; - printf("Read thread stopped!. Dest=%i\n",rxData->dest); + printf("Read thread stopped!. Dest=%i\n", rxData->dest); pthread_exit(NULL); return(NULL); @@ -334,21 +333,21 @@ int main(int argc, char **argv) { struct PrgArgs args; - memcpy(&args,&DefArgs,sizeof(struct PrgArgs)); - argp_parse(&argp,argc,argv,0,0,&args); + memcpy(&args, &DefArgs, sizeof(struct PrgArgs)); + argp_parse(&argp, argc, argv, 0, 0, &args); // Generating endpoints dCount = 0; - strcpy(tBuff,args.dest);//NOLINT - tok = strtok(tBuff,","); + strcpy(tBuff, args.dest);//NOLINT + tok = strtok(tBuff, ","); while ( tok != NULL ) { - x = strtoul(tok,NULL,10); - printf("Creating loop for dest %i\n",x); + x = strtoul(tok, NULL, 10); + printf("Creating loop for dest %i\n", x); rxData[dCount] = new RunData; txData[dCount] = new RunData; - memset(rxData[dCount],0,sizeof(RunData)); + memset(rxData[dCount], 0, sizeof(RunData)); rxData[dCount]->enable = true; rxData[dCount]->running = true; @@ -361,16 +360,16 @@ int main(int argc, char **argv) { rxData[dCount]->prbEn = !args.prbsDis; rxData[dCount]->pause = args.pause; - sprintf(rxData[dCount]->id,"%i",x);//NOLINT - memcpy(txData[dCount],rxData[dCount],sizeof(RunData)); + sprintf(rxData[dCount]->id, "%i", x);//NOLINT + memcpy(txData[dCount], rxData[dCount], sizeof(RunData)); - if ( pthread_create(&rxThread[dCount],NULL,runRead,rxData[dCount]) ) { + if ( pthread_create(&rxThread[dCount], NULL, runRead, rxData[dCount]) ) { printf("Error creating read thread\n"); return(2); } if ( args.txDis == 0 ) { - if ( pthread_create(&txThread[dCount],NULL,runWrite,txData[dCount]) ) { + if ( pthread_create(&txThread[dCount], NULL, runWrite, txData[dCount]) ) { printf("Error creating write thread\n"); return(2); } @@ -379,7 +378,7 @@ int main(int argc, char **argv) { txData[dCount]->enable = false; } dCount++; - tok = strtok(NULL,","); + tok = strtok(NULL, ","); } time(&c_tme); time(&l_tme); @@ -417,33 +416,33 @@ int main(int argc, char **argv) { printf("\n\n"); printf(" Dest:"); - for (x=0; x < dCount; x++) printf(" %15s",txData[x]->id); + for (x=0; x < dCount; x++) printf(" %15s", txData[x]->id); printf("\nTxCount:"); - for (x=0; x < dCount; x++) printf(" %15lu",txData[x]->count); + for (x=0; x < dCount; x++) printf(" %15lu", txData[x]->count); printf("\n TxFreq:"); - for (x=0; x < dCount; x++) printf(" %15lu",txData[x]->count-lastTx[x]); + for (x=0; x < dCount; x++) printf(" %15lu", txData[x]->count-lastTx[x]); printf("\nTxBytes:"); - for (x=0; x < dCount; x++) printf(" %15lu",txData[x]->total); + for (x=0; x < dCount; x++) printf(" %15lu", txData[x]->total); printf("\n TxRate:"); totTx = 0; for (x=0; x < dCount; x++) { - printf(" %15e",((double)(txData[x]->count-lastTx[x]) * 8.0 * (double)args.size) / (double)(c_tme-l_tme)); + printf(" %15e", ((double)(txData[x]->count-lastTx[x]) * 8.0 * (double)args.size) / (double)(c_tme-l_tme)); lastTx[x] = txData[x]->count; totTx += txData[x]->count; } printf("\n"); printf("RxCount:"); - for (x=0; x < dCount; x++) printf(" %15lu",rxData[x]->count); + for (x=0; x < dCount; x++) printf(" %15lu", rxData[x]->count); printf("\n RxFreq:"); - for (x=0; x < dCount; x++) printf(" %15lu",rxData[x]->count-lastRx[x]); + for (x=0; x < dCount; x++) printf(" %15lu", rxData[x]->count-lastRx[x]); printf("\nRxBytes:"); - for (x=0; x < dCount; x++) printf(" %15lu",rxData[x]->total); + for (x=0; x < dCount; x++) printf(" %15lu", rxData[x]->total); if ( !args.prbsDis ) { printf("\n PrbErr:"); - for (x=0; x < dCount; x++) printf(" %15lu",rxData[x]->prbErr); + for (x=0; x < dCount; x++) printf(" %15lu", rxData[x]->prbErr); } printf("\n RxRate:"); @@ -453,7 +452,7 @@ int main(int argc, char **argv) { totPrb = 0; for (x=0; x < dCount; x++) { rxRate = ((double)(rxData[x]->count-lastRx[x]) * 8.0 * (double)args.size) / (double)(c_tme-l_tme); - printf(" %15e",rxRate); + printf(" %15e", rxRate); totRxFreq += (rxData[x]->count-lastRx[x]); lastRx[x] = rxData[x]->count; totRx += rxData[x]->count; @@ -461,11 +460,11 @@ int main(int argc, char **argv) { totRxRate += rxRate; } printf("\n"); - printf(" TotTx: %15lu\n",totTx); - printf(" TotRx: %15lu\n",totRx); - printf("TotFreq: %15lu\n",totRxFreq); - if ( !args.prbsDis ) printf(" PrbErr: %15lu\n",totPrb); - printf("TotRate: %15e\n",totRxRate); + printf(" TotTx: %15lu\n", totTx); + printf(" TotRx: %15lu\n", totRx); + printf("TotFreq: %15lu\n", totRxFreq); + if ( !args.prbsDis ) printf(" PrbErr: %15lu\n", totPrb); + printf("TotRate: %15e\n", totRxRate); l_tme = c_tme; } diff --git a/rce_stream/app/src/dmaRead.cpp b/rce_stream/app/src/dmaRead.cpp index fd3c9e4..9605f10 100644 --- a/rce_stream/app/src/dmaRead.cpp +++ b/rce_stream/app/src/dmaRead.cpp @@ -48,11 +48,11 @@ static char args_doc[] = ""; static char doc[] = ""; static struct argp_option options[] = { - { "path", 'p', "PATH", OPTION_ARG_OPTIONAL, "Path of pgpcard device to use. Default=/dev/axi_stream_dma_0.",0}, - { "dest", 'm', "LIST", OPTION_ARG_OPTIONAL, "Comma seperated list of destinations.",0}, - { "prbsdis", 'd', 0, OPTION_ARG_OPTIONAL, "Disable PRBS checking.",0}, - { "indexen", 'i', 0, OPTION_ARG_OPTIONAL, "Use index based receive buffers.",0}, - { "rawEn", 'r', "COUNT", OPTION_ARG_OPTIONAL, "Show raw data up to count.",0}, + { "path", 'p', "PATH", OPTION_ARG_OPTIONAL, "Path of pgpcard device to use. Default=/dev/axi_stream_dma_0.", 0}, + { "dest", 'm', "LIST", OPTION_ARG_OPTIONAL, "Comma seperated list of destinations.", 0}, + { "prbsdis", 'd', 0, OPTION_ARG_OPTIONAL, "Disable PRBS checking.", 0}, + { "indexen", 'i', 0, OPTION_ARG_OPTIONAL, "Use index based receive buffers.", 0}, + { "rawEn", 'r', "COUNT", OPTION_ARG_OPTIONAL, "Show raw data up to count.", 0}, {0} }; @@ -64,13 +64,13 @@ error_t parseArgs(int key, char *arg, struct argp_state *state) { case 'm': args->dest = arg; break; case 'd': args->prbsDis = 1; break; case 'i': args->idxEn = 1; break; - case 'r': args->rawEn = strtol(arg,NULL,10); break; + case 'r': args->rawEn = strtol(arg, NULL, 10); break; default: return ARGP_ERR_UNKNOWN; break; } return(0); } -static struct argp argp = {options,parseArgs,args_doc,doc}; +static struct argp argp = {options, parseArgs, args_doc, doc}; int main(int argc, char **argv) { uint8_t mask[DMA_MASK_SIZE]; @@ -84,7 +84,7 @@ int main(int argc, char **argv) { uint32_t rxFuser; uint32_t rxLuser; uint32_t rxFlags; - PrbsData prbs(32,4,1,2,6,31); + PrbsData prbs(32, 4, 1, 2, 6, 31); bool prbRes; void ** dmaBuffers; uint32_t dmaSize; @@ -98,32 +98,32 @@ int main(int argc, char **argv) { struct timeval timeout; - memcpy(&args,&DefArgs,sizeof(struct PrgArgs)); - argp_parse(&argp,argc,argv,0,0,&args); + memcpy(&args, &DefArgs, sizeof(struct PrgArgs)); + argp_parse(&argp, argc, argv, 0, 0, &args); if ( (s = open(args.path, O_RDWR)) <= 0 ) { - printf("Error opening %s\n",args.path); + printf("Error opening %s\n", args.path); return(1); } dmaInitMaskBytes(mask); if ( args.dest == NULL ) { - memset(mask,0xFF,DMA_MASK_SIZE); + memset(mask, 0xFF, DMA_MASK_SIZE); } else { strcpy(tBuff,args.dest);//NOLINT - tok = strtok(tBuff,","); + tok = strtok(tBuff, ","); while ( tok != NULL ) { - x = strtoul(tok,NULL,10); - dmaAddMaskBytes(mask,x); - printf("Adding destination %i\n",x); - tok = strtok(NULL,","); + x = strtoul(tok, NULL, 10); + dmaAddMaskBytes(mask, x); + printf("Adding destination %i\n", x); + tok = strtok(NULL, ","); } } - dmaSetMaskBytes(s,mask); + dmaSetMaskBytes(s, mask); maxSize = 1024*1024*2; if ( args.idxEn ) { - if ( (dmaBuffers = dmaMapDma(s,&dmaCount,&dmaSize)) == NULL ) { + if ( (dmaBuffers = dmaMapDma(s, &dmaCount, &dmaSize)) == NULL ) { printf("Failed to map dma buffers!\n"); return(0); } @@ -139,37 +139,37 @@ int main(int argc, char **argv) { do { // Setup fds for select call FD_ZERO(&fds); - FD_SET(s,&fds); + FD_SET(s, &fds); // Setup select timeout for 1 second timeout.tv_sec = 2; timeout.tv_usec = 0; // Wait for Socket data ready - ret = select(s+1,&fds,NULL,NULL,&timeout); + ret = select(s+1, &fds, NULL, NULL, &timeout); if ( ret <= 0 ) { printf("Read timeout\n"); } else { // DMA Read if ( args.idxEn ) { - ret = dmaReadIndex(s,&dmaIndex,&rxFlags,NULL,&rxDest); + ret = dmaReadIndex(s, &dmaIndex, &rxFlags, NULL, &rxDest); rxData = dmaBuffers[dmaIndex]; } - else ret = dmaRead(s,rxData,maxSize,&rxFlags,NULL,&rxDest); + else ret = dmaRead(s, rxData, maxSize, &rxFlags, NULL, &rxDest); rxFuser = axisGetFuser(rxFlags); rxLuser = axisGetFuser(rxFlags); if ( ret > 0 ) { - if ( args.prbsDis == 0 ) prbRes = prbs.processData(rxData,ret); - if ( args.idxEn ) dmaRetIndex(s,dmaIndex); + if ( args.prbsDis == 0 ) prbRes = prbs.processData(rxData, ret); + if ( args.idxEn ) dmaRetIndex(s, dmaIndex); count++; - printf("Read ret=%i, Dest=%i, Fuser=0x%.2x, Luser=0x%.2x, prbs=%i, count=%i\n",ret,rxDest,rxFuser,rxLuser,prbRes,count); + printf("Read ret=%i, Dest=%i, Fuser=0x%.2x, Luser=0x%.2x, prbs=%i, count=%i\n", ret, rxDest, rxFuser, rxLuser, prbRes, count); if ( args.rawEn ) { printf("Raw Data: "); for (x = 0; x < args.rawEn; x++) { - printf("0x%.2x ",((uint8_t *)rxData)[x]); + printf("0x%.2x ", ((uint8_t *)rxData)[x]); if ( ((x+1) % 10) == 0 ) printf("\n "); } printf("\n"); @@ -178,7 +178,7 @@ int main(int argc, char **argv) { } } while ( 1 ); - if ( args.idxEn ) dmaUnMapDma(s,dmaBuffers); + if ( args.idxEn ) dmaUnMapDma(s, dmaBuffers); else free(rxData); close(s); diff --git a/rce_stream/app/src/dmaSetDebug.cpp b/rce_stream/app/src/dmaSetDebug.cpp index f06f45f..05d9f88 100755 --- a/rce_stream/app/src/dmaSetDebug.cpp +++ b/rce_stream/app/src/dmaSetDebug.cpp @@ -45,7 +45,7 @@ static char args_doc[] = "debugLevel"; static char doc[] = "\n Debug level is either 0 or 1."; static struct argp_option options[] = { - { "path", 'p', "PATH", OPTION_ARG_OPTIONAL, "Path of AXI stream to use. Default=/dev/axi_stream_dma_0.",0}, + { "path", 'p', "PATH", OPTION_ARG_OPTIONAL, "Path of AXI stream to use. Default=/dev/axi_stream_dma_0.", 0}, {0} }; @@ -56,7 +56,7 @@ error_t parseArgs(int key, char *arg, struct argp_state *state) { case 'p': args->path = arg; break; case ARGP_KEY_ARG: switch (state->arg_num) { - case 0: args->level = strtol(arg,NULL,10); break; + case 0: args->level = strtol(arg, NULL, 10); break; default: argp_usage(state); break; } break; @@ -68,23 +68,23 @@ error_t parseArgs(int key, char *arg, struct argp_state *state) { return(0); } -static struct argp argp = {options,parseArgs,args_doc,doc}; +static struct argp argp = {options, parseArgs, args_doc, doc}; int main(int argc, char **argv) { int s; struct PrgArgs args; - memcpy(&args,&DefArgs,sizeof(struct PrgArgs)); - argp_parse(&argp,argc,argv,0,0,&args); + memcpy(&args, &DefArgs, sizeof(struct PrgArgs)); + argp_parse(&argp, argc, argv, 0, 0, &args); if ( (s = open(args.path, O_RDWR)) <= 0 ) { - printf("Error opening %s\n",args.path); + printf("Error opening %s\n", args.path); return(1); } - printf("Setting debug level to %i\n",args.level); - dmaSetDebug(s,args.level); + printf("Setting debug level to %i\n", args.level); + dmaSetDebug(s, args.level); close(s); } diff --git a/rce_stream/app/src/dmaWrite.cpp b/rce_stream/app/src/dmaWrite.cpp index ab7297d..0150cd4 100644 --- a/rce_stream/app/src/dmaWrite.cpp +++ b/rce_stream/app/src/dmaWrite.cpp @@ -46,20 +46,20 @@ struct PrgArgs { uint32_t rawEn; }; -static struct PrgArgs DefArgs = { "/dev/axi_stream_dma_0", 0, 1000, 0x2,0x0,1, 0, 0 }; +static struct PrgArgs DefArgs = { "/dev/axi_stream_dma_0", 0, 1000, 0x2, 0x0, 1, 0, 0 }; static char args_doc[] = "dest"; static char doc[] = " Destination is passed as integers."; static struct argp_option options[] = { - { "path", 'p', "PATH", OPTION_ARG_OPTIONAL, "Path of AXI stream to use. Default=/dev/axi_stream_dma_0.",0}, - { "prbsdis", 'd', 0, OPTION_ARG_OPTIONAL, "Disable PRBS generation.",0}, - { "size", 's', "SIZE", OPTION_ARG_OPTIONAL, "Size of data to generate. Default=1000",0}, - { "count", 'c', "COUNT", OPTION_ARG_OPTIONAL, "Number of frames to generate. Default=1",0}, - { "fuser", 'f', "FUSER", OPTION_ARG_OPTIONAL, "Value for first user field in hex. Default=0x2",0}, - { "luser", 'l', "LUSER", OPTION_ARG_OPTIONAL, "Value for last user field in hex. Default=0x0",0}, - { "indexen", 'i', 0, OPTION_ARG_OPTIONAL, "Use index based transmit buffers.",0}, - { "rawEn", 'r', "COUNT", OPTION_ARG_OPTIONAL, "Show raw data up to count.",0}, + { "path", 'p', "PATH", OPTION_ARG_OPTIONAL, "Path of AXI stream to use. Default=/dev/axi_stream_dma_0.", 0}, + { "prbsdis", 'd', 0, OPTION_ARG_OPTIONAL, "Disable PRBS generation.", 0}, + { "size", 's', "SIZE", OPTION_ARG_OPTIONAL, "Size of data to generate. Default=1000", 0}, + { "count", 'c', "COUNT", OPTION_ARG_OPTIONAL, "Number of frames to generate. Default=1", 0}, + { "fuser", 'f', "FUSER", OPTION_ARG_OPTIONAL, "Value for first user field in hex. Default=0x2", 0}, + { "luser", 'l', "LUSER", OPTION_ARG_OPTIONAL, "Value for last user field in hex. Default=0x0", 0}, + { "indexen", 'i', 0, OPTION_ARG_OPTIONAL, "Use index based transmit buffers.", 0}, + { "rawEn", 'r', "COUNT", OPTION_ARG_OPTIONAL, "Show raw data up to count.", 0}, {0} }; @@ -69,15 +69,15 @@ error_t parseArgs(int key, char *arg, struct argp_state *state) { switch (key) { case 'p': args->path = arg; break; case 'd': args->prbsDis = 1; break; - case 's': args->size = strtol(arg,NULL,10); break; - case 'c': args->count = strtol(arg,NULL,10); break; - case 'f': args->fuser = strtol(arg,NULL,16); break; - case 'l': args->luser = strtol(arg,NULL,16); break; + case 's': args->size = strtol(arg, NULL, 10); break; + case 'c': args->count = strtol(arg, NULL, 10); break; + case 'f': args->fuser = strtol(arg, NULL, 16); break; + case 'l': args->luser = strtol(arg, NULL, 16); break; case 'i': args->idxEn = 1; break; - case 'r': args->rawEn = strtol(arg,NULL,10); break; + case 'r': args->rawEn = strtol(arg, NULL, 10); break; case ARGP_KEY_ARG: switch (state->arg_num) { - case 0: args->dest = strtol(arg,NULL,10); break; + case 0: args->dest = strtol(arg, NULL, 10); break; default: argp_usage(state); break; } break; @@ -89,7 +89,7 @@ error_t parseArgs(int key, char *arg, struct argp_state *state) { return(0); } -static struct argp argp = {options,parseArgs,args_doc,doc}; +static struct argp argp = {options, parseArgs, args_doc, doc}; int main(int argc, char **argv) { int32_t s; @@ -97,7 +97,7 @@ int main(int argc, char **argv) { uint32_t count; fd_set fds; void * txData; - PrbsData prbs(32,4,1,2,6,31); + PrbsData prbs(32, 4, 1, 2, 6, 31); void ** dmaBuffers; uint32_t dmaSize; uint32_t dmaCount; @@ -108,16 +108,16 @@ int main(int argc, char **argv) { struct timeval timeout; struct PrgArgs args; - memcpy(&args,&DefArgs,sizeof(struct PrgArgs)); - argp_parse(&argp,argc,argv,0,0,&args); + memcpy(&args, &DefArgs, sizeof(struct PrgArgs)); + argp_parse(&argp, argc, argv, 0, 0, &args); if ( (s = open(args.path, O_RDWR)) <= 0 ) { - printf("Error opening %s\n",args.path); + printf("Error opening %s\n", args.path); return(1); } if ( args.idxEn ) { - if ( (dmaBuffers = dmaMapDma(s,&dmaCount,&dmaSize)) == NULL ) { + if ( (dmaBuffers = dmaMapDma(s, &dmaCount, &dmaSize)) == NULL ) { printf("Failed to map dma buffers!\n"); return(0); } @@ -133,14 +133,14 @@ int main(int argc, char **argv) { do { // Setup fds for select call FD_ZERO(&fds); - FD_SET(s,&fds); + FD_SET(s, &fds); // Setup select timeout for 1 second timeout.tv_sec = 2; timeout.tv_usec = 0; // Wait for Socket data ready - ret = select(s+1,NULL,&fds,NULL,&timeout); + ret = select(s+1, NULL, &fds, NULL, &timeout); if ( ret <= 0 ) { printf("Write timeout\n"); } else { @@ -152,22 +152,22 @@ int main(int argc, char **argv) { // Gen data if ( args.prbsDis == 0 && !prbValid ) { - prbs.genData(txData,args.size); + prbs.genData(txData, args.size); prbValid = true; } // DMA Write - if ( args.idxEn ) ret = dmaWriteIndex(s,dmaIndex,args.size,axisSetFlags(args.fuser,args.luser,0),args.dest); - else ret = dmaWrite(s,txData,args.size,axisSetFlags(args.fuser,args.luser,0),args.dest); + if ( args.idxEn ) ret = dmaWriteIndex(s, dmaIndex, args.size, axisSetFlags(args.fuser, args.luser, 0), args.dest); + else ret = dmaWrite(s, txData, args.size, axisSetFlags(args.fuser, args.luser, 0), args.dest); if ( ret > 0 ) { prbValid = false; count++; - printf("Write ret=%i, Dest=%i, Fuser=0x%.2x, Luser=0x%.2x, count=%i\n",ret,args.dest,args.fuser,args.luser,count); + printf("Write ret=%i, Dest=%i, Fuser=0x%.2x, Luser=0x%.2x, count=%i\n", ret, args.dest, args.fuser, args.luser, count); if ( args.rawEn ) { printf("Raw Data: "); for (x = 0; x < args.rawEn; x++) { - printf("0x%.2x ",((uint8_t *)txData)[x]); + printf("0x%.2x ", ((uint8_t *)txData)[x]); if ( ((x+1) % 10) == 0 ) printf("\n "); } printf("\n"); @@ -177,7 +177,7 @@ int main(int argc, char **argv) { } } while ( count < args.count ); - if ( args.idxEn ) dmaUnMapDma(s,dmaBuffers); + if ( args.idxEn ) dmaUnMapDma(s, dmaBuffers); else free(txData); close(s); diff --git a/rce_stream/driver/src/axis_gen1.c b/rce_stream/driver/src/axis_gen1.c index dd35cfa..d7816fa 100755 --- a/rce_stream/driver/src/axis_gen1.c +++ b/rce_stream/driver/src/axis_gen1.c @@ -54,10 +54,10 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Read IRQ Status if ( ioread32(&(reg->intPendAck)) != 0 ) { // Ack interrupt - iowrite32(0x1,&(reg->intPendAck)); + iowrite32(0x1, &(reg->intPendAck)); // Disable interrupts - iowrite32(0x0,&(reg->intEnable)); + iowrite32(0x0, &(reg->intEnable)); // Read from FIFOs while ( (stat = ioread32(&(reg->fifoValid))) != 0 ) { @@ -68,11 +68,11 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { handle &= 0x7FFFFFFC; if ( dev->debug > 0 ) - dev_info(dev->device,"Irq: Return TX Status Value 0x%.8x.\n",handle); + dev_info(dev->device, "Irq: Return TX Status Value 0x%.8x.\n", handle); // Attempt to find buffer in tx pool and return. otherwise return rx entry to hw. - if ((buff = dmaRetBufferIrq(dev,handle)) != NULL) { - iowrite32(handle,&(reg->rxFree)); + if ((buff = dmaRetBufferIrq(dev, handle)) != NULL) { + iowrite32(handle, &(reg->rxFree)); } } } @@ -90,7 +90,7 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Bad marker if ( (size & 0xFF000000) != 0xE0000000 ) { - dev_warn(dev->device,"Irq: Bad FIFO size marker 0x%.8x.\n", size); + dev_warn(dev->device, "Irq: Bad FIFO size marker 0x%.8x.\n", size); size = 0; } else size &= 0xFFFFFF; @@ -102,12 +102,12 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Bad marker if ( (status & 0xF0000000) != 0xF0000000 ) { - dev_warn(dev->device,"Irq: Bad FIFO status marker 0x%.8x.\n", status); + dev_warn(dev->device, "Irq: Bad FIFO status marker 0x%.8x.\n", status); size = 0; } // Find RX buffer entry - if ((buff = dmaFindBufferList(&(dev->rxBuffers),handle)) != NULL) { + if ((buff = dmaFindBufferList(&(dev->rxBuffers), handle)) != NULL) { // Extract data from descriptor buff->count++; buff->size = size; @@ -117,16 +117,16 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Check for errors if ( (status & 0x01000000) != 0 ) { - dev_info(dev->device,"Irq: AXI write error detected.\n"); + dev_info(dev->device, "Irq: AXI write error detected.\n"); buff->error |= DMA_ERR_BUS; } if ( (status & 0x02000000) != 0 ) { - dev_info(dev->device,"Irq: DMA overflow error detected.\n"); + dev_info(dev->device, "Irq: DMA overflow error detected.\n"); buff->error |= DMA_ERR_LEN; } if ( dev->debug > 0 ) { - dev_info(dev->device,"Irq: Rx size=%i, Dest=%i, Flags=0x%x, Error=0x%x.\n", + dev_info(dev->device, "Irq: Rx size=%i, Dest=%i, Flags=0x%x, Error=0x%x.\n", buff->size, buff->dest, buff->flags, buff->error); } @@ -142,26 +142,26 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { // Return entry to FPGA if destc is not open if ( desc == NULL ) { if ( dev->debug > 0 ) { - dev_info(dev->device,"Irq: Port not open return to free list.\n"); + dev_info(dev->device, "Irq: Port not open return to free list.\n"); } - iowrite32(handle,&(reg->rxFree)); + iowrite32(handle, &(reg->rxFree)); } // lane/vc is open, Add to RX Queue - else dmaRxBuffer(desc,buff); + else dmaRxBuffer(desc, buff); // Unlock spin_unlock(&dev->maskLock); } // Buffer was not found - else dev_warn(dev->device,"Irq: Failed to locate RX descriptor 0x%.8x.\n",handle); + else dev_warn(dev->device, "Irq: Failed to locate RX descriptor 0x%.8x.\n", handle); } } } // Enable interrupts - iowrite32(0x1,&(reg->intEnable)); + iowrite32(0x1, &(reg->intEnable)); return(IRQ_HANDLED); } return(IRQ_NONE); @@ -177,31 +177,31 @@ void AxisG1_Init(struct DmaDevice *dev) { reg = (struct AxisG1Reg *)dev->reg; // Set MAX RX - iowrite32(dev->cfgSize,&(reg->maxRxSize)); + iowrite32(dev->cfgSize, &(reg->maxRxSize)); // Clear FIFOs - iowrite32(0x1,&(reg->fifoClear)); - iowrite32(0x0,&(reg->fifoClear)); + iowrite32(0x1, &(reg->fifoClear)); + iowrite32(0x0, &(reg->fifoClear)); // Enable rx and tx - iowrite32(0x1,&(reg->rxEnable)); - iowrite32(0x1,&(reg->txEnable)); + iowrite32(0x1, &(reg->rxEnable)); + iowrite32(0x1, &(reg->txEnable)); // Push RX buffers to hardware for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { - buff = dmaGetBufferList(&(dev->rxBuffers),x); + buff = dmaGetBufferList(&(dev->rxBuffers), x); if ( dmaBufferToHw(buff) < 0 ) - dev_warn(dev->device,"Init: Failed to map dma buffer.\n"); - else iowrite32(buff->buffHandle,&(reg->rxFree)); + dev_warn(dev->device, "Init: Failed to map dma buffer.\n"); + else iowrite32(buff->buffHandle, &(reg->rxFree)); } // Set cache mode - if ( dev->cfgMode & BUFF_ARM_ACP ) iowrite32(0xF,&(reg->swCache)); - else iowrite32(0,&(reg->swCache)); + if ( dev->cfgMode & BUFF_ARM_ACP ) iowrite32(0xF, &(reg->swCache)); + else iowrite32(0, &(reg->swCache)); // Set dest mask - memset(dev->destMask,0xFF,DMA_MASK_SIZE); - dev_info(dev->device,"Init: Found Version 1 Device.\n"); + memset(dev->destMask, 0xFF, DMA_MASK_SIZE); + dev_info(dev->device, "Init: Found Version 1 Device.\n"); } // Enable the card @@ -210,11 +210,11 @@ void AxisG1_Enable(struct DmaDevice *dev) { reg = (struct AxisG1Reg *)dev->reg; // Online bits = 1, Ack bit = 0 - iowrite32(0x1,&(reg->onlineAck)); + iowrite32(0x1, &(reg->onlineAck)); // Enable interrupt - iowrite32(0x1,&(reg->intPendAck)); - iowrite32(0x1,&(reg->intEnable)); + iowrite32(0x1, &(reg->intPendAck)); + iowrite32(0x1, &(reg->intEnable)); } // Clear card in top level Remove @@ -223,15 +223,15 @@ void AxisG1_Clear(struct DmaDevice *dev) { reg = (struct AxisG1Reg *)dev->reg; // Disable interrupt - iowrite32(0x0,&(reg->intEnable)); + iowrite32(0x0, &(reg->intEnable)); // Clear FIFOs - iowrite32(0x1,&(reg->fifoClear)); + iowrite32(0x1, &(reg->fifoClear)); // Disable rx and tx - iowrite32(0x0,&(reg->rxEnable)); - iowrite32(0x0,&(reg->txEnable)); - iowrite32(0x0,&(reg->onlineAck)); + iowrite32(0x0, &(reg->rxEnable)); + iowrite32(0x0, &(reg->txEnable)); + iowrite32(0x0, &(reg->onlineAck)); } @@ -245,8 +245,8 @@ void AxisG1_RetRxBuffer(struct DmaDevice *dev, struct DmaBuffer **buff, uint32_t for (x=0; x < count; x++) { if ( dmaBufferToHw(buff[x]) < 0 ) - dev_warn(dev->device,"RetRxBuffer: Failed to map dma buffer.\n"); - else iowrite32(buff[x]->buffHandle,&(reg->rxFree)); + dev_warn(dev->device, "RetRxBuffer: Failed to map dma buffer.\n"); + else iowrite32(buff[x]->buffHandle, &(reg->rxFree)); } } @@ -265,16 +265,16 @@ int32_t AxisG1_SendBuffer(struct DmaDevice *dev, struct DmaBuffer **buff, uint32 control += (buff[x]->flags << 8) & 0x00FFFF00; // flags[15:9] = luser, flags[7:0] = fuser if ( dmaBufferToHw(buff[x]) < 0 ) { - dev_warn(dev->device,"SendBuffer: Failed to map dma buffer.\n"); + dev_warn(dev->device, "SendBuffer: Failed to map dma buffer.\n"); return(-1); } // Write to hardware spin_lock(&dev->writeHwLock); - iowrite32(buff[x]->buffHandle,&(reg->txPostA)); - iowrite32(buff[x]->size,&(reg->txPostB)); - iowrite32(control,&(reg->txPostC)); + iowrite32(buff[x]->buffHandle, &(reg->txPostA)); + iowrite32(buff[x]->size, &(reg->txPostB)); + iowrite32(control, &(reg->txPostC)); spin_unlock(&dev->writeHwLock); } @@ -291,14 +291,14 @@ int32_t AxisG1_Command(struct DmaDevice *dev, uint32_t cmd, uint64_t arg) { // Read ACK case AXIS_Read_Ack: spin_lock(&dev->commandLock); - iowrite32(0x3,&(reg->onlineAck)); - iowrite32(0x1,&(reg->onlineAck)); + iowrite32(0x3, &(reg->onlineAck)); + iowrite32(0x1, &(reg->onlineAck)); spin_unlock(&dev->commandLock); return(0); break; default: - dev_warn(dev->device,"Command: Invalid command=%i\n",cmd); + dev_warn(dev->device, "Command: Invalid command=%i\n", cmd); return(-1); break; } @@ -309,12 +309,12 @@ void AxisG1_SeqShow(struct seq_file *s, struct DmaDevice *dev) { struct AxisG1Reg *reg; reg = (struct AxisG1Reg *)dev->reg; - seq_printf(s,"\n"); - seq_printf(s,"-------------- General HW -----------------\n"); - seq_printf(s," Writable : %i\n",((ioread32(&(reg->fifoValid)) >> 1) & 0x1)); - seq_printf(s," Readable : %i\n",(ioread32(&(reg->fifoValid)) & 0x1)); - seq_printf(s," Write Int Status : %i\n",((ioread32(&(reg->intPendAck)) >> 1) & 0x1)); - seq_printf(s," Read Int Status : %i\n",(ioread32(&(reg->intPendAck)) & 0x1)); - seq_printf(s," Cache Setting : 0x%x\n",(ioread32(&(reg->swCache)))); + seq_printf(s, "\n"); + seq_printf(s, "-------------- General HW -----------------\n"); + seq_printf(s, " Writable : %i\n", ((ioread32(&(reg->fifoValid)) >> 1) & 0x1)); + seq_printf(s, " Readable : %i\n", (ioread32(&(reg->fifoValid)) & 0x1)); + seq_printf(s, " Write Int Status : %i\n", ((ioread32(&(reg->intPendAck)) >> 1) & 0x1)); + seq_printf(s, " Read Int Status : %i\n", (ioread32(&(reg->intPendAck)) & 0x1)); + seq_printf(s, " Cache Setting : 0x%x\n", (ioread32(&(reg->swCache)))); } diff --git a/rce_stream/driver/src/rce_top.c b/rce_stream/driver/src/rce_top.c index 648b3ae..c1ed79c 100755 --- a/rce_stream/driver/src/rce_top.c +++ b/rce_stream/driver/src/rce_top.c @@ -110,7 +110,7 @@ int Rce_Probe(struct platform_device *pdev) { // Find matching entry tmpIdx = -1; for ( x=0; x < MAX_DMA_DEVICES; x++ ) { - if (strcmp(tmpName,RceDevNames[x]) == 0) { + if (strcmp(tmpName, RceDevNames[x]) == 0) { tmpIdx = x; break; } @@ -118,7 +118,7 @@ int Rce_Probe(struct platform_device *pdev) { // Matching device not found if ( tmpIdx < 0 ) { - pr_warn("%s: Probe: Matching device not found: %s.\n", MOD_NAME,tmpName); + pr_warn("%s: Probe: Matching device not found: %s.\n", MOD_NAME, tmpName); return(-1); } dev = &gDmaDevices[tmpIdx]; @@ -126,7 +126,7 @@ int Rce_Probe(struct platform_device *pdev) { pr_info("%s: Probe: Using index %i for %s.\n", MOD_NAME, tmpIdx, tmpName); // Init structure - memset(dev,0,sizeof(struct DmaDevice)); + memset(dev, 0, sizeof(struct DmaDevice)); dev->index = tmpIdx; // Increment count @@ -183,10 +183,10 @@ int Rce_Probe(struct platform_device *pdev) { // Version 1 } else { - iowrite32(0x1,((uint8_t *)dev->reg)+0x8); + iowrite32(0x1, ((uint8_t *)dev->reg)+0x8); if ( ioread32(((uint8_t *)dev->reg)+0x8) != 0x1 ) { release_mem_region(dev->baseAddr, dev->baseSize); - dev_info(dev->device,"Probe: Empty register space. Exiting\n"); + dev_info(dev->device, "Probe: Empty register space. Exiting\n"); return(-1); } dev->hwFunc = &(AxisG1_functions); @@ -196,8 +196,8 @@ int Rce_Probe(struct platform_device *pdev) { /* not available on arm64 */ #if !defined( __aarch64__) if ( (dev->cfgMode & BUFF_ARM_ACP) || (dev->cfgMode & AXIS2_RING_ACP) ) { - set_dma_ops(&pdev->dev,&arm_coherent_dma_ops); - dev_info(dev->device,"Probe: Set COHERENT DMA =%i\n",dev->cfgMode); + set_dma_ops(&pdev->dev, &arm_coherent_dma_ops); + dev_info(dev->device, "Probe: Set COHERENT DMA =%i\n", dev->cfgMode); } #endif // Call common dma init function @@ -220,7 +220,7 @@ int Rce_Remove(struct platform_device *pdev) { // Find matching entry tmpIdx = -1; for ( x=0; x < MAX_DMA_DEVICES; x++ ) { - if (strcmp(tmpName,RceDevNames[x]) == 0) { + if (strcmp(tmpName, RceDevNames[x]) == 0) { tmpIdx = x; break; } @@ -243,39 +243,39 @@ int Rce_Remove(struct platform_device *pdev) { } // Parameters -module_param(cfgTxCount0,int,0); +module_param(cfgTxCount0, int, 0); MODULE_PARM_DESC(cfgTxCount0, "TX buffer count"); -module_param(cfgTxCount1,int,0); +module_param(cfgTxCount1, int, 0); MODULE_PARM_DESC(cfgTxCount1, "TX buffer count"); -module_param(cfgTxCount2,int,0); +module_param(cfgTxCount2, int, 0); MODULE_PARM_DESC(cfgTxCount2, "TX buffer count"); -module_param(cfgRxCount0,int,0); +module_param(cfgRxCount0, int, 0); MODULE_PARM_DESC(cfgRxCount0, "RX buffer count"); -module_param(cfgRxCount1,int,0); +module_param(cfgRxCount1, int, 0); MODULE_PARM_DESC(cfgRxCount1, "RX buffer count"); -module_param(cfgRxCount2,int,0); +module_param(cfgRxCount2, int, 0); MODULE_PARM_DESC(cfgRxCount2, "RX buffer count"); -module_param(cfgSize0,int,0); +module_param(cfgSize0, int, 0); MODULE_PARM_DESC(cfgSize0, "RX/TX buffer size"); -module_param(cfgSize1,int,0); +module_param(cfgSize1, int, 0); MODULE_PARM_DESC(cfgSize1, "RX/TX buffer size"); -module_param(cfgSize2,int,0); +module_param(cfgSize2, int, 0); MODULE_PARM_DESC(cfgSize2, "RX/TX buffer size"); -module_param(cfgMode0,int,0); +module_param(cfgMode0, int, 0); MODULE_PARM_DESC(cfgMode0, "RX buffer mode"); -module_param(cfgMode1,int,0); +module_param(cfgMode1, int, 0); MODULE_PARM_DESC(cfgMode1, "RX buffer mode"); -module_param(cfgMode2,int,0); +module_param(cfgMode2, int, 0); MODULE_PARM_DESC(cfgMode2, "RX buffer mode"); From 45cf58cf5f0e0c3a6ec4edca1e7cb523764b0e24 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 11:14:34 -0700 Subject: [PATCH 17/23] resolving c++ linter Else clause should never be on same line as else (use 2 lines) [whitespace/newline] --- CPPLINT.cfg | 1 - common/app_lib/PrbsData.cpp | 10 +++++--- common/driver/axis_gen2.c | 11 ++++++--- common/driver/dma_common.c | 27 +++++++++++++++------ common/driver/gpu_async.c | 6 +++-- data_dev/app/src/dmaWrite.cpp | 7 ++++-- rce_hp_buffers/driver/src/rce_hp.c | 6 +++-- rce_memmap/driver/src/rce_map.c | 7 ++++-- rce_stream/app/src/dmaLoopTest.cpp | 21 +++++++++++----- rce_stream/app/src/dmaRead.cpp | 10 +++++--- rce_stream/app/src/dmaWrite.cpp | 17 +++++++++---- rce_stream/driver/src/axis_gen1.c | 39 ++++++++++++++++++++---------- 12 files changed, 111 insertions(+), 51 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index 1c36827..12f1e47 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -36,4 +36,3 @@ filter=-build/namespaces # TODO: Need to resolve these before pull request filter=-whitespace/indent -filter=-whitespace/newline diff --git a/common/app_lib/PrbsData.cpp b/common/app_lib/PrbsData.cpp index 2fd5137..e1fcad5 100644 --- a/common/app_lib/PrbsData.cpp +++ b/common/app_lib/PrbsData.cpp @@ -150,9 +150,13 @@ bool PrbsData::processData(const void *data, uint32_t size) { // Verify PRBS sequence for (word = 2; word < size / (_width / 8); word++) { expected = flfsr(expected); - if (_width == 16) got = data16[word]; - else if (_width == 32) got = data32[word]; - else got = 0; + if (_width == 16) { + got = data16[word]; + } else if (_width == 32) { + got = data32[word]; + } else { + got = 0; + } if (expected != got) { fprintf(stderr, "Bad value at index %i. exp=0x%x, got=0x%x\n", word, expected, got); diff --git a/common/driver/axis_gen2.c b/common/driver/axis_gen2.c index a78c415..4a72734 100755 --- a/common/driver/axis_gen2.c +++ b/common/driver/axis_gen2.c @@ -309,19 +309,22 @@ uint32_t AxisG2_Process(struct DmaDevice * dev, struct AxisG2Reg *reg, struct Ax if (hwData->hwWrBuffCnt < (hwData->addrCount-1)) { AxisG2_WriteFree(buff, reg, hwData->desc128En); ++hwData->hwWrBuffCnt; + } else { + dmaQueuePushIrq(&(hwData->wrQueue), buff); } - else dmaQueuePushIrq(&(hwData->wrQueue), buff); // Background operation handling if ( (hwData->bgEnable >> buff->id) & 0x1 ) { writel(0x1, &(reg->bgCount[buff->id])); } - } // Lane/VC is open; add to RX queue - else dmaRxBufferIrq(desc, buff); + } else { + dmaRxBufferIrq(desc, buff); + } + } else { + dev_warn(dev->device, "Process: Failed to locate RX buffer index %i.\n", ret.index); } - else dev_warn(dev->device, "Process: Failed to locate RX buffer index %i.\n", ret.index); // Update write index hwData->writeIndex = ((hwData->writeIndex+1) % hwData->addrCount); diff --git a/common/driver/dma_common.c b/common/driver/dma_common.c index c149e73..23a8195 100755 --- a/common/driver/dma_common.c +++ b/common/driver/dma_common.c @@ -735,8 +735,11 @@ ssize_t Dma_Write(struct file *filp, const char *buffer, size_t count, loff_t *f } // Convert pointer based on architecture or request - if (sizeof(void *) == 4 || wr.is32) dp = (void *)(wr.data & 0xFFFFFFFF); - else dp = (void *)wr.data; + if (sizeof(void *) == 4 || wr.is32) { + dp = (void *)(wr.data & 0xFFFFFFFF); + } else { + dp = (void *)wr.data; + } // Use index if pointer is null if (dp == 0) { @@ -771,8 +774,11 @@ ssize_t Dma_Write(struct file *filp, const char *buffer, size_t count, loff_t *f dev_info(dev->device, "Write: Size=%i, Dest=%i, Flags=0x%.8x, res=%li\n", buff->size, buff->dest, buff->flags, res); } - if (res < 0) return res; - else return buff->size; + if (res < 0) { + return res; + } else { + return buff->size; + } } /** @@ -1252,8 +1258,11 @@ int Dma_ProcOpen(struct inode *inode, struct file *file) { * Return: Non-NULL pointer on first iteration, NULL to stop. */ void *Dma_SeqStart(struct seq_file *s, loff_t *pos) { - if (*pos == 0) return (void *)1; - else return NULL; + if (*pos == 0) { + return (void *)1; + } else { + return NULL; + } } /** @@ -1351,8 +1360,9 @@ int Dma_SeqShow(struct seq_file *s, void *v) { if (dev->rxBuffers.count == 0) { min = 0; avg = 0; + } else { + avg = sum/dev->rxBuffers.count; } - else avg = sum/dev->rxBuffers.count; seq_printf(s, " Buffers In User : %u\n", userCnt); seq_printf(s, " Buffers In Hw : %u\n", hwCnt); @@ -1396,8 +1406,9 @@ int Dma_SeqShow(struct seq_file *s, void *v) { if (dev->txBuffers.count == 0) { min = 0; avg = 0; + } else { + avg = sum/dev->txBuffers.count; } - else avg = sum/dev->txBuffers.count; seq_printf(s, " Buffers In User : %u\n", userCnt); seq_printf(s, " Buffers In Hw : %u\n", hwCnt); diff --git a/common/driver/gpu_async.c b/common/driver/gpu_async.c index 1191264..8126900 100755 --- a/common/driver/gpu_async.c +++ b/common/driver/gpu_async.c @@ -151,9 +151,11 @@ int32_t Gpu_AddNvidia(struct DmaDevice *dev, uint64_t arg) { // Determine how much memory is contiguous mapSize = 0; for (x=0; x < buffer->dmaMapping->entries; x++) { - if (buffer->dmaMapping->dma_addresses[0] + mapSize == buffer->dmaMapping->dma_addresses[x] ) + if (buffer->dmaMapping->dma_addresses[0] + mapSize == buffer->dmaMapping->dma_addresses[x]) { mapSize += GPU_BOUND_SIZE; - else break; + } else { + break; + } } dev_warn(dev->device, "Gpu_AddNvidia: dma address 0 = 0x%llx, total = %li, pages = %i\n", diff --git a/data_dev/app/src/dmaWrite.cpp b/data_dev/app/src/dmaWrite.cpp index 88d1399..497f7d5 100644 --- a/data_dev/app/src/dmaWrite.cpp +++ b/data_dev/app/src/dmaWrite.cpp @@ -176,8 +176,11 @@ int main(int argc, char **argv) { gettimeofday(&endTime, NULL); // Clean up allocated resources - if (args.idxEn) dmaUnMapDma(s, dmaBuffers); - else free(txData); + if (args.idxEn) { + dmaUnMapDma(s, dmaBuffers); + } else { + free(txData); + } // Calculate and print write operation statistics timersub(&endTime, &startTime, &diffTime); diff --git a/rce_hp_buffers/driver/src/rce_hp.c b/rce_hp_buffers/driver/src/rce_hp.c index 98e4dae..2b8f918 100755 --- a/rce_hp_buffers/driver/src/rce_hp.c +++ b/rce_hp_buffers/driver/src/rce_hp.c @@ -51,9 +51,11 @@ void RceHp_Init(struct DmaDevice *dev) { // Push buffers to hardware for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { buff = dmaGetBufferList(&(dev->rxBuffers), x); - if ( dmaBufferToHw(buff) < 0 ) + if ( dmaBufferToHw(buff) < 0 ) { dev_warn(dev->device, "Init: Failed to map dma buffer.\n"); - else iowrite32(buff->buffHandle, &(reg->bufferAlloc)); + } else { + iowrite32(buff->buffHandle, &(reg->bufferAlloc)); + } } // Set dest mask diff --git a/rce_memmap/driver/src/rce_map.c b/rce_memmap/driver/src/rce_map.c index 88007ec..2007344 100755 --- a/rce_memmap/driver/src/rce_map.c +++ b/rce_memmap/driver/src/rce_map.c @@ -141,8 +141,11 @@ void Map_Exit(void) { struct MemMap *tmp; // Unregister Device Driver - if ( gCl != NULL ) device_destroy(gCl, dev.devNum); - else printk(KERN_ERR MOD_NAME " Clean: gCl is already NULL.\n"); + if ( gCl != NULL ) { + device_destroy(gCl, dev.devNum); + } else { + printk(KERN_ERR MOD_NAME " Clean: gCl is already NULL.\n"); + } unregister_chrdev_region(dev.devNum, 1); diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index 676e296..84c9d1b 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -171,8 +171,11 @@ void *runWrite(void *t) { prbValid = true; } - if ( txData->idxEn ) ret = dmaWriteIndex(fd, dmaIndex, txData->size, axisSetFlags(txData->fuser, txData->luser, 0), txData->dest); - else ret = dmaWrite(fd, data, txData->size, axisSetFlags(txData->fuser, txData->luser, 0), txData->dest); + if ( txData->idxEn ) { + ret = dmaWriteIndex(fd, dmaIndex, txData->size, axisSetFlags(txData->fuser, txData->luser, 0), txData->dest); + } else { + ret = dmaWrite(fd, data, txData->size, axisSetFlags(txData->fuser, txData->luser, 0), txData->dest); + } if ( ret < 0 ) { printf("Write Error at count %lu. Dest=%i\n", txData->count, txData->dest); @@ -186,8 +189,11 @@ void *runWrite(void *t) { } } - if ( txData->idxEn ) dmaUnMapDma(fd, dmaBuffers); - else free(data); + if ( txData->idxEn ) { + dmaUnMapDma(fd, dmaBuffers); + } else { + free(data); + } close(fd); txData->running = false; @@ -297,8 +303,11 @@ void *runRead(void *t) { } } - if ( idxEn ) dmaUnMapDma(fd, dmaBuffers); - else free(data); + if ( idxEn ) { + dmaUnMapDma(fd, dmaBuffers); + } else { + free(data); + } close(fd); rxData->running = false; diff --git a/rce_stream/app/src/dmaRead.cpp b/rce_stream/app/src/dmaRead.cpp index 9605f10..814f444 100644 --- a/rce_stream/app/src/dmaRead.cpp +++ b/rce_stream/app/src/dmaRead.cpp @@ -154,8 +154,9 @@ int main(int argc, char **argv) { if ( args.idxEn ) { ret = dmaReadIndex(s, &dmaIndex, &rxFlags, NULL, &rxDest); rxData = dmaBuffers[dmaIndex]; + } else { + ret = dmaRead(s, rxData, maxSize, &rxFlags, NULL, &rxDest); } - else ret = dmaRead(s, rxData, maxSize, &rxFlags, NULL, &rxDest); rxFuser = axisGetFuser(rxFlags); rxLuser = axisGetFuser(rxFlags); @@ -178,8 +179,11 @@ int main(int argc, char **argv) { } } while ( 1 ); - if ( args.idxEn ) dmaUnMapDma(s, dmaBuffers); - else free(rxData); + if ( args.idxEn ) { + dmaUnMapDma(s, dmaBuffers); + } else { + free(rxData); + } close(s); return(0); diff --git a/rce_stream/app/src/dmaWrite.cpp b/rce_stream/app/src/dmaWrite.cpp index 0150cd4..4618d8d 100644 --- a/rce_stream/app/src/dmaWrite.cpp +++ b/rce_stream/app/src/dmaWrite.cpp @@ -157,8 +157,11 @@ int main(int argc, char **argv) { } // DMA Write - if ( args.idxEn ) ret = dmaWriteIndex(s, dmaIndex, args.size, axisSetFlags(args.fuser, args.luser, 0), args.dest); - else ret = dmaWrite(s, txData, args.size, axisSetFlags(args.fuser, args.luser, 0), args.dest); + if ( args.idxEn ) { + ret = dmaWriteIndex(s, dmaIndex, args.size, axisSetFlags(args.fuser, args.luser, 0), args.dest); + } else { + ret = dmaWrite(s, txData, args.size, axisSetFlags(args.fuser, args.luser, 0), args.dest); + } if ( ret > 0 ) { prbValid = false; @@ -172,13 +175,17 @@ int main(int argc, char **argv) { } printf("\n"); } + } else if ( ret < 0 ) { + printf("Write error!\n"); } - else if ( ret < 0 ) printf("Write error!\n"); } } while ( count < args.count ); - if ( args.idxEn ) dmaUnMapDma(s, dmaBuffers); - else free(txData); + if ( args.idxEn ) { + dmaUnMapDma(s, dmaBuffers); + } else { + free(txData); + } close(s); return(0); diff --git a/rce_stream/driver/src/axis_gen1.c b/rce_stream/driver/src/axis_gen1.c index d7816fa..7479bde 100755 --- a/rce_stream/driver/src/axis_gen1.c +++ b/rce_stream/driver/src/axis_gen1.c @@ -92,8 +92,9 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { if ( (size & 0xFF000000) != 0xE0000000 ) { dev_warn(dev->device, "Irq: Bad FIFO size marker 0x%.8x.\n", size); size = 0; + } else { + size &= 0xFFFFFF; } - else size &= 0xFFFFFF; // Get status do { @@ -136,8 +137,11 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { spin_lock(&dev->maskLock); // Find owner of lane/vc - if ( buff->dest < DMA_MAX_DEST ) desc = dev->desc[buff->dest]; - else desc = NULL; + if ( buff->dest < DMA_MAX_DEST ) { + desc = dev->desc[buff->dest]; + } else { + desc = NULL; + } // Return entry to FPGA if destc is not open if ( desc == NULL ) { @@ -145,17 +149,19 @@ irqreturn_t AxisG1_Irq(int irq, void *dev_id) { dev_info(dev->device, "Irq: Port not open return to free list.\n"); } iowrite32(handle, &(reg->rxFree)); - } // lane/vc is open, Add to RX Queue - else dmaRxBuffer(desc, buff); + } else { + dmaRxBuffer(desc, buff); + } // Unlock spin_unlock(&dev->maskLock); - } // Buffer was not found - else dev_warn(dev->device, "Irq: Failed to locate RX descriptor 0x%.8x.\n", handle); + } else { + dev_warn(dev->device, "Irq: Failed to locate RX descriptor 0x%.8x.\n", handle); + } } } } @@ -190,14 +196,19 @@ void AxisG1_Init(struct DmaDevice *dev) { // Push RX buffers to hardware for (x=dev->rxBuffers.baseIdx; x < (dev->rxBuffers.baseIdx + dev->rxBuffers.count); x++) { buff = dmaGetBufferList(&(dev->rxBuffers), x); - if ( dmaBufferToHw(buff) < 0 ) + if ( dmaBufferToHw(buff) < 0 ) { dev_warn(dev->device, "Init: Failed to map dma buffer.\n"); - else iowrite32(buff->buffHandle, &(reg->rxFree)); + } else { + iowrite32(buff->buffHandle, &(reg->rxFree)); + } } // Set cache mode - if ( dev->cfgMode & BUFF_ARM_ACP ) iowrite32(0xF, &(reg->swCache)); - else iowrite32(0, &(reg->swCache)); + if ( dev->cfgMode & BUFF_ARM_ACP ) { + iowrite32(0xF, &(reg->swCache)); + } else { + iowrite32(0, &(reg->swCache)); + } // Set dest mask memset(dev->destMask, 0xFF, DMA_MASK_SIZE); @@ -244,9 +255,11 @@ void AxisG1_RetRxBuffer(struct DmaDevice *dev, struct DmaBuffer **buff, uint32_t reg = (struct AxisG1Reg *)dev->reg; for (x=0; x < count; x++) { - if ( dmaBufferToHw(buff[x]) < 0 ) + if ( dmaBufferToHw(buff[x]) < 0 ) { dev_warn(dev->device, "RetRxBuffer: Failed to map dma buffer.\n"); - else iowrite32(buff[x]->buffHandle, &(reg->rxFree)); + } else { + iowrite32(buff[x]->buffHandle, &(reg->rxFree)); + } } } From 159c8e413d0cca8db18934f8d600288c94e1aef9 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 11:21:35 -0700 Subject: [PATCH 18/23] resolving c++ linter Do not use namespace using-directives. Use using-declarations instead. [build/namespaces] --- CPPLINT.cfg | 4 ---- data_dev/app/src/dmaRate.cpp | 6 +++++- data_dev/app/src/dmaWrite.cpp | 6 +++++- data_dev/app/src/setDebug.cpp | 5 ++++- data_dev/app/src/test.cpp | 5 ++++- rce_stream/app/src/dmaLoopTest.cpp | 6 +++++- rce_stream/app/src/dmaRead.cpp | 6 +++++- rce_stream/app/src/dmaSetDebug.cpp | 6 +++++- rce_stream/app/src/dmaWrite.cpp | 6 +++++- 9 files changed, 38 insertions(+), 12 deletions(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index 12f1e47..8cdb468 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -30,9 +30,5 @@ filter=-runtime/threadsafe_fn # Because headers are organized in same directory and C kernel driver code filter=-build/include_subdir -# TODO: Fix this in the future: -# Do not use namespace using-directives. Use using-declarations instead. [build/namespaces] -filter=-build/namespaces - # TODO: Need to resolve these before pull request filter=-whitespace/indent diff --git a/data_dev/app/src/dmaRate.cpp b/data_dev/app/src/dmaRate.cpp index 8e33a23..cb45889 100644 --- a/data_dev/app/src/dmaRate.cpp +++ b/data_dev/app/src/dmaRate.cpp @@ -24,9 +24,13 @@ #include #include #include +#include + #include // #include -using namespace std; + +using std::cout; +using std::endl; #define MAX_RET_CNT_C 1000 diff --git a/data_dev/app/src/dmaWrite.cpp b/data_dev/app/src/dmaWrite.cpp index 497f7d5..16f496f 100644 --- a/data_dev/app/src/dmaWrite.cpp +++ b/data_dev/app/src/dmaWrite.cpp @@ -24,9 +24,13 @@ #include #include #include +#include + #include #include -using namespace std; + +using std::cout; +using std::endl; const char *argp_program_version = "dmaWrite 1.0"; const char *argp_program_bug_address = "rherbst@slac.stanford.edu"; diff --git a/data_dev/app/src/setDebug.cpp b/data_dev/app/src/setDebug.cpp index e05bee4..8631d14 100755 --- a/data_dev/app/src/setDebug.cpp +++ b/data_dev/app/src/setDebug.cpp @@ -24,9 +24,12 @@ #include #include #include +#include + #include -using namespace std; +using std::cout; +using std::endl; // Version and contact information const char *argp_program_version = "setDebug 1.0"; diff --git a/data_dev/app/src/test.cpp b/data_dev/app/src/test.cpp index f66a263..b2466c7 100644 --- a/data_dev/app/src/test.cpp +++ b/data_dev/app/src/test.cpp @@ -25,9 +25,12 @@ #include #include #include +#include + #include -using namespace std; +using std::cout; +using std::endl; int main(int argc, char **argv) { int32_t s; diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index 84c9d1b..d9fbd07 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -32,9 +32,13 @@ #include #include #include +#include + #include #include -using namespace std; + +using std::cout; +using std::endl; const char * argp_program_version = "dmaLoopTest 1.0"; const char * argp_program_bug_address = "rherbst@slac.stanford.edu"; diff --git a/rce_stream/app/src/dmaRead.cpp b/rce_stream/app/src/dmaRead.cpp index 814f444..1cbf3cc 100644 --- a/rce_stream/app/src/dmaRead.cpp +++ b/rce_stream/app/src/dmaRead.cpp @@ -27,9 +27,13 @@ #include #include #include +#include + #include #include -using namespace std; + +using std::cout; +using std::endl; const char * argp_program_version = "pgpRead 1.0"; const char * argp_program_bug_address = "rherbst@slac.stanford.edu"; diff --git a/rce_stream/app/src/dmaSetDebug.cpp b/rce_stream/app/src/dmaSetDebug.cpp index 05d9f88..92fc2a8 100755 --- a/rce_stream/app/src/dmaSetDebug.cpp +++ b/rce_stream/app/src/dmaSetDebug.cpp @@ -28,8 +28,12 @@ #include #include #include +#include + #include -using namespace std; + +using std::cout; +using std::endl; const char * argp_program_version = "dmaSetDebug 1.0"; const char * argp_program_bug_address = "rherbst@slac.stanford.edu"; diff --git a/rce_stream/app/src/dmaWrite.cpp b/rce_stream/app/src/dmaWrite.cpp index 4618d8d..228685d 100644 --- a/rce_stream/app/src/dmaWrite.cpp +++ b/rce_stream/app/src/dmaWrite.cpp @@ -27,9 +27,13 @@ #include #include #include +#include + #include #include -using namespace std; + +using std::cout; +using std::endl; const char * argp_program_version = "dmaWrite 1.0"; const char * argp_program_bug_address = "rherbst@slac.stanford.edu"; From eb2c851aed141064678af8491c8e0be66d5f7aa2 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 11:26:46 -0700 Subject: [PATCH 19/23] clean up CPPLINT.cfg --- CPPLINT.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CPPLINT.cfg b/CPPLINT.cfg index 8cdb468..9921e6a 100644 --- a/CPPLINT.cfg +++ b/CPPLINT.cfg @@ -30,5 +30,5 @@ filter=-runtime/threadsafe_fn # Because headers are organized in same directory and C kernel driver code filter=-build/include_subdir -# TODO: Need to resolve these before pull request +# TODO: We need to make a decision on what number of spaces for indent filter=-whitespace/indent From 40ebea6957811b26643dc31641dcf1f195ba37f7 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 11:39:52 -0700 Subject: [PATCH 20/23] code header clean up --- include/AxiVersion.h | 6 +- include/DataDriver.h | 6 +- include/DmaDriver.h | 6 +- include/GpuAsync.h | 6 +- petalinux/aximemorymap/files/COPYING | 340 --------------------------- petalinux/axistreamdma/files/COPYING | 340 --------------------------- rce_hp_buffers/driver/Makefile | 7 +- rce_hp_buffers/driver/src/rce_hp.c | 8 +- rce_hp_buffers/driver/src/rce_hp.h | 9 +- rce_hp_buffers/driver/src/rce_top.c | 8 +- rce_hp_buffers/driver/src/rce_top.h | 8 +- rce_memmap/driver/Makefile | 8 +- rce_memmap/driver/src/rce_map.c | 8 +- rce_memmap/driver/src/rce_map.h | 8 +- rce_stream/app/Makefile | 9 +- rce_stream/app/src/dmaLoopTest.cpp | 9 +- rce_stream/app/src/dmaRead.cpp | 9 +- rce_stream/app/src/dmaSetDebug.cpp | 9 +- rce_stream/app/src/dmaWrite.cpp | 9 +- rce_stream/driver/Makefile | 8 +- rce_stream/driver/src/axis_gen1.c | 9 +- rce_stream/driver/src/axis_gen1.h | 9 +- rce_stream/driver/src/rce_top.c | 9 +- 23 files changed, 42 insertions(+), 806 deletions(-) delete mode 100644 petalinux/aximemorymap/files/COPYING delete mode 100644 petalinux/axistreamdma/files/COPYING diff --git a/include/AxiVersion.h b/include/AxiVersion.h index 210aaf4..11c953c 100755 --- a/include/AxiVersion.h +++ b/include/AxiVersion.h @@ -1,7 +1,7 @@ /** - *----------------------------------------------------------------------------- - * Company: SLAC National Accelerator Laboratory - *----------------------------------------------------------------------------- + * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + * ---------------------------------------------------------------------------- * Description: * Defines an interface for accessing AXI version information in kernel space. *----------------------------------------------------------------------------- diff --git a/include/DataDriver.h b/include/DataDriver.h index ed87768..16c59d9 100755 --- a/include/DataDriver.h +++ b/include/DataDriver.h @@ -1,7 +1,7 @@ /** - *----------------------------------------------------------------------------- - * Company: SLAC National Accelerator Laboratory - *----------------------------------------------------------------------------- + * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + * ---------------------------------------------------------------------------- * Description: * Definitions and inline functions for interacting with the Data Development driver *----------------------------------------------------------------------------- diff --git a/include/DmaDriver.h b/include/DmaDriver.h index ba17288..59e2b35 100755 --- a/include/DmaDriver.h +++ b/include/DmaDriver.h @@ -1,7 +1,7 @@ /** - *----------------------------------------------------------------------------- - * Company: SLAC National Accelerator Laboratory - *----------------------------------------------------------------------------- + * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + * ---------------------------------------------------------------------------- * Description: * This header file defines the interfaces and data structures used by * DMA (Direct Memory Access) drivers in the aes_stream_drivers package. diff --git a/include/GpuAsync.h b/include/GpuAsync.h index c874052..d552b71 100755 --- a/include/GpuAsync.h +++ b/include/GpuAsync.h @@ -1,7 +1,7 @@ /** - *----------------------------------------------------------------------------- - * Company: SLAC National Accelerator Laboratory - *----------------------------------------------------------------------------- + * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + * ---------------------------------------------------------------------------- * Description: * Provides definitions and inline functions for utilizing GPU asynchronous * features within the aes_stream_drivers package. diff --git a/petalinux/aximemorymap/files/COPYING b/petalinux/aximemorymap/files/COPYING deleted file mode 100644 index 6d45519..0000000 --- a/petalinux/aximemorymap/files/COPYING +++ /dev/null @@ -1,340 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. 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For software which is copyrighted by the Free -Software Foundation, write to the Free Software Foundation; we sometimes -make exceptions for this. Our decision will be guided by the two goals -of preserving the free status of all derivatives of our free software and -of promoting the sharing and reuse of software generally. - - NO WARRANTY - - 11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY -FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN -OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES -PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED -OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS -TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU. SHOULD THE -PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, -REPAIR OR CORRECTION. - - 12. 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It is safest -to attach them to the start of each source file to most effectively -convey the exclusion of warranty; and each file should have at least -the "copyright" line and a pointer to where the full notice is found. - - - Copyright (C) - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - - -Also add information on how to contact you by electronic and paper mail. - -If the program is interactive, make it output a short notice like this -when it starts in an interactive mode: - - Gnomovision version 69, Copyright (C) year name of author - Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. - This is free software, and you are welcome to redistribute it - under certain conditions; type `show c' for details. - -The hypothetical commands `show w' and `show c' should show the appropriate -parts of the General Public License. Of course, the commands you use may -be called something other than `show w' and `show c'; they could even be -mouse-clicks or menu items--whatever suits your program. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the program, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the program - `Gnomovision' (which makes passes at compilers) written by James Hacker. - - , 1 April 1989 - Ty Coon, President of Vice - -This General Public License does not permit incorporating your program into -proprietary programs. If your program is a subroutine library, you may -consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Library General -Public License instead of this License. diff --git a/rce_hp_buffers/driver/Makefile b/rce_hp_buffers/driver/Makefile index d0e2225..5e31a8c 100644 --- a/rce_hp_buffers/driver/Makefile +++ b/rce_hp_buffers/driver/Makefile @@ -1,9 +1,5 @@ # ---------------------------------------------------------------------------- -# Title : RCE HP buffer driver makefile -# ---------------------------------------------------------------------------- -# File : Makefile -# Author : Ryan Herbst, rherbst@slac.stanford.edu -# Created : 2017-08-11 +# Company : SLAC National Accelerator Laboratory # ---------------------------------------------------------------------------- # This file is part of the aes_stream_drivers package. It is subject to # the license terms in the LICENSE.txt file found in the top-level directory @@ -13,7 +9,6 @@ # copied, modified, propagated, or distributed except according to the terms # contained in the LICENSE.txt file. # ---------------------------------------------------------------------------- -# NAME := rce_hp HOME := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST)))) diff --git a/rce_hp_buffers/driver/src/rce_hp.c b/rce_hp_buffers/driver/src/rce_hp.c index 2b8f918..9de30fe 100755 --- a/rce_hp_buffers/driver/src/rce_hp.c +++ b/rce_hp_buffers/driver/src/rce_hp.c @@ -1,11 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : RCE HP Driver - * ---------------------------------------------------------------------------- - * File : rce_hp.h - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2017-08-11 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * This file is part of the aes_stream_drivers package. It is subject to * the license terms in the LICENSE.txt file found in the top-level directory * of this distribution and at: diff --git a/rce_hp_buffers/driver/src/rce_hp.h b/rce_hp_buffers/driver/src/rce_hp.h index 758bed9..34b0bf4 100755 --- a/rce_hp_buffers/driver/src/rce_hp.h +++ b/rce_hp_buffers/driver/src/rce_hp.h @@ -1,12 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : RCE HP Driver - * ---------------------------------------------------------------------------- - * File : rce_hp.h - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2016-08-08 - * Last update: 2016-08-08 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * This file is part of the aes_stream_drivers package. It is subject to * the license terms in the LICENSE.txt file found in the top-level directory * of this distribution and at: diff --git a/rce_hp_buffers/driver/src/rce_top.c b/rce_hp_buffers/driver/src/rce_top.c index 290e38e..48c5a96 100755 --- a/rce_hp_buffers/driver/src/rce_top.c +++ b/rce_hp_buffers/driver/src/rce_top.c @@ -1,11 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : Top level module - * ---------------------------------------------------------------------------- - * File : rce_top.c - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2017-08-11 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * Top level module types and functions. * ---------------------------------------------------------------------------- diff --git a/rce_hp_buffers/driver/src/rce_top.h b/rce_hp_buffers/driver/src/rce_top.h index cd8971c..c0faa1e 100755 --- a/rce_hp_buffers/driver/src/rce_top.h +++ b/rce_hp_buffers/driver/src/rce_top.h @@ -1,11 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : Top level module - * ---------------------------------------------------------------------------- - * File : rce_top.h - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2017-08-11 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * Top level module types and functions. * ---------------------------------------------------------------------------- diff --git a/rce_memmap/driver/Makefile b/rce_memmap/driver/Makefile index d802387..f0120f5 100644 --- a/rce_memmap/driver/Makefile +++ b/rce_memmap/driver/Makefile @@ -1,10 +1,5 @@ # ---------------------------------------------------------------------------- -# Title : RCE stream driver makefile -# ---------------------------------------------------------------------------- -# File : Makefile -# Author : Ryan Herbst, rherbst@slac.stanford.edu -# Created : 2016-08-08 -# Last update: 2016-08-08 +# Company : SLAC National Accelerator Laboratory # ---------------------------------------------------------------------------- # Description: # RCE stream driver makefile @@ -17,7 +12,6 @@ # copied, modified, propagated, or distributed except according to the terms # contained in the LICENSE.txt file. # ---------------------------------------------------------------------------- -# NAME := rce_memmap HOME := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST)))) diff --git a/rce_memmap/driver/src/rce_map.c b/rce_memmap/driver/src/rce_map.c index 2007344..bc71db9 100755 --- a/rce_memmap/driver/src/rce_map.c +++ b/rce_memmap/driver/src/rce_map.c @@ -1,11 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : Top level module - * ---------------------------------------------------------------------------- - * File : rce_map.c - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2018-06-07 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * Top level module types and functions. * ---------------------------------------------------------------------------- diff --git a/rce_memmap/driver/src/rce_map.h b/rce_memmap/driver/src/rce_map.h index 7d04be7..4a6084a 100755 --- a/rce_memmap/driver/src/rce_map.h +++ b/rce_memmap/driver/src/rce_map.h @@ -1,11 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : Top level module - * ---------------------------------------------------------------------------- - * File : rce_map.h - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2018-06-07 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * Top level module types and functions. * ---------------------------------------------------------------------------- diff --git a/rce_stream/app/Makefile b/rce_stream/app/Makefile index 1d43f42..4e89eaa 100644 --- a/rce_stream/app/Makefile +++ b/rce_stream/app/Makefile @@ -1,11 +1,5 @@ -# # ---------------------------------------------------------------------------- -# Title : PGP applications makefile -# ---------------------------------------------------------------------------- -# File : Makefile -# Author : Ryan Herbst, rherbst@slac.stanford.edu -# Created : 2016-08-08 -# Last update: 2016-08-08 +# Company : SLAC National Accelerator Laboratory # ---------------------------------------------------------------------------- # Description: # PGP applications makefile @@ -18,7 +12,6 @@ # copied, modified, propagated, or distributed except according to the terms # contained in the LICENSE.txt file. # ---------------------------------------------------------------------------- -# # Variables HOME := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST)))) diff --git a/rce_stream/app/src/dmaLoopTest.cpp b/rce_stream/app/src/dmaLoopTest.cpp index d9fbd07..31d7045 100644 --- a/rce_stream/app/src/dmaLoopTest.cpp +++ b/rce_stream/app/src/dmaLoopTest.cpp @@ -1,12 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : DMA rate test utility - * ---------------------------------------------------------------------------- - * File : dmaLoopTest.cpp - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2016-08-08 - * Last update: 2016-08-08 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * Utility to rate test the DMA engine. This utility will create a set number of * write and read threads to emulate a number of read and write applications. diff --git a/rce_stream/app/src/dmaRead.cpp b/rce_stream/app/src/dmaRead.cpp index 1cbf3cc..f26c6d6 100644 --- a/rce_stream/app/src/dmaRead.cpp +++ b/rce_stream/app/src/dmaRead.cpp @@ -1,12 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : DMA read utility - * ---------------------------------------------------------------------------- - * File : dmaRead.cpp - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2016-08-08 - * Last update: 2016-08-08 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * This program will open up a AXIS DMA port and attempt to read data. * ---------------------------------------------------------------------------- diff --git a/rce_stream/app/src/dmaSetDebug.cpp b/rce_stream/app/src/dmaSetDebug.cpp index 92fc2a8..98c7962 100755 --- a/rce_stream/app/src/dmaSetDebug.cpp +++ b/rce_stream/app/src/dmaSetDebug.cpp @@ -1,12 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : DMA debug utility - * ---------------------------------------------------------------------------- - * File : dmaSetDebug.cpp - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2016-08-08 - * Last update: 2016-08-08 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * This program set the AXI Stream DMA driver debug level. * ---------------------------------------------------------------------------- diff --git a/rce_stream/app/src/dmaWrite.cpp b/rce_stream/app/src/dmaWrite.cpp index 228685d..976f53a 100644 --- a/rce_stream/app/src/dmaWrite.cpp +++ b/rce_stream/app/src/dmaWrite.cpp @@ -1,12 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : DMA write utility - * ---------------------------------------------------------------------------- - * File : dmaWrite.cpp - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2016-08-08 - * Last update: 2016-08-08 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * Program to send data on a destination. Data is prbs * ---------------------------------------------------------------------------- diff --git a/rce_stream/driver/Makefile b/rce_stream/driver/Makefile index b89cc02..f5ee4e3 100644 --- a/rce_stream/driver/Makefile +++ b/rce_stream/driver/Makefile @@ -1,10 +1,5 @@ # ---------------------------------------------------------------------------- -# Title : RCE stream driver makefile -# ---------------------------------------------------------------------------- -# File : Makefile -# Author : Ryan Herbst, rherbst@slac.stanford.edu -# Created : 2016-08-08 -# Last update: 2016-08-08 +# Company : SLAC National Accelerator Laboratory # ---------------------------------------------------------------------------- # Description: # RCE stream driver makefile @@ -17,7 +12,6 @@ # copied, modified, propagated, or distributed except according to the terms # contained in the LICENSE.txt file. # ---------------------------------------------------------------------------- -# NAME := rcestream HOME := $(shell dirname $(realpath $(lastword $(MAKEFILE_LIST)))) diff --git a/rce_stream/driver/src/axis_gen1.c b/rce_stream/driver/src/axis_gen1.c index 7479bde..f815da2 100755 --- a/rce_stream/driver/src/axis_gen1.c +++ b/rce_stream/driver/src/axis_gen1.c @@ -1,12 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : AXIS Gen1 Functions - * ---------------------------------------------------------------------------- - * File : axis_gen1.h - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2016-08-08 - * Last update: 2016-08-08 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * Access functions for Gen1 AXIS DMA * ---------------------------------------------------------------------------- diff --git a/rce_stream/driver/src/axis_gen1.h b/rce_stream/driver/src/axis_gen1.h index 02a2124..d88f044 100755 --- a/rce_stream/driver/src/axis_gen1.h +++ b/rce_stream/driver/src/axis_gen1.h @@ -1,12 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : AXIS Gen1 Functions - * ---------------------------------------------------------------------------- - * File : axis_gen1.h - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2016-08-08 - * Last update: 2016-08-08 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * Access functions for Gen1 AXIS DMA * ---------------------------------------------------------------------------- diff --git a/rce_stream/driver/src/rce_top.c b/rce_stream/driver/src/rce_top.c index c1ed79c..966d41f 100755 --- a/rce_stream/driver/src/rce_top.c +++ b/rce_stream/driver/src/rce_top.c @@ -1,12 +1,7 @@ /** *----------------------------------------------------------------------------- - * Title : Top level module - * ---------------------------------------------------------------------------- - * File : rce_top.c - * Author : Ryan Herbst, rherbst@slac.stanford.edu - * Created : 2016-08-08 - * Last update: 2016-08-08 - * ---------------------------------------------------------------------------- + * Company : SLAC National Accelerator Laboratory + *----------------------------------------------------------------------------- * Description: * Top level module types and functions. * ---------------------------------------------------------------------------- From 4e1533d167e3c893e5cc7d45c1e3d76cd8bb619f Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 11:42:11 -0700 Subject: [PATCH 21/23] updating pip_requirements.txt --- .github/workflows/aes_ci.yml | 2 +- pip_requirements.txt | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.github/workflows/aes_ci.yml b/.github/workflows/aes_ci.yml index 8b03e1d..e799bed 100644 --- a/.github/workflows/aes_ci.yml +++ b/.github/workflows/aes_ci.yml @@ -36,7 +36,7 @@ jobs: sudo apt-get update sudo apt-get install python3 python3-pip python -m pip install --upgrade pip - pip install cpplint + pip install -r pip_requirements.txt # C/C++ Linter - name: C/C++ Linter diff --git a/pip_requirements.txt b/pip_requirements.txt index b81016f..0852910 100644 --- a/pip_requirements.txt +++ b/pip_requirements.txt @@ -1 +1,2 @@ pygithub +cpplint From d4ddd204d26e8163c29041b056fad70a40ea8967 Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 14:55:10 -0700 Subject: [PATCH 22/23] updating bitbake files for removing COPYING file --- petalinux/axistreamdma/axistreamdma.bb | 1 - 1 file changed, 1 deletion(-) diff --git a/petalinux/axistreamdma/axistreamdma.bb b/petalinux/axistreamdma/axistreamdma.bb index 542c9c6..998de04 100644 --- a/petalinux/axistreamdma/axistreamdma.bb +++ b/petalinux/axistreamdma/axistreamdma.bb @@ -20,7 +20,6 @@ SRC_URI = "file://Makefile \ file://axis_gen1.c \ file://AxisDriver.h \ file://DmaDriver.h \ - file://COPYING \ " S = "${WORKDIR}" From 90dc5a5f985d91fed0498326aa78c362a00470fa Mon Sep 17 00:00:00 2001 From: Larry Ruckman Date: Sat, 6 Jul 2024 14:55:17 -0700 Subject: [PATCH 23/23] updating bitbake files for removing COPYING file --- petalinux/aximemorymap/aximemorymap.bb | 1 - 1 file changed, 1 deletion(-) diff --git a/petalinux/aximemorymap/aximemorymap.bb b/petalinux/aximemorymap/aximemorymap.bb index 4702f83..1c2da76 100644 --- a/petalinux/aximemorymap/aximemorymap.bb +++ b/petalinux/aximemorymap/aximemorymap.bb @@ -11,7 +11,6 @@ SRC_URI = "file://Makefile \ file://aximemorymap.c \ file://aximemorymap.h \ file://DmaDriver.h \ - file://COPYING \ " S = "${WORKDIR}"