From f0d67c613e1a859fdc41238ed5848545e8e0e102 Mon Sep 17 00:00:00 2001 From: maajidkhann Date: Fri, 6 Sep 2024 17:11:53 +0530 Subject: [PATCH] Fixes the bug when integrating API on NON-SVE HW. *The current API - cpuinfo_get_max_arm_sve_length() when integarted into PyTorch and tested on Graviton2 (NON SVE hardware), it fails with an error. Signed-off-by: maajidkhann --- src/arm/linux/aarch64-isa.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arm/linux/aarch64-isa.c b/src/arm/linux/aarch64-isa.c index 2a88fe29..3352db29 100644 --- a/src/arm/linux/aarch64-isa.c +++ b/src/arm/linux/aarch64-isa.c @@ -167,7 +167,7 @@ void cpuinfo_arm64_linux_decode_isa_from_proc_cpuinfo( int ret = prctl(PR_SVE_GET_VL); if (ret < 0) { - cpuinfo_log_error("prctl(PR_SVE_GET_VL) failed"); + cpuinfo_log_warning("No SVE support on this machine"); isa->svelen = 0; // Assume no SVE support if the call fails } else { // Mask out the SVE vector length bits