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The current Memory Island is designed as a L2 scratchpad memory. A significant enhancement would be to introduce cache hardware (e.g., like AXI LLC) in a dedicated wrapper to allow a runtime-configurable section in the memory island to be used as a hardware-managed cache rather than a scratchpad memory. While the highest performance is more easily achievable with manual memory management, the simplicity of using a cache can be beneficial for a user in a multi-accelerator system.
The text was updated successfully, but these errors were encountered:
The current Memory Island is designed as a L2 scratchpad memory. A significant enhancement would be to introduce cache hardware (e.g., like AXI LLC) in a dedicated wrapper to allow a runtime-configurable section in the memory island to be used as a hardware-managed cache rather than a scratchpad memory. While the highest performance is more easily achievable with manual memory management, the simplicity of using a cache can be beneficial for a user in a multi-accelerator system.
The text was updated successfully, but these errors were encountered: