diff --git a/_i2_s_config_e_s_p32_v1_8h_source.html b/_i2_s_config_e_s_p32_v1_8h_source.html
index bfe15aa57..4970c4745 100644
--- a/_i2_s_config_e_s_p32_v1_8h_source.html
+++ b/_i2_s_config_e_s_p32_v1_8h_source.html
@@ -136,34 +136,36 @@
80 LOGI(
"number of channels: %d",
channels);
81 LOGI(
"signal_type: %s", i2s_signal_types[signal_type]);
- 82 if (signal_type==Digital){
- 83 LOGI(
"i2s_format: %s", i2s_formats[i2s_format]);
-
-
- 86 LOGI(
"use_apll: %s", use_apll ?
"true" :
"false");
-
-
-
-
-
- 92 LOGI(
"pin_mck: %d", pin_mck);
-
- 94 LOGI(
"pin_bck: %d", pin_bck);
-
- 96 LOGI(
"pin_ws: %d", pin_ws);
-
- 98 LOGI(
"pin_data: %d", pin_data);
-
- 100 LOGI(
"pin_data_rx: %d", pin_data_rx);
-
-
-
-
+
+
+ 84 if (signal_type==Digital){
+ 85 LOGI(
"i2s_format: %s", i2s_formats[i2s_format]);
+
+
+ 88 LOGI(
"use_apll: %s", use_apll ?
"true" :
"false");
+
+
+
+
+
+ 94 LOGI(
"pin_mck: %d", pin_mck);
+
+ 96 LOGI(
"pin_bck: %d", pin_bck);
+
+ 98 LOGI(
"pin_ws: %d", pin_ws);
+
+ 100 LOGI(
"pin_data: %d", pin_data);
+ 101 if (pin_data_rx!=-1){
+ 102 LOGI(
"pin_data_rx: %d", pin_data_rx);
+
+
- 106 using I2SConfig = I2SConfigESP32V1;
+
-
+ 108 using I2SConfig = I2SConfigESP32V1;
+
+
diff --git a/_i2_s_e_s_p32_v1_8h_source.html b/_i2_s_e_s_p32_v1_8h_source.html
index 71dc944fa..df2267988 100644
--- a/_i2_s_e_s_p32_v1_8h_source.html
+++ b/_i2_s_e_s_p32_v1_8h_source.html
@@ -248,291 +248,298 @@
- 198 return I2S_CHANNEL_DEFAULT_CONFIG(
+ 198 i2s_chan_config_t result = I2S_CHANNEL_DEFAULT_CONFIG(
199 (i2s_port_t)cfg.port_no,
200 cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
-
-
-
-
- 205 i2s_std_clk_config_t clk_cfg =
- 206 I2S_STD_CLK_DEFAULT_CONFIG((uint32_t)cfg.
sample_rate);
-
- 208 clk_cfg.mclk_multiple = (i2s_mclk_multiple_t) cfg.
mclk_multiple;
-
-
-
- 212 clk_cfg.mclk_multiple = I2S_MCLK_MULTIPLE_384;
- 213 LOGI(
"mclk_multiple=384");
-
-
-
-
-
-
- 220 i2s_chan_handle_t &rx_chan,
int txPin,
int rxPin) {
-
- 222 LOGI(
"tx: %d, rx: %d", txPin, rxPin);
- 223 i2s_std_config_t std_cfg = {
- 224 .clk_cfg = getClockConfig(cfg),
- 225 .slot_cfg = getSlotConfig(cfg),
-
-
- 228 .mclk = (gpio_num_t)cfg.pin_mck,
- 229 .bclk = (gpio_num_t)cfg.pin_bck,
- 230 .ws = (gpio_num_t)cfg.pin_ws,
- 231 .dout = (gpio_num_t)txPin,
- 232 .din = (gpio_num_t)rxPin,
-
-
-
-
-
-
-
-
-
-
- 243 if (i2s_channel_init_std_mode(tx_chan, &std_cfg) != ESP_OK) {
- 244 LOGE(
"i2s_channel_init_std_mode %s",
"tx");
-
-
- 247 if (i2s_channel_enable(tx_chan) != ESP_OK) {
- 248 LOGE(
"i2s_channel_enable %s",
"tx");
-
-
-
-
-
- 254 if (i2s_channel_init_std_mode(rx_chan, &std_cfg) != ESP_OK) {
- 255 LOGE(
"i2s_channel_init_std_mode %s",
"rx");
-
-
- 258 if (i2s_channel_enable(rx_chan) != ESP_OK) {
- 259 LOGE(
"i2s_channel_enable %s",
"rx");
-
-
-
-
- 264 LOGD(
"%s - %s", __func__,
"started");
-
-
-
-
- 269 i2s_chan_handle_t &rx_chan)
override {
-
- 271 auto clock_cfg = getClockConfig(cfg);
- 272 if (tx_chan !=
nullptr) {
- 273 i2s_channel_disable(tx_chan);
- 274 rc = i2s_channel_reconfig_std_clock(tx_chan, &clock_cfg) == ESP_OK;
- 275 i2s_channel_enable(tx_chan);
-
- 277 if (rx_chan !=
nullptr) {
- 278 i2s_channel_disable(rx_chan);
- 279 rc = i2s_channel_reconfig_std_clock(rx_chan, &clock_cfg) == ESP_OK;
- 280 i2s_channel_enable(rx_chan);
+
+
+
+ 204 if (size > 0) result.dma_frame_num = size / frame_size;
+
+
+
+
+
+ 210 i2s_std_clk_config_t clk_cfg =
+ 211 I2S_STD_CLK_DEFAULT_CONFIG((uint32_t)cfg.
sample_rate);
+
+ 213 clk_cfg.mclk_multiple = (i2s_mclk_multiple_t) cfg.
mclk_multiple;
+
+
+
+ 217 clk_cfg.mclk_multiple = I2S_MCLK_MULTIPLE_384;
+ 218 LOGI(
"mclk_multiple=384");
+
+
+
+
+
+
+ 225 i2s_chan_handle_t &rx_chan,
int txPin,
int rxPin) {
+
+ 227 LOGI(
"tx: %d, rx: %d", txPin, rxPin);
+ 228 i2s_std_config_t std_cfg = {
+ 229 .clk_cfg = getClockConfig(cfg),
+ 230 .slot_cfg = getSlotConfig(cfg),
+
+
+ 233 .mclk = (gpio_num_t)cfg.pin_mck,
+ 234 .bclk = (gpio_num_t)cfg.pin_bck,
+ 235 .ws = (gpio_num_t)cfg.pin_ws,
+ 236 .dout = (gpio_num_t)txPin,
+ 237 .din = (gpio_num_t)rxPin,
+
+
+
+
+
+
+
+
+
+
+ 248 if (i2s_channel_init_std_mode(tx_chan, &std_cfg) != ESP_OK) {
+ 249 LOGE(
"i2s_channel_init_std_mode %s",
"tx");
+
+
+ 252 if (i2s_channel_enable(tx_chan) != ESP_OK) {
+ 253 LOGE(
"i2s_channel_enable %s",
"tx");
+
+
+
+
+
+ 259 if (i2s_channel_init_std_mode(rx_chan, &std_cfg) != ESP_OK) {
+ 260 LOGE(
"i2s_channel_init_std_mode %s",
"rx");
+
+
+ 263 if (i2s_channel_enable(rx_chan) != ESP_OK) {
+ 264 LOGE(
"i2s_channel_enable %s",
"rx");
+
+
+
+
+ 269 LOGD(
"%s - %s", __func__,
"started");
+
+
+
+
+ 274 i2s_chan_handle_t &rx_chan)
override {
+
+ 276 auto clock_cfg = getClockConfig(cfg);
+ 277 if (tx_chan !=
nullptr) {
+ 278 i2s_channel_disable(tx_chan);
+ 279 rc = i2s_channel_reconfig_std_clock(tx_chan, &clock_cfg) == ESP_OK;
+ 280 i2s_channel_enable(tx_chan);
-
-
-
-
-
-
-
-
-
- 291 return I2S_PDM_TX_SLOT_DEFAULT_CONFIG(
-
-
-
-
-
- 297 return I2S_CHANNEL_DEFAULT_CONFIG(
- 298 (i2s_port_t)cfg.port_no,
- 299 cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
-
-
- 302 i2s_pdm_tx_clk_config_t getTxClockConfig(I2SConfigESP32V1 &cfg) {
- 303 return I2S_PDM_TX_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
-
-
- 306 bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
- 307 i2s_chan_handle_t &rx_chan,
int txPin,
int rxPin) {
- 308 if (cfg.rx_tx_mode == TX_MODE) {
- 309 i2s_pdm_tx_config_t pdm_tx_cfg = {
- 310 .clk_cfg = getTxClockConfig(cfg),
- 311 .slot_cfg = getTxSlotConfig(cfg),
-
-
- 314 .clk = (gpio_num_t)cfg.pin_bck,
- 315 .dout = (gpio_num_t)txPin,
-
-
-
-
-
-
-
- 323 if (i2s_channel_init_pdm_tx_mode(tx_chan, &pdm_tx_cfg) != ESP_OK) {
- 324 LOGE(
"i2s_channel_init_pdm_tx_mode %s",
"tx");
-
-
- 327 if (i2s_channel_enable(tx_chan) != ESP_OK) {
- 328 LOGE(
"i2s_channel_enable %s",
"tx");
-
-
-
- 332 LOGE(
"Only TX supported for PDM");
-
-
-
-
-
-
-
-
-
-
-
- 344 struct DriverTDM :
public DriverCommon {
- 345 i2s_tdm_slot_config_t getSlotConfig(I2SConfigESP32V1 &cfg) {
-
- 347 for (
int j = 0; j < cfg.channels; j++) {
-
-
- 350 return I2S_TDM_MSB_SLOT_DEFAULT_CONFIG(
- 351 (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
- 352 (i2s_tdm_slot_mask_t)slots);
-
-
- 355 i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) {
- 356 return I2S_CHANNEL_DEFAULT_CONFIG(
- 357 (i2s_port_t)cfg.port_no,
- 358 cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
-
-
- 361 i2s_tdm_clk_config_t getClockConfig(I2SConfigESP32V1 &cfg) {
- 362 return I2S_TDM_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
-
-
- 365 bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
- 366 i2s_chan_handle_t &rx_chan,
int txPin,
int rxPin) {
- 367 i2s_tdm_config_t tdm_cfg = {
- 368 .clk_cfg = getClockConfig(cfg),
- 369 .slot_cfg = getSlotConfig(cfg),
-
-
- 372 .mclk = (gpio_num_t)cfg.pin_mck,
- 373 .bclk = (gpio_num_t)cfg.pin_bck,
- 374 .ws = (gpio_num_t)cfg.pin_ws,
- 375 .dout = (gpio_num_t)txPin,
- 376 .din = (gpio_num_t)rxPin,
-
-
-
-
-
-
-
-
-
- 386 if (cfg.rx_tx_mode == TX_MODE) {
- 387 if (i2s_channel_init_tdm_mode(tx_chan, &tdm_cfg) != ESP_OK) {
- 388 LOGE(
"i2s_channel_init_tdm_tx_mode %s",
"tx");
-
-
-
- 392 if (cfg.rx_tx_mode == RX_MODE) {
- 393 if (i2s_channel_init_tdm_mode(rx_chan, &tdm_cfg) != ESP_OK) {
- 394 LOGE(
"i2s_channel_init_tdm_tx_mode %s",
"rx");
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- 413 LOGE(
"invalid channels: %d", cfg.
channels);
-
-
-
-
- 418 if (!newChannels(cfg, driver)) {
-
-
-
-
- 423 is_started = driver.startChannels(cfg, tx_chan, rx_chan, txPin, rxPin);
-
-
- 426 LOGE(
"Channels not started");
-
-
-
-
-
- 432 i2s_chan_config_t chan_cfg = driver.getChannelConfig(cfg);
-
-
- 435 if (i2s_new_channel(&chan_cfg, NULL, &rx_chan) != ESP_OK) {
-
-
-
-
-
- 441 if (i2s_new_channel(&chan_cfg, &tx_chan, NULL) != ESP_OK) {
-
-
-
-
-
- 447 if (i2s_new_channel(&chan_cfg, &tx_chan, &rx_chan) != ESP_OK) {
-
-
-
-
-
-
-
- 455 DriverCommon &getDriver(I2SConfigESP32V1 &cfg) {
- 456 switch (cfg.signal_type) {
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- 471 LOGE(
"Unsupported singal_type");
-
-
-
-
- 476 using I2SDriver = I2SDriverESP32V1;
-
-
-
-
+ 282 if (rx_chan !=
nullptr) {
+ 283 i2s_channel_disable(rx_chan);
+ 284 rc = i2s_channel_reconfig_std_clock(rx_chan, &clock_cfg) == ESP_OK;
+ 285 i2s_channel_enable(rx_chan);
+
+
+
+
+
+
+
+
+
+
+ 296 return I2S_PDM_TX_SLOT_DEFAULT_CONFIG(
+
+
+
+
+
+ 302 return I2S_CHANNEL_DEFAULT_CONFIG(
+ 303 (i2s_port_t)cfg.port_no,
+ 304 cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
+
+
+ 307 i2s_pdm_tx_clk_config_t getTxClockConfig(I2SConfigESP32V1 &cfg) {
+ 308 return I2S_PDM_TX_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
+
+
+ 311 bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
+ 312 i2s_chan_handle_t &rx_chan,
int txPin,
int rxPin) {
+ 313 if (cfg.rx_tx_mode == TX_MODE) {
+ 314 i2s_pdm_tx_config_t pdm_tx_cfg = {
+ 315 .clk_cfg = getTxClockConfig(cfg),
+ 316 .slot_cfg = getTxSlotConfig(cfg),
+
+
+ 319 .clk = (gpio_num_t)cfg.pin_bck,
+ 320 .dout = (gpio_num_t)txPin,
+
+
+
+
+
+
+
+ 328 if (i2s_channel_init_pdm_tx_mode(tx_chan, &pdm_tx_cfg) != ESP_OK) {
+ 329 LOGE(
"i2s_channel_init_pdm_tx_mode %s",
"tx");
+
+
+ 332 if (i2s_channel_enable(tx_chan) != ESP_OK) {
+ 333 LOGE(
"i2s_channel_enable %s",
"tx");
+
+
+
+ 337 LOGE(
"Only TX supported for PDM");
+
+
+
+
+
+
+
+
+
+
+
+ 349 struct DriverTDM :
public DriverCommon {
+ 350 i2s_tdm_slot_config_t getSlotConfig(I2SConfigESP32V1 &cfg) {
+
+ 352 for (
int j = 0; j < cfg.channels; j++) {
+
+
+ 355 return I2S_TDM_MSB_SLOT_DEFAULT_CONFIG(
+ 356 (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
+ 357 (i2s_tdm_slot_mask_t)slots);
+
+
+ 360 i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) {
+ 361 return I2S_CHANNEL_DEFAULT_CONFIG(
+ 362 (i2s_port_t)cfg.port_no,
+ 363 cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
+
+
+ 366 i2s_tdm_clk_config_t getClockConfig(I2SConfigESP32V1 &cfg) {
+ 367 return I2S_TDM_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
+
+
+ 370 bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
+ 371 i2s_chan_handle_t &rx_chan,
int txPin,
int rxPin) {
+ 372 i2s_tdm_config_t tdm_cfg = {
+ 373 .clk_cfg = getClockConfig(cfg),
+ 374 .slot_cfg = getSlotConfig(cfg),
+
+
+ 377 .mclk = (gpio_num_t)cfg.pin_mck,
+ 378 .bclk = (gpio_num_t)cfg.pin_bck,
+ 379 .ws = (gpio_num_t)cfg.pin_ws,
+ 380 .dout = (gpio_num_t)txPin,
+ 381 .din = (gpio_num_t)rxPin,
+
+
+
+
+
+
+
+
+
+ 391 if (cfg.rx_tx_mode == TX_MODE) {
+ 392 if (i2s_channel_init_tdm_mode(tx_chan, &tdm_cfg) != ESP_OK) {
+ 393 LOGE(
"i2s_channel_init_tdm_tx_mode %s",
"tx");
+
+
+
+ 397 if (cfg.rx_tx_mode == RX_MODE) {
+ 398 if (i2s_channel_init_tdm_mode(rx_chan, &tdm_cfg) != ESP_OK) {
+ 399 LOGE(
"i2s_channel_init_tdm_tx_mode %s",
"rx");
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ 418 LOGE(
"invalid channels: %d", cfg.
channels);
+
+
+
+
+ 423 if (!newChannels(cfg, driver)) {
+
+
+
+
+ 428 is_started = driver.startChannels(cfg, tx_chan, rx_chan, txPin, rxPin);
+
+
+ 431 LOGE(
"Channels not started");
+
+
+
+
+
+ 437 i2s_chan_config_t chan_cfg = driver.getChannelConfig(cfg);
+
+
+ 440 if (i2s_new_channel(&chan_cfg, NULL, &rx_chan) != ESP_OK) {
+
+
+
+
+
+ 446 if (i2s_new_channel(&chan_cfg, &tx_chan, NULL) != ESP_OK) {
+
+
+
+
+
+ 452 if (i2s_new_channel(&chan_cfg, &tx_chan, &rx_chan) != ESP_OK) {
+
+
+
+
+
+
+
+ 460 DriverCommon &getDriver(I2SConfigESP32V1 &cfg) {
+ 461 switch (cfg.signal_type) {
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ 476 LOGE(
"Unsupported singal_type");
+
+
+
+
+ 481 using I2SDriver = I2SDriverESP32V1;
+
+
+
+
+
+
@@ -543,7 +550,7 @@
-
+
RxTxMode
The Microcontroller is the Audio Source (TX_MODE) or Audio Sink (RX_MODE). RXTX_MODE is Source and Si...
Definition: AudioTypes.h:26