NOTES

AND, DEC, DEX, DEY, EOR, INC, INX, INY, LDA, LDX, LDY,
ORA, PLA, TAX, TAY, TSX, TXA, TYA
    Z if 0
    N bit 7

ASL, LSR, ROL, ROR
    C if shift out
    Z if 0
    N bit 7

CMP, CPX, CPY
    C if not borrow
    Z if 0
    N bit 7

BIT
    Z if 0
    V bit 6 (of operand)
    N bit 7 (of operand)

ADC, SBC
    C if carry / not borrow
    Z if 0
    V if overflow
    N bit 7



BRK
    B 1

CLC, CLD, CLI, CLV, PLP, RTI, SEC, SED, SEI
    as indicated



AllSuiteA test:
    rom=40,roms/AllSuiteA.bin ram=00,64 reset trace

Enhanced BASIC:
    rom=c0,roms/ehbasic.bin ram=00,128 reset io

10 FOR I = 1 TO 10
20 FOR J = 1 TO I
30 PRINT J;
40 NEXT J
50 PRINT
60 NEXT I
RUN




Bugs while debugging
1. hadn't implemented cmp
2. missed the two LDX instruction exceptions
    (need to use Y addressing in a column that uses X)
3. order of operations in addrRel
    (must add rel offset to the PC after having fetch the rel)
4. confused IndIdx and IdxInd in creation of col4 opcodes
5. was setting addrRead in fetchPC, but we should use that only for data reads
6. confusion of using get/put idiom around something that modified state
    in push implementation
7. hadn't implemented adc & sbc
8. mishandling B and unknown bits in BRK and PHP




Here's ehBASIC's input spin loop:

c24f: JSR $e0ea     A:00 X:17 Y:0e  ----Z-  SP:fb/51 c2 4a          W:01fc
e0ea: JMP ($0205)   A:00 X:17 Y:0e  ----Z-  SP:fb/51 c2 4a
ffb3: LDA $f004     A:00 X:17 Y:0e  ----Z-  SP:fb/51 c2 4a  R:f004
ffb6: BEQ $02       A:00 X:17 Y:0e  ----Z-  SP:fb/51 c2 4a
ffba: CLC           A:00 X:17 Y:0e  ----Z-  SP:fb/51 c2 4a
ffbb: RTS           A:00 X:17 Y:0e  ----Z-  SP:fd/4a c0 00  R:01fd
c252: BCC $fb       A:00 X:17 Y:0e  ----Z-  SP:fd/4a c0 00