How can I freeze the signals that are highlighed while running the simulation?

[SudeepJoshi22]

Hello,
I am new to the filed of RISC-V and I am using this tool to understand in depth about RISC-V pipelines. But when I run the simulation the signals which are getting changed gets highlighted in yellow, but quickly fades away. Is there any way to make it highlighted, so that I can understand what is happening in depth??

[mortbopet]

Not currently, but it would be a cool feature to add! You'd probably want to take a look at VSRTL since that is the simulation/graphic "backend" of Ripes. This is probably where you'd want to look - currently, anything that isn't a non-boolean signal will trigger that animation. Currently, this all gets triggered whenever the value of a port changes so there'd have to be some arbitration of what signals gets to keep highlighting on different cycles, etc. - fun little project!

[SudeepJoshi22]

Thank you for your response. I am interested in exploring VSRTL as part of my undergraduate project in computer architecture, but as an electronics/VLSI person, I am not very familiar with the back-ends. I would like you to consider adding this as a new feature to the platform in the next release to make it more accessible for newcomers like myself.
Thank you again for your assistance.

[mortbopet]

Will do! As an alternative (although obviously not equivalent), I've often just stepped back-and-forward around an area of interest to "manually" get a sense of difference in the circuit between two points in time.