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noname.kicad_pcb_first_fr.kicad_pcb
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(kicad_pcb (version 4) (host pcbnew 4.0.2-stable)
(general
(links 100)
(no_connects 9)
(area 9.944125 8.326144 128.736701 109.686701)
(thickness 1.6)
(drawings 12)
(tracks 376)
(zones 0)
(modules 65)
(nets 50)
)
(page A4)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user)
(47 F.CrtYd user)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
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(zone_45_only no)
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(edge_width 0.15)
(via_size 0.6)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.2)
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
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(usegerberextensions false)
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(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(hpglpenoverlay 2)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 1)
(scaleselection 1)
(outputdirectory ""))
)
(net 0 "")
(net 1 /COL0)
(net 2 "Net-(D1-Pad2)")
(net 3 "Net-(D2-Pad2)")
(net 4 "Net-(D3-Pad2)")
(net 5 "Net-(D4-Pad2)")
(net 6 "Net-(D5-Pad2)")
(net 7 /COL1)
(net 8 "Net-(D6-Pad2)")
(net 9 "Net-(D7-Pad2)")
(net 10 "Net-(D8-Pad2)")
(net 11 "Net-(D9-Pad2)")
(net 12 "Net-(D10-Pad2)")
(net 13 /COL2)
(net 14 "Net-(D11-Pad2)")
(net 15 "Net-(D12-Pad2)")
(net 16 "Net-(D13-Pad2)")
(net 17 "Net-(D14-Pad2)")
(net 18 "Net-(D15-Pad2)")
(net 19 /COL3)
(net 20 "Net-(D16-Pad2)")
(net 21 "Net-(D17-Pad2)")
(net 22 "Net-(D18-Pad2)")
(net 23 "Net-(D19-Pad2)")
(net 24 "Net-(D20-Pad2)")
(net 25 /COL4)
(net 26 "Net-(D21-Pad2)")
(net 27 "Net-(D22-Pad2)")
(net 28 "Net-(D23-Pad2)")
(net 29 "Net-(D24-Pad2)")
(net 30 "Net-(D25-Pad2)")
(net 31 /COL5)
(net 32 "Net-(D26-Pad2)")
(net 33 "Net-(D27-Pad2)")
(net 34 "Net-(D28-Pad2)")
(net 35 "Net-(D29-Pad2)")
(net 36 "Net-(D30-Pad2)")
(net 37 /DATA)
(net 38 VCC)
(net 39 GND)
(net 40 /USB_VCC)
(net 41 "Net-(P1-Pad2)")
(net 42 "Net-(P1-Pad3)")
(net 43 /USB_GND)
(net 44 "Net-(P1-Pad5)")
(net 45 /ROW0)
(net 46 /ROW1)
(net 47 /ROW2)
(net 48 /ROW3)
(net 49 /ROW4)
(net_class Default "Dies ist die voreingestellte Netzklasse."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.6)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net /COL0)
(add_net /COL1)
(add_net /COL2)
(add_net /COL3)
(add_net /COL4)
(add_net /COL5)
(add_net /DATA)
(add_net /ROW0)
(add_net /ROW1)
(add_net /ROW2)
(add_net /ROW3)
(add_net /ROW4)
(add_net /USB_GND)
(add_net /USB_VCC)
(add_net GND)
(add_net "Net-(D1-Pad2)")
(add_net "Net-(D10-Pad2)")
(add_net "Net-(D11-Pad2)")
(add_net "Net-(D12-Pad2)")
(add_net "Net-(D13-Pad2)")
(add_net "Net-(D14-Pad2)")
(add_net "Net-(D15-Pad2)")
(add_net "Net-(D16-Pad2)")
(add_net "Net-(D17-Pad2)")
(add_net "Net-(D18-Pad2)")
(add_net "Net-(D19-Pad2)")
(add_net "Net-(D2-Pad2)")
(add_net "Net-(D20-Pad2)")
(add_net "Net-(D21-Pad2)")
(add_net "Net-(D22-Pad2)")
(add_net "Net-(D23-Pad2)")
(add_net "Net-(D24-Pad2)")
(add_net "Net-(D25-Pad2)")
(add_net "Net-(D26-Pad2)")
(add_net "Net-(D27-Pad2)")
(add_net "Net-(D28-Pad2)")
(add_net "Net-(D29-Pad2)")
(add_net "Net-(D3-Pad2)")
(add_net "Net-(D30-Pad2)")
(add_net "Net-(D4-Pad2)")
(add_net "Net-(D5-Pad2)")
(add_net "Net-(D6-Pad2)")
(add_net "Net-(D7-Pad2)")
(add_net "Net-(D8-Pad2)")
(add_net "Net-(D9-Pad2)")
(add_net "Net-(P1-Pad2)")
(add_net "Net-(P1-Pad3)")
(add_net "Net-(P1-Pad5)")
(add_net VCC)
)
(module footprint:4pin35mmAudio (layer B.Cu) (tedit 4FD999CA) (tstamp 577C3741)
(at 113.109375 22.621875 90)
(path /5778432C)
(fp_text reference K1 (at 1.27 0 360) (layer B.SilkS) hide
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)
(fp_text value XLR3 (at 5.715 0 360) (layer B.SilkS)
(effects (font (size 1.524 1.778) (thickness 0.3048)) (justify mirror))
)
(fp_text user 3.5mm (at 5.715 0 360) (layer F.SilkS)
(effects (font (size 1.524 1.778) (thickness 0.3048)))
)
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(fp_line (start 0 0) (end 0 0) (layer Dwgs.User) (width 0.0254))
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(fp_line (start 0 2.2479) (end 0 4.8006) (layer Cmts.User) (width 0.381))
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(net 37 /DATA))
(pad 2 thru_hole circle (at 7.8994 -3.6068 90) (size 1.7526 1.7526) (drill 1.0922) (layers *.Cu *.Mask B.SilkS)
(net 38 VCC))
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(net 39 GND))
(pad 4 thru_hole oval (at 2.8956 -4.6482 90) (size 1.7526 2.0574) (drill oval 1.0922 1.397) (layers *.Cu *.Mask B.SilkS))
(pad 5 thru_hole circle (at 10.9982 -1.6002 90) (size 1.7526 1.7526) (drill 1.0922) (layers *.Cu *.Mask B.SilkS))
(pad 6 thru_hole circle (at 7.8994 3.6068 90) (size 1.7526 1.7526) (drill 1.0922) (layers *.Cu *.Mask B.SilkS))
(pad HOLE np_thru_hole circle (at 2.8956 0 90) (size 0.9906 0.9906) (drill 0.9906) (layers *.Cu *.Mask B.SilkS))
(pad HOLE np_thru_hole circle (at 7.8994 0 90) (size 0.9906 0.9906) (drill 0.9906) (layers *.Cu *.Mask B.SilkS))
)
(module footprint:USBMINImod (layer B.Cu) (tedit 579C6709) (tstamp 577C3751)
(at 33.3375 10.715625 270)
(path /5778C3F0)
(fp_text reference P1 (at 0 0 540) (layer B.SilkS) hide
(effects (font (size 1.524 1.778) (thickness 0.3048)) (justify mirror))
)
(fp_text value USB_A (at 2.54 0 540) (layer B.SilkS)
(effects (font (size 1.778 1.778) (thickness 0.3048)) (justify mirror))
)
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(fp_line (start 0 0) (end 0 0) (layer Dwgs.User) (width 0.0254))
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