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consider exposing SB_LEDDA_IP to verilog and litex samples #524

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proppy opened this issue Aug 3, 2021 · 3 comments
Open

consider exposing SB_LEDDA_IP to verilog and litex samples #524

proppy opened this issue Aug 3, 2021 · 3 comments

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@proppy
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proppy commented Aug 3, 2021

It would be nice to expose SB_LEDDA_IP (as in https://github.com/im-tomu/foboot/blob/master/hw/rtl/sbled.py#L93) to the verilog and litex samples, so that developers going thru the workshop can do more advanced led PWM manipulation.

@umarcor
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umarcor commented Aug 3, 2021

While I think it would interesting to have examples about how to use SB_LEDDA_IP, I don't necessarily agree with that allowing "more advanced led PWM manipulation". My perception is that SB_LEDDA_IP is for less advanced manipulation, in the sense that it's an IP with some given functionality that the user can learn and use but not modify (it's a hard core). Conversely, driving the PWM signals directly allows any hardware/logic to be used.

@proppy
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proppy commented Aug 3, 2021

oh yes, you're right, maybe a better way to phrase it would have been to say that it would allow to introduce developers to register based manipulation (which, I guess, carry their own complexity when implemented in hardware/logic).

@umarcor
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umarcor commented Aug 3, 2021

Absolutely agree. Since this workshop has a top-bottom approach, the register based manipulation feels very natural for all the readers coming from the "CPU architecture" level, down to custom hardware peripherals.
I just wanted to stress that "complex" and "advanced" are very different depending on the point of view!

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