From 4f7e374358efaf87ae55a464438ee9cd6163ab79 Mon Sep 17 00:00:00 2001 From: Rodolfo Jordao Date: Tue, 21 May 2024 17:01:28 +0200 Subject: [PATCH] Potentially fixed crashing problem --- .vscode/extensions.json | 11 - .vscode/settings.json | 98 +- ...rtitionedTiledMulticore_Orchestratror.json | 1 - ...MemoryMappableMulticore_Orchestratror.json | 3967 ----------------- ...MemoryMappableMulticore_Orchestratror.json | 1 - ...rtitionedTiledMulticore_Orchestratror.json | 1 - ...MemoryMappableMulticore_Orchestratror.json | 3967 ----------------- ...MemoryMappableMulticore_Orchestratror.json | 1 - ...artitionedMemoryMappableMulticoreAndPL.mzn | 12 +- 9 files changed, 10 insertions(+), 8049 deletions(-) delete mode 100644 .vscode/extensions.json delete mode 100644 java-metaheuristics/bin/test/general/body_final_19_AperiodicAsynchronousDataflowToPartitionedTiledMulticore_Orchestratror.json delete mode 100644 java-metaheuristics/bin/test/general/body_final_20_AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore_Orchestratror.json delete mode 100644 java-metaheuristics/bin/test/general/body_final_9_AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore_Orchestratror.json delete mode 100644 java-metaheuristics/src/test/resources/general/body_final_19_AperiodicAsynchronousDataflowToPartitionedTiledMulticore_Orchestratror.json delete mode 100644 java-metaheuristics/src/test/resources/general/body_final_20_AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore_Orchestratror.json delete mode 100644 java-metaheuristics/src/test/resources/general/body_final_9_AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore_Orchestratror.json diff --git a/.vscode/extensions.json b/.vscode/extensions.json deleted file mode 100644 index 8cc323ba..00000000 --- a/.vscode/extensions.json +++ /dev/null @@ -1,11 +0,0 @@ -{ - "recommendations": [ - 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0, - "chJ0_4_0": 0, - "chRa0_4": 0, - "chRa0_6": 0, - "chRa0_8": 0, - "chRa0_11": 0, - "chRa0_12": 0, - "chRa0_1": 0, - "chRa0_5": 0, - "chRa0_0": 0, - "chRa0_2": 0, - "chRa0_7": 0, - "chJ0_1_0": 0, - "chJ0_2_0": 0, - "chJ0_3_0": 0, - "chRa0_3": 0, - "chRa0_9": 0, - "chRa0_13": 0 - }, - "buffer_token_size_in_bits": { - "chRa0_0": 0, - "chRa0_10": 0, - "chJ0_0_0": 0, - "chJ0_1_0": 0, - "chRa0_3": 0, - "chJ0_2_0": 0, - "chJ0_4_0": 0, - "chRa0_1": 0, - "chRa0_8": 0, - "chRa0_12": 0, - "chRa0_4": 0, - "chRa0_2": 0, - "chRa0_13": 0, - "chRa0_9": 0, - "chRa0_11": 0, - "chJ0_3_0": 0, - "chRa0_7": 0, - "chRa0_6": 0, - "chRa0_14": 0, - "chRa0_5": 0 - }, - "process_put_in_buffer_in_bits": { - "powspec": { - "chRa0_4": 0, - "chRa0_5": 0 - }, - "backEnd": {}, - "frontEnd": { - "chRa0_13": 0, - "chRa0_1": 0, - "chRa0_14": 0, - "chRa0_0": 0 - }, - "audspec": { - "chRa0_8": 0, - "chRa0_7": 0, - "chRa0_6": 0 - }, - "compJah": { - "chRa0_10": 0, - "chRa0_9": 0, - "chRa0_11": 0 - }, - "rasta": { - "chRa0_3": 0, - "chRa0_2": 0 - }, - "rastaFilter": { - "chRa0_12": 0 - } - }, - "process_get_from_buffer_in_bits": { - "backEnd": { - "chRa0_12": 0, - "chRa0_14": 0 - }, - "rasta": { - "chRa0_0": 0, - "chRa0_1": 0 - }, - "compJah": { - "chRa0_7": 0, - "chRa0_8": 0, - "chRa0_13": 0 - }, - "frontEnd": {}, - "rastaFilter": { - "chRa0_10": 0, - "chRa0_11": 0, - "chRa0_9": 0, - "chRa0_6": 0 - }, - "audspec": { - "chRa0_4": 0, - "chRa0_5": 0 - }, - "powspec": { - "chRa0_3": 0, - "chRa0_2": 0 - } - }, - "job_graph_name": [ - "frontEnd", - "backEnd", - "compJah", - "rasta", - "rastaFilter", - "audspec", - "powspec" - ], - "job_graph_instance": [ - 1, - 1, - 1, - 1, - 1, - 1, - 1 - ], - "job_graph_src_name": [ - "frontEnd", - "frontEnd", - "frontEnd", - "compJah", - "rasta", - "rastaFilter", - "audspec", - "audspec", - "powspec" - ], - "job_graph_dst_name": [ - "backEnd", - "compJah", - "rasta", - "rastaFilter", - "powspec", - "backEnd", - "compJah", - "rastaFilter", - "audspec" - ], - "job_graph_src_instance": [ - 1, - 1, - 1, - 1, - 1, - 1, - 1, - 1, - 1 - ], - "job_graph_dst_instance": [ - 1, - 1, - 1, - 1, - 1, - 1, - 1, - 1, - 1 - ], - "job_graph_is_strong_precedence": [ - true, - true, - true, - true, - true, - true, - true, - true, - true - ], - "process_minimum_throughput": {}, - "process_path_maximum_latency": {} - }, - { - "processes": [ - "CS_0", - "Huffman_0", - "getImage_0", - "DCT_0", - "writeImage_0", - "CC_0" - ], - "buffers": [ - "chJ0_0_0", - "chJ0_3_0", - "chJ0_2_0", - "chJ0_4_0", - "chJ0_1_0" - ], - "buffer_max_size_in_bits": { - "chRa0_14": 0, - "chJ0_3_0": 0, - "chJ0_4_0": 0, - "chRa0_12": 0, - "chRa0_7": 0, - "chRa0_10": 0, - "chRa0_6": 0, - "chRa0_13": 0, - "chJ0_1_0": 0, - "chRa0_1": 0, - "chRa0_9": 0, - "chJ0_0_0": 0, - "chJ0_2_0": 0, - "chRa0_8": 0, - "chRa0_11": 0, - "chRa0_2": 0, - "chRa0_4": 0, - "chRa0_5": 0, - "chRa0_0": 0, - "chRa0_3": 0 - }, - "buffer_token_size_in_bits": { - "chRa0_0": 0, - "chRa0_10": 0, - "chJ0_0_0": 0, - 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- "job_graph_instance": [ - 1, - 1, - 1, - 2, - 3, - 4, - 5, - 6, - 1, - 2, - 3, - 4, - 5, - 6, - 1, - 1 - ], - "job_graph_src_name": [ - "CS_0", - "Huffman_0", - "Huffman_0", - "Huffman_0", - "Huffman_0", - "Huffman_0", - "Huffman_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "CC_0", - "CC_0", - "CC_0", - "CC_0", - "CC_0", - "CC_0", - "getImage_0" - ], - "job_graph_dst_name": [ - "writeImage_0", - "Huffman_0", - "Huffman_0", - "Huffman_0", - "Huffman_0", - "Huffman_0", - "CS_0", - "Huffman_0", - "DCT_0", - "Huffman_0", - "DCT_0", - "Huffman_0", - "DCT_0", - "Huffman_0", - "DCT_0", - "Huffman_0", - "DCT_0", - "Huffman_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "DCT_0", - "CC_0" - ], - "job_graph_src_instance": [ - 1, - 1, - 2, - 3, - 4, - 5, - 6, - 1, - 1, - 2, - 2, - 3, - 3, - 4, - 4, - 5, - 5, - 6, - 1, - 1, - 1, - 1, - 1, - 1, - 1 - ], - "job_graph_dst_instance": [ - 1, - 2, - 3, - 4, - 5, - 6, - 1, - 1, - 2, - 2, - 3, - 3, - 4, - 4, - 5, - 5, - 6, - 6, - 1, - 2, - 3, - 4, - 5, - 6, - 1 - ], - "job_graph_is_strong_precedence": [ - true, - false, - false, - false, - false, - false, - true, - true, - false, - true, - false, - true, - false, - true, - false, - true, - false, - true, - true, - true, - true, - true, - true, - true, - true - ], - "process_minimum_throughput": {}, - "process_path_maximum_latency": {} - } - ], - "partitioned_mem_mappable_multicore": { - "hardware": { - "processing_elems": [ - "micro_blaze_5", - "micro_blaze_0", - "micro_blaze_1", - "micro_blaze_3", - "micro_blaze_6", - "micro_blaze_2", - "micro_blaze_4", - "micro_blaze_7" - ], - "storage_elems": [ - "micro_blaze_mem3", - "micro_blaze_mem1", - "micro_blaze_mem7", - "micro_blaze_mem0", - "micro_blaze_mem2", - "micro_blaze_mem5", - "micro_blaze_mem4", - "micro_blaze_mem6" - ], - "communication_elems": [ - "micro_blaze_ni0", - "micro_blaze_ni3", - "micro_blaze_ni1", - "micro_blaze_ni6", - "micro_blaze_ni5", - "micro_blaze_ni4", - "micro_blaze_ni2", - "micro_blaze_ni7", - "TDMBus" - ], - "topology_srcs": [ - "micro_blaze_0", - "micro_blaze_ni0", - "micro_blaze_0", - "micro_blaze_mem0", - "micro_blaze_mem0", - "micro_blaze_ni0", - "micro_blaze_1", - "micro_blaze_ni1", - "micro_blaze_1", - "micro_blaze_mem1", - "micro_blaze_mem1", - "micro_blaze_ni1", - "micro_blaze_2", - "micro_blaze_ni2", - "micro_blaze_2", - "micro_blaze_mem2", - "micro_blaze_mem2", - "micro_blaze_ni2", - "micro_blaze_3", - "micro_blaze_ni3", - "micro_blaze_3", - "micro_blaze_mem3", - "micro_blaze_mem3", - "micro_blaze_ni3", - "micro_blaze_4", - "micro_blaze_ni4", - "micro_blaze_4", - "micro_blaze_mem4", - "micro_blaze_mem4", - "micro_blaze_ni4", - "micro_blaze_5", - "micro_blaze_ni5", - "micro_blaze_5", - "micro_blaze_mem5", - "micro_blaze_mem5", - "micro_blaze_ni5", - "micro_blaze_6", - "micro_blaze_ni6", - "micro_blaze_6", - "micro_blaze_mem6", - "micro_blaze_mem6", - "micro_blaze_ni6", - "micro_blaze_7", - "micro_blaze_ni7", - "micro_blaze_7", - "micro_blaze_mem7", - "micro_blaze_mem7", - "micro_blaze_ni7", - "micro_blaze_ni0", - "TDMBus", - "micro_blaze_ni1", - "TDMBus", - "micro_blaze_ni2", - "TDMBus", - "micro_blaze_ni3", - "TDMBus", - "micro_blaze_ni4", - "TDMBus", - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni7", - "TDMBus" - ], - "topology_dsts": [ - "micro_blaze_ni0", - "micro_blaze_0", - "micro_blaze_mem0", - "micro_blaze_0", - "micro_blaze_ni0", - "micro_blaze_mem0", - "micro_blaze_ni1", - "micro_blaze_1", - "micro_blaze_mem1", - "micro_blaze_1", - "micro_blaze_ni1", - "micro_blaze_mem1", - "micro_blaze_ni2", - "micro_blaze_2", - "micro_blaze_mem2", - "micro_blaze_2", - "micro_blaze_ni2", - "micro_blaze_mem2", - "micro_blaze_ni3", - "micro_blaze_3", - "micro_blaze_mem3", - "micro_blaze_3", - "micro_blaze_ni3", - "micro_blaze_mem3", - "micro_blaze_ni4", - "micro_blaze_4", - "micro_blaze_mem4", - "micro_blaze_4", - "micro_blaze_ni4", - "micro_blaze_mem4", - "micro_blaze_ni5", - "micro_blaze_5", - "micro_blaze_mem5", - "micro_blaze_5", - "micro_blaze_ni5", - "micro_blaze_mem5", - "micro_blaze_ni6", - "micro_blaze_6", - "micro_blaze_mem6", - "micro_blaze_6", - "micro_blaze_ni6", - "micro_blaze_mem6", - "micro_blaze_ni7", - "micro_blaze_7", - "micro_blaze_mem7", - "micro_blaze_7", - "micro_blaze_ni7", - "micro_blaze_mem7", - "TDMBus", - "micro_blaze_ni0", - "TDMBus", - "micro_blaze_ni1", - "TDMBus", - "micro_blaze_ni2", - "TDMBus", - "micro_blaze_ni3", - "TDMBus", - "micro_blaze_ni4", - "TDMBus", - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni7" - ], - "processors_frequency": { - "micro_blaze_7": 1, - "micro_blaze_2": 1, - "micro_blaze_1": 1, - "micro_blaze_0": 1, - "micro_blaze_4": 1, - "micro_blaze_6": 1, - "micro_blaze_3": 1, - "micro_blaze_5": 1 - }, - "processors_provisions": { - "micro_blaze_5": { - "default": { - "all": 1.0 - } - }, - "micro_blaze_4": { - "default": { - "all": 1.0 - } - }, - "micro_blaze_7": { - "default": { - "CS": 1.0 - } - }, - "micro_blaze_2": { - "default": { - "all": 1.0 - } - }, - "micro_blaze_0": { - "default": { - "all": 1.0 - } - }, - "micro_blaze_3": { - "default": { - "all": 1.0 - } - }, - "micro_blaze_1": { - "default": { - "all": 1.0 - } - }, - "micro_blaze_6": { - "default": { - "all": 1.0 - } - } - }, - "storage_sizes": { - "micro_blaze_mem0": 8388608, - "micro_blaze_mem7": 8388608, - "micro_blaze_mem1": 8388608, - "micro_blaze_mem2": 8388608, - "micro_blaze_mem4": 8388608, - "micro_blaze_mem6": 8388608, - "micro_blaze_mem3": 8388608, - "micro_blaze_mem5": 8388608 - }, - "communication_elements_max_channels": { - "micro_blaze_ni5": 8, - "micro_blaze_ni6": 8, - "micro_blaze_ni0": 8, - "micro_blaze_ni4": 8, - "micro_blaze_ni2": 8, - "micro_blaze_ni1": 8, - "micro_blaze_ni3": 8, - "TDMBus": 8, - "micro_blaze_ni7": 8 - }, - "communication_elements_bit_per_sec_per_channel": { - "micro_blaze_ni2": 4.0, - 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"TDMBus" - ], - "micro_blaze_ni7": [ - "micro_blaze_ni6", - "TDMBus" - ], - "micro_blaze_mem6": [], - "micro_blaze_5": [ - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni5" - ], - "micro_blaze_ni5": [ - "micro_blaze_ni6", - "TDMBus" - ], - "micro_blaze_4": [ - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni4" - ], - "micro_blaze_0": [ - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni0" - ], - "micro_blaze_ni6": [], - "micro_blaze_ni3": [ - "micro_blaze_ni6", - "TDMBus" - ], - "micro_blaze_mem4": [ - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni4" - ], - "micro_blaze_1": [ - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni1" - ], - "micro_blaze_mem7": [ - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni7" - ], - "micro_blaze_mem1": [ - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni1" - ], - "micro_blaze_mem5": [ - "micro_blaze_ni6", - "TDMBus", - "micro_blaze_ni5" - ] - }, - "micro_blaze_4": { - "micro_blaze_ni6": [ - "micro_blaze_ni4", - "TDMBus" - ], - "micro_blaze_mem1": [ - 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"TDMBus", - "micro_blaze_ni3" - ], - "micro_blaze_ni5": [ - "TDMBus" - ], - "micro_blaze_mem7": [ - "TDMBus", - "micro_blaze_ni7" - ], - "micro_blaze_2": [ - "TDMBus", - "micro_blaze_ni2" - ], - "micro_blaze_ni6": [ - "TDMBus" - ] - }, - "micro_blaze_5": { - "micro_blaze_ni3": [ - "micro_blaze_ni5", - "TDMBus" - ], - "micro_blaze_3": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni3" - ], - "micro_blaze_mem1": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni1" - ], - "micro_blaze_ni5": [], - "micro_blaze_ni7": [ - "micro_blaze_ni5", - "TDMBus" - ], - "micro_blaze_ni4": [ - "micro_blaze_ni5", - "TDMBus" - ], - "micro_blaze_mem7": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni7" - ], - "TDMBus": [ - "micro_blaze_ni5" - ], - "micro_blaze_0": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni0" - ], - "micro_blaze_2": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni2" - ], - "micro_blaze_ni6": [ - "micro_blaze_ni5", - "TDMBus" - ], - "micro_blaze_mem3": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni3" - ], - "micro_blaze_mem5": [], - "micro_blaze_mem6": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni6" - ], - "micro_blaze_1": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni1" - ], - "micro_blaze_6": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni6" - ], - "micro_blaze_mem4": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni4" - ], - "micro_blaze_7": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni7" - ], - "micro_blaze_4": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni4" - ], - "micro_blaze_mem2": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni2" - ], - "micro_blaze_ni0": [ - "micro_blaze_ni5", - "TDMBus" - ], - "micro_blaze_ni1": [ - "micro_blaze_ni5", - "TDMBus" - ], - "micro_blaze_mem0": [ - "micro_blaze_ni5", - "TDMBus", - "micro_blaze_ni0" - ], - "micro_blaze_ni2": [ - "micro_blaze_ni5", - "TDMBus" - ] - }, - "micro_blaze_7": { - "micro_blaze_ni1": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_ni2": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_mem5": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni5" - ], - "TDMBus": [ - "micro_blaze_ni7" - ], - "micro_blaze_4": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni4" - ], - "micro_blaze_ni0": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_mem3": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni3" - ], - "micro_blaze_mem7": [], - "micro_blaze_5": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni5" - ], - "micro_blaze_ni5": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_3": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni3" - ], - "micro_blaze_mem1": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni1" - ], - "micro_blaze_2": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni2" - ], - "micro_blaze_ni3": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_mem6": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni6" - ], - "micro_blaze_ni4": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_mem0": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni0" - ], - "micro_blaze_ni6": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_mem2": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni2" - ], - "micro_blaze_6": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni6" - ], - "micro_blaze_1": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni1" - ], - "micro_blaze_mem4": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni4" - ], - "micro_blaze_0": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni0" - ], - "micro_blaze_ni7": [] - } - } - }, - "runtimes": { - "runtimes": [ - "micro_blaze_os0", - "micro_blaze_os3", - "micro_blaze_os1", - "micro_blaze_os2", - "micro_blaze_os7", - "micro_blaze_os4", - "micro_blaze_os5", - "micro_blaze_os6" - ], - "processors": [ - "micro_blaze_3", - "micro_blaze_7", - "micro_blaze_5", - "micro_blaze_0", - "micro_blaze_2", - "micro_blaze_4", - "micro_blaze_1", - "micro_blaze_6" - ], - "runtime_host": { - "micro_blaze_os4": "micro_blaze_4", - "micro_blaze_os7": "micro_blaze_7", - "micro_blaze_os3": "micro_blaze_3", - "micro_blaze_os2": "micro_blaze_2", - "micro_blaze_os0": "micro_blaze_0", - "micro_blaze_os5": "micro_blaze_5", - "micro_blaze_os6": "micro_blaze_6", - "micro_blaze_os1": "micro_blaze_1" - }, - "processor_affinities": { - "micro_blaze_6": "micro_blaze_os6", - "micro_blaze_2": "micro_blaze_os2", - "micro_blaze_7": "micro_blaze_os7", - "micro_blaze_3": "micro_blaze_os3", - "micro_blaze_4": "micro_blaze_os4", - "micro_blaze_0": "micro_blaze_os0", - "micro_blaze_1": "micro_blaze_os1", - "micro_blaze_5": "micro_blaze_os5" - }, - "is_bare_metal": [ - "micro_blaze_os2", - "micro_blaze_os7", - "micro_blaze_os6", - "micro_blaze_os0", - "micro_blaze_os1", - "micro_blaze_os4", - "micro_blaze_os3", - "micro_blaze_os5" - ], - "is_fixed_priority": [], - "is_preemptive": [], - "is_earliest_deadline_first": [], - "is_super_loop": [ - "micro_blaze_os1", - "micro_blaze_os7", - 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"TDMBus" - ] - }, - "micro_blaze_7": { - "micro_blaze_ni1": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_ni2": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_mem5": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni5" - ], - "TDMBus": [ - "micro_blaze_ni7" - ], - "micro_blaze_4": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni4" - ], - "micro_blaze_ni0": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_mem3": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni3" - ], - "micro_blaze_mem7": [], - "micro_blaze_5": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni5" - ], - "micro_blaze_ni5": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_3": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni3" - ], - "micro_blaze_mem1": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni1" - ], - "micro_blaze_2": [ - "micro_blaze_ni7", - "TDMBus", - "micro_blaze_ni2" - ], - "micro_blaze_ni3": [ - "micro_blaze_ni7", - "TDMBus" - ], - "micro_blaze_mem6": [ - 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"micro_blaze_2", - "micro_blaze_4", - "micro_blaze_1", - "micro_blaze_6" - ], - "runtime_host": { - "micro_blaze_os4": "micro_blaze_4", - "micro_blaze_os7": "micro_blaze_7", - "micro_blaze_os3": "micro_blaze_3", - "micro_blaze_os2": "micro_blaze_2", - "micro_blaze_os0": "micro_blaze_0", - "micro_blaze_os5": "micro_blaze_5", - "micro_blaze_os6": "micro_blaze_6", - "micro_blaze_os1": "micro_blaze_1" - }, - "processor_affinities": { - "micro_blaze_6": "micro_blaze_os6", - "micro_blaze_2": "micro_blaze_os2", - "micro_blaze_7": "micro_blaze_os7", - "micro_blaze_3": "micro_blaze_os3", - "micro_blaze_4": "micro_blaze_os4", - "micro_blaze_0": "micro_blaze_os0", - "micro_blaze_1": "micro_blaze_os1", - "micro_blaze_5": "micro_blaze_os5" - }, - "is_bare_metal": [ - "micro_blaze_os2", - "micro_blaze_os7", - "micro_blaze_os6", - "micro_blaze_os0", - "micro_blaze_os1", - "micro_blaze_os4", - "micro_blaze_os3", - "micro_blaze_os5" - ], - "is_fixed_priority": [], - "is_preemptive": [], - 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\ No newline at end of file diff --git a/rust-bridge-minizinc/src/AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticoreAndPL.mzn b/rust-bridge-minizinc/src/AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticoreAndPL.mzn index 55cc7fe4..a4646c28 100644 --- a/rust-bridge-minizinc/src/AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticoreAndPL.mzn +++ b/rust-bridge-minizinc/src/AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticoreAndPL.mzn @@ -56,15 +56,15 @@ constraint forall(p in Processes) (durationRead[p] >= 0); constraint forall(p in Processes) (durationWrite[p] >= 0); constraint forall(p in Processes) (duration[p] >= min([e | e in executionTime[p, ..] where e >= 0])); -constraint forall(p in Processes, pe in ListSchedulers, me in Memories) ( - absent(interconnectFromMemories[me, pe]) -> processesExecution[p] != pe \/ processesMapping[p] != me +constraint forall(p in Processes, pe in ListSchedulers, me in Memories where absent(interconnectFromMemories[me, pe])) ( + processesExecution[p] != pe \/ processesMapping[p] != me ); -constraint forall(b in Buffers, p in Processes, pe in Mappable, me in Memories where processesReadBuffer[p, b] > 0) ( - absent(interconnectFromMemories[me, pe]) -> processesExecution[p] != pe \/ buffersMapping[p] != me +constraint forall(b in Buffers, p in Processes, pe in Mappable, me in Memories where processesReadBuffer[p, b] > 0 /\ absent(interconnectFromMemories[me, pe])) ( + processesExecution[p] != pe \/ buffersMapping[b] != me ); -constraint forall(b in Buffers, p in Processes, pe in Mappable, me in Memories where processesWriteBuffer[p, b] > 0) ( - absent(interconnectToMemories[pe, me]) -> processesExecution[p] != pe \/ buffersMapping[p] != me +constraint forall(b in Buffers, p in Processes, pe in Mappable, me in Memories where processesWriteBuffer[p, b] > 0 /\ absent(interconnectToMemories[pe, me])) ( + processesExecution[p] != pe \/ buffersMapping[b] != me ); constraint forall(m in Memories) (