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In file included from wb_port.c:19:
.../mgmt_core_wrapper/verilog/dv/firmware/defs.h:273: warning: "reg_debug_2" redefined
273 | #define reg_debug_2 ((volatile unsigned int)(USER_SPACE_ADDR + USER_SPACE_SIZE))
|
.../mgmt_core_wrapper/verilog/dv/firmware/defs.h:147: note: this is the location of the previous definition
147 | #define reg_debug_2 ((volatile uint32_t)0x300FFFFC)
The text was updated successfully, but these errors were encountered:
On branch main:
The text was updated successfully, but these errors were encountered: