diff --git a/.devcontainer/open.Dockerfile b/.devcontainer/open.Dockerfile new file mode 100644 index 0000000..f2865ea --- /dev/null +++ b/.devcontainer/open.Dockerfile @@ -0,0 +1,27 @@ +# syntax=docker/dockerfile:1 +FROM ubuntu:22.04 + +LABEL maintainer="stefan_dan.ciocirlan@upb.ro" +LABEL version="0.1" +LABEL description="The open source toolchain docker image for the Computer Architecture course" + +# for apt-get +# https://serverfault.com/questions/949991/how-to-install-tzdata-on-a-ubuntu-docker-image +ARG DEBIAN_FRONTEND=noninteractive +ENV TZ=Europe/Bucharest + +RUN apt-get update && \ + apt-get upgrade -y && \ + apt-get install -y nano git unzip wget gedit make gcc g++ +# install gtkwave through apt-get +# https://github.com/gtkwave/gtkwave +RUN apt-get install -y gtkwave + +# install icaurs +# https://github.com/steveicarus/iverilog +RUN apt-get install -y iverilog + +# install yosys +RUN apt-get install -y yosys +# install verilator +RUN apt-get install -y verilator diff --git a/chapters/guides/docker/macos/README.md b/chapters/guides/docker/macos/README.md new file mode 100644 index 0000000..cb24a1f --- /dev/null +++ b/chapters/guides/docker/macos/README.md @@ -0,0 +1,56 @@ +# Utilizare imagine docker MacOS + +## Cerințe necesare + +### Docker Desktop + +Instalare [Docker Desktop](https://www.docker.com/products/docker-desktop/). + +### Instalre XQuartz + +Instalare [XQuartz](https://www.xquartz.org/) + +### Visual Studio Code + +Descărcați și instalați [Visual Studio Code](https://code.visualstudio.com/download) + +### Clonați repo-ul materiei + +```bash +git clone https://github.com/cs-pub-ro/computer-architecture.git +``` + +## Rulare + +### Porniți XQuartz + +1. Deschideți Applications > Utilities > XQuartz + + +### Opțiunea 1 din Visual Studio Code + +1. Deschideți directorul repo-ului în Visual Studio Code. +```bash +code computer-architecture +``` + +2. Instalați extensia [Dev Containers](https://marketplace.visualstudio.com/items?itemName=ms-vscode-remote.remote-containers). + +3. După veți avea opțiunea "Dev Containers: Reopen in container" (`CTRL+SHIFT+P`). + +### Opțiunea 2 prin docker + +1. Descărcați imaginea cu docker +```bash +docker pull gitlab.cs.pub.ro:5050/ac/ac-public/vivado-slim:1.0.0 +``` + +2. Rulați un container cu imaginea +```bash +docker run --rm -it -v /dev:/dev gitlab.cs.pub.ro:5050/ac/ac-public/vivado-slim:1.0.0 /bin/bash +``` + +3. Rulați vivado din imagine +```bash +vivado +``` diff --git a/chapters/guides/docker/windows/README.md b/chapters/guides/docker/windows/README.md index 860ca22..8cd16f4 100644 --- a/chapters/guides/docker/windows/README.md +++ b/chapters/guides/docker/windows/README.md @@ -114,3 +114,9 @@ docker run --rm -it -v /dev:/dev gitlab.cs.pub.ro:5050/ac/ac-public/vivado-slim: ```bash vivado ``` + + +## Troubleshooting +### Vivado nu vede seriala catre FPGA (laptop) + +Urmăriți tutorialul până la finalul sesiunii "Attach the device to wsl2" [usbipd](https://hackmd.io/@aeefs2Y8TMms-cjTDX4cfw/r1fqAa_Da) diff --git a/chapters/verilog/basic/assigments/mux/.gitignore b/chapters/verilog/basic/assigments/mux/.gitignore new file mode 100644 index 0000000..e2809dd --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/.gitignore @@ -0,0 +1,2 @@ +*.vvp +*.vcd \ No newline at end of file diff --git a/chapters/verilog/basic/assigments/mux/Makefile b/chapters/verilog/basic/assigments/mux/Makefile new file mode 100644 index 0000000..6cd22ca --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/Makefile @@ -0,0 +1,47 @@ +COMPILER=iverilog +INTERPRETER=vvp +SIMULATOR=gtkwave +FLAGS=-Wall -Winfloop +SOLUTION_FLAGS=-DSEL_WIDTH=2 +TOP_MODULE=mux +TOP_SIM_MODULE=test_${TOP_MODULE} +TOP_EVALUATE_MODULE=evaluate_${TOP_MODULE} +SOLUTION_MODULE=solution_${TOP_MODULE} +SOLUTION_SIM_MODULE=test_${SOLUTION_MODULE} +OTHER_SOURCES= +DUMP_VCD_FILE=test.vcd +EVALUATE_FILE=evaluate.out +GRADE_SCRIPT=grade.sh + +all: build + +build: + $(COMPILER) $(FLAGS) $(TOP_MODULE).v $(TOP_SIM_MODULE).v $(OTHER_SOURCES) -o $(TOP_MODULE).vvp + +build_solution: + $(COMPILER) $(FLAGS) ${SOLUTION_FLAGS} ${SOLUTION_SIM_MODULE}.v ${SOLUTION_MODULE}.v $(OTHER_SOURCES) -o $(SOLUTION_MODULE).vvp + +build_evaluate: + $(COMPILER) $(FLAGS) ${SOLUTION_FLAGS} ${TOP_MODULE}.v ${SOLUTION_MODULE}.v ${TOP_EVALUATE_MODULE}.v $(OTHER_SOURCES) -o $(TOP_EVALUATE_MODULE).vvp + + +run: build + $(INTERPRETER) $(TOP_MODULE).vvp + +run_solution: build_solution + $(INTERPRETER) $(SOLUTION_MODULE).vvp + +run_evaluate: build_evaluate + $(INTERPRETER) $(TOP_EVALUATE_MODULE).vvp &> $(EVALUATE_FILE) + +simulate: run + $(SIMULATOR) $(DUMP_VCD_FILE) + +simulate_solution: run_solution + $(SIMULATOR) $(DUMP_VCD_FILE) + +evaluate: run_evaluate + ./${GRADE_SCRIPT} $(EVALUATE_FILE) + +clean: + rm *.vvp $(DUMP_VCD_FILE) $(EVALUATE_FILE) diff --git a/chapters/verilog/basic/assigments/mux/README.md b/chapters/verilog/basic/assigments/mux/README.md new file mode 100644 index 0000000..15694e3 --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/README.md @@ -0,0 +1 @@ +Implementați un multiplexor. Apăsați butonul run din VPL pentru a afla tipul multiplexorului pe care trebuie sa îl implementați. \ No newline at end of file diff --git a/chapters/verilog/basic/assigments/mux/evaluate_mux.v b/chapters/verilog/basic/assigments/mux/evaluate_mux.v new file mode 100644 index 0000000..55b9f73 --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/evaluate_mux.v @@ -0,0 +1,46 @@ +`timescale 1ns / 1ps +module evaluate_mux; + localparam l_p_sel_width = `SEL_WIDTH; + //Inputs + reg [(l_p_sel_width-1):0] l_r_sel; + reg [(2**l_p_sel_width)-1:0] l_r_in; + + //Outputs + wire l_w_out; + wire l_w_sout; + + //local variables for loop + integer i,j; + + //Module initialization + mux uut ( + .o_w_out(l_w_out), + .i_w_in(l_r_in), + .i_w_sel(l_r_sel) + ); + + solution_mux suut ( + .o_w_out(l_w_sout), + .i_w_in(l_r_in), + .i_w_sel(l_r_sel) + ); + + //Simulation tests + initial begin + for (i = 0; i < (2**l_p_sel_width); i = i + 1) begin + l_r_in = 1 << i; + for (j = 0; j < (2**l_p_sel_width); j = j + 1) begin + l_r_sel = j; + #5; + if (l_w_out !== l_w_sout) begin + $display("Error: (hex_values) l_w_out = %0h correct %0h, sel: %0h in = %0h", l_w_out, l_w_sout, j, l_r_in); + end else begin + $display("OK"); + end + #5; + end + end + //finish the simulation + $finish; + end +endmodule diff --git a/chapters/verilog/basic/assigments/mux/grade.sh b/chapters/verilog/basic/assigments/mux/grade.sh new file mode 100755 index 0000000..b2bf083 --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/grade.sh @@ -0,0 +1,21 @@ +#!/bin/bash +if [[ $# -ne 1 ]]; then + echo 'Too many/few arguments, expecting one' >&2 + exit 1 +fi + +EVALUATE_FILE=$1 +#--- remove multiple spaces --- +cat $EVALUATE_FILE | sed 's/ */ /g' > dummy.out +mv dummy.out $EVALUATE_FILE + +#--- remove blank lines --- +cat $EVALUATE_FILE | sed '/^\s*$/d' > dummy.out +mv dummy.out $EVALUATE_FILE + +# Calculate number of correct test versus wrong test +correct_test_no=$(awk '$1=="OK" { print $0 }' $EVALUATE_FILE | wc -l | awk '{ print $1 }') +test_no=$(wc -l $EVALUATE_FILE| awk '{ print $1 }') +grade=$( expr $correct_test_no \* 100 / $test_no) + +echo $grade \ No newline at end of file diff --git a/chapters/verilog/basic/assigments/mux/mux.v b/chapters/verilog/basic/assigments/mux/mux.v new file mode 100644 index 0000000..9d38e45 --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/mux.v @@ -0,0 +1,5 @@ +module mux( +// TODO: add inputs o_w_out,i_w_in,i_w_sel +); +// TODO: implement mux x:1 +endmodule \ No newline at end of file diff --git a/chapters/verilog/basic/assigments/mux/solution_mux.v b/chapters/verilog/basic/assigments/mux/solution_mux.v new file mode 100644 index 0000000..c7e1b16 --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/solution_mux.v @@ -0,0 +1,7 @@ +module solution_mux ( + output wire o_w_out, + input wire [((2**`SEL_WIDTH)-1):0] i_w_in, + input wire [`SEL_WIDTH-1:0] i_w_sel +); + assign o_w_out = i_w_in[i_w_sel]; +endmodule \ No newline at end of file diff --git a/chapters/verilog/basic/assigments/mux/test_mux.v b/chapters/verilog/basic/assigments/mux/test_mux.v new file mode 100644 index 0000000..14f60e7 --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/test_mux.v @@ -0,0 +1,17 @@ +`timescale 1ns / 1ps +module test_mux; + //Inputs + + //Outputs + + //local variables for loop + integer i,j; + + //Module initialization + + //Simulation tests + initial begin + //finish the simulation + $finish; + end +endmodule diff --git a/chapters/verilog/basic/assigments/mux/test_solution_mux.v b/chapters/verilog/basic/assigments/mux/test_solution_mux.v new file mode 100644 index 0000000..0f66ef5 --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/test_solution_mux.v @@ -0,0 +1,49 @@ +`timescale 1ns / 1ps +module test_mux; + localparam l_p_sel_width = `SEL_WIDTH; + //Inputs + reg [(l_p_sel_width-1):0] l_r_sel; + reg [(2**l_p_sel_width)-1:0] l_r_in; + + //Outputs + wire l_w_out; + + //local variables for loop + integer i,j; + + //Module initialization + solution_mux uut ( + .o_w_out(l_w_out), + .i_w_in(l_r_in), + .i_w_sel(l_r_sel) + ); + + //Simulation tests + initial begin + //wave files + $dumpfile("test.vcd"); + // dumpp all variables + $dumpvars; + // monitor varibles changes in values + $monitor( + "Time = %0t, ", $time, + "l_w_out = %0h, ", l_w_out, + "l_r_sel = %0h, ", l_r_sel, + "l_r_in = %0h", l_r_in + ); + + for (i = 0; i < (2**l_p_sel_width); i = i + 1) begin + l_r_in = 1 << i; + for (j = 0; j < (2**l_p_sel_width); j = j + 1) begin + l_r_sel = j; + #5; + if (l_w_out !== l_r_in[j]) begin + $display("Error: l_w_out = %0h, l_r_in[%0d] = %0h", l_w_out, j, l_r_in[j]); + end + #5; + end + end + //finish the simulation + $finish; + end +endmodule diff --git a/chapters/verilog/basic/assigments/mux/vpl_evaluate.sh b/chapters/verilog/basic/assigments/mux/vpl_evaluate.sh new file mode 100644 index 0000000..45f9859 --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/vpl_evaluate.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# +# vpl_evaluate.sh script + +source common_script.sh + +#./vpl_run.sh +TOP_MODULE=mux +TOP_SIM_MODULE=test_${TOP_MODULE} +TOP_EVALUATE_MODULE=evaluate_${TOP_MODULE} +SOLUTION_MODULE=solution_${TOP_MODULE} +OTHER_SOURCES= +maxGrade=100 + +# get the variation +variation=\$(date +"%d%H") +if [ \$((variation % 2)) == 0 ]; then + variation=variation +else + variation=\$(expr \$variation - 1) +fi + +start_sel_no_bits=2 +end_sel_no_bits=4 +sel_no_bits=\$(awk -v seed="\$variation" -v start_number="\$start_sel_no_bits" -v end_number="\$end_sel_no_bits" 'BEGIN { + # seed + srand(seed) + print start_number + int((end_number - start_number) * rand()) +}') + + +# BUILD the code +iverilog ${TOP_MODULE}.v ${SOLUTION_MODULE}.v ${TOP_EVALUATE_MODULE}.v ${OTHER_SOURCES} -P p_sel_width=${sel_no_bits} -o ${TOP_MODULE}.vvp +# RUN the code +vvp ${TOP_MODULE}.vvp &> user.out + + +#--- remove multiple spaces --- +cat user.out | sed 's/ */ /g' > dummy.out +mv dummy.out user.out + +#--- remove blank lines --- +cat user.out | sed '/^\s*$/d' > dummy.out +mv dummy.out user.out + +# Calculate number of correct test versus wrong test +correct_test_no=$(awk '$1=="OK" { print $0 }' user.out | wc -l | awk '{ print $1 }') +test_no=$(wc -l user.out | awk '{ print $1 }') +grade=$( expr $correct_test_no \* 100 / $test_no) + +echo "#!/bin/bash" > vpl_execution + +# if not max grade print the first error line +if (( $grade < $maxGrade )) ; then +text=$(awk '$1!="OK" { print $0 }' user.out | awk 'NR==1 { print $0 }') +echo "echo '$text' " >> vpl_execution +fi + +echo "echo 'Grade :=>> $grade' " >> vpl_execution + +chmod +x vpl_execution \ No newline at end of file diff --git a/chapters/verilog/basic/assigments/mux/vpl_run.sh b/chapters/verilog/basic/assigments/mux/vpl_run.sh new file mode 100644 index 0000000..f8e1a5e --- /dev/null +++ b/chapters/verilog/basic/assigments/mux/vpl_run.sh @@ -0,0 +1,35 @@ +#!/bin/bash +# +# vpl_run.sh script + +cat > vpl_execution <| FSM +--->| Ieșire | +| | | | | | ++-------------------+ +-------------------+ +-------------------+ + ^ + | + v + +-------------------+ + | Internal State | + | | + +-------------------+ \ No newline at end of file diff --git a/slides/courses/1/media/gcn.ascii b/slides/courses/1/media/gcn.ascii new file mode 100644 index 0000000..7849371 --- /dev/null +++ b/slides/courses/1/media/gcn.ascii @@ -0,0 +1,4 @@ ++-------------------+ +-------------------+ +-------------------+ +| Intrare +--->| Calculator +--->| Ieșire | +| | | Numeric | | | ++-------------------+ +-------------------+ +-------------------+ diff --git a/slides/courses/1/media/memwrite.ascii b/slides/courses/1/media/memwrite.ascii new file mode 100644 index 0000000..d7dbf21 --- /dev/null +++ b/slides/courses/1/media/memwrite.ascii @@ -0,0 +1,31 @@ + | | TIMP | TIMP | | + | | ACCES | CICLU | | + | | MEMORIE | SCRIERE | | + | | + | +-------------------------------------------+ | + | | | | +ADRESA ----+------+ +------------------+------ + | | | | + | +-------------------------------------------+ | + SM ----+----------+ +-----------------+------ + | | | | + | | | | + | | | | + | +----------------------------------------+ | + S/C ----+----------+ +-----------------+------ + | | | | + | | | | + | | | | + | +----------------------------------------+ | + | +-------------------------------------------+ | + | | | | + DATE ----+----------+ +--------------+------ + | | | | + | +-------------------------------------------+ | + | | + + + + + + \ No newline at end of file diff --git a/slides/courses/1/media/mscn.ascii b/slides/courses/1/media/mscn.ascii new file mode 100644 index 0000000..5c3f8ff --- /dev/null +++ b/slides/courses/1/media/mscn.ascii @@ -0,0 +1,6 @@ ++---------+ +-----------+ +-------------------+ +-----------+ +---------+ +| | | | | | | | | | +| Intrare +------->| Subsistem +--->| Subsistem +--->| Subsistem +-------->| Ieșire | +| | | Intrare | | Prelucrare | | Ieșire | | | +| | | |<-->| |<-->| | | | ++---------+ +-----------+ +-------------------+ +-----------+ +---------+ \ No newline at end of file diff --git a/slides/courses/1/media/plcomp.ascii b/slides/courses/1/media/plcomp.ascii new file mode 100644 index 0000000..3d767eb --- /dev/null +++ b/slides/courses/1/media/plcomp.ascii @@ -0,0 +1,23 @@ ++--------------------------------------+ +| CALCULATOR VIRTUAL C3 | +| | +| +------------------------------+ | +| | CALCULATOR VIRTUAL C2 | | +| | | | +| | +--------------------+ | | +| | | CALCULATOR REAL C1 | | | +| | | | | | +| | | | | | +| | | | | | +| | | | | | +| | | | | | +| | | | | | +| | | LIMBAJ MAȘINĂ LM | | | +| | | | | | +| | +--------------------+ | | +| | | | +| | LIMBAJ L1 | | +| +------------------------------+ | +| | +| LIMBAJ L2 | ++--------------------------------------+ \ No newline at end of file diff --git a/slides/courses/1/media/regular.ascii b/slides/courses/1/media/regular.ascii new file mode 100644 index 0000000..2d63fec --- /dev/null +++ b/slides/courses/1/media/regular.ascii @@ -0,0 +1,4 @@ ++-------------------+ +-------------------+ +-------------------+ +| Intrare +--->| Logică +--->| Ieșire | +| | | Combinațională | | | ++-------------------+ +-------------------+ +-------------------+ diff --git a/slides/courses/1/media/stackfsm.ascii b/slides/courses/1/media/stackfsm.ascii new file mode 100644 index 0000000..b68a9c4 --- /dev/null +++ b/slides/courses/1/media/stackfsm.ascii @@ -0,0 +1,18 @@ + +-------------------+ + | Stack | + | | + +-------------------+ + ^ + | PUSH / POP/ TOP (PEEK*) + v ++-------------------+ +-------------------+ +-------------------+ +| Intrare +--->| FSM +--->| Ieșire | +| | | | | | ++-------------------+ +-------------------+ +-------------------+ + ^ + | + v + +-------------------+ + | Internal State | + | | + +-------------------+ \ No newline at end of file diff --git a/slides/courses/1/media/structcn.ascii b/slides/courses/1/media/structcn.ascii new file mode 100644 index 0000000..d58389f --- /dev/null +++ b/slides/courses/1/media/structcn.ascii @@ -0,0 +1,24 @@ + +----------------------------------------------------------------+ + | CALCULATOR NUMERIC | + | | + | +------------------------+ | + | | UNITATE CENTRALĂ | | + | | | | + | | +-------------------+ | | + | | | | | | + | | | MEMORIE | | | + | | | | | | ++---------+ +---------+ | +-----------+ | +---+----^------^---+ | +-----------+ | +--------+ +--------+ +| | | | | | +-->| | | | +-->| | | | | | | +| | | EP | | | INTERFAȚĂ | | | | | | | INTERFAȚĂ | | | EP | | | +| INTRARE +---> INTRARE +---+-->| INTRARE | | | | | | | IESIRE +---+---> IEȘIRE +---> IEȘIRE | +| | | | | | | | | | | | | | | | | | | +| | | | | | <---+ | | | |<--+ | | | | | | ++---------+ +---------+ | +-----------+ | | | | | +-----------+ | +--------+ +--------+ + | | +---v----+------v---+ | | + | | | UNITATE | | | + | | | CENTRALĂ DE | | | + | | | PRELUCRARE | | | + | | +-------------------+ | | + | +------------------------+ | + +----------------------------------------------------------------+ \ No newline at end of file diff --git a/slides/courses/1/media/structsoc.ascii b/slides/courses/1/media/structsoc.ascii new file mode 100644 index 0000000..6ba8911 --- /dev/null +++ b/slides/courses/1/media/structsoc.ascii @@ -0,0 +1,36 @@ + +---------------------------------------------------------------------------------+ + | CALCULATOR NUMERIC | + | +-----------------------------------------+ | + | | UNITATE CENTRALĂ | | + | | +-------------------+ | | + | | | |<--------+ | | + | | +---->+ MEMORIE | | | | + | | | | |<------+ | | | + | | | +-------------------+ | | | | + | | | | | | | + | | | +-------------------+ | | | | + | | +------>+ | | | | | + | | | | | REGISTRE | | | | | + | | | +---->+ | | | | | + | | | | +-------------------+ | | | | + | | | | +-----------------------------+ | | | | + | | | | | UNITATE | | | | | + | | | | | CENTRALĂ DE | | | | | + | | | | | PRELUCRARE | | | | | + | | | | | | | | | | + | | | | | +---------------------+ | | | | | + | | | | | | UNITATE | | | | | | ++---------+ +---------+ | +-----------+ | | | | | ARITMETICĂ | | | | | +-----------+ | +--------+ +--------+ +| | | | | | +-------+---->| LOGICĂ +-----+------>| +------>| | | | +| | | EP +------>| INTERFAȚĂ | | | | +---------------------+ | | | | INTERFAȚĂ | | | EP | | | +| INTRARE +-->| INTRARE | | | INTRARE | | | | ^ | | | | IESIRE | | | IEȘIRE +-->| IEȘIRE | +| | | | | | | | | | | | | | | | | | | | | +| | | +<----->+ |<----+-----+ v | +<--->+ +<----->+ | | | ++---------+ +---------+ | +-----------+ | | | +---------+-----------+ | | | +-----------+ | +--------+ +--------+ + | | | | | UNITATE | | | | | + | | | | | CENTRALĂ DE | | | | | + | | | +>| DECIZIE +<------+ | | + | | | +---------------------+ | | | + | | +-----------------------------+ | | + | +-----------------------------------------+ | + +---------------------------------------------------------------------------------+ diff --git a/slides/courses/1/media/turing.ascii b/slides/courses/1/media/turing.ascii new file mode 100644 index 0000000..44815f2 --- /dev/null +++ b/slides/courses/1/media/turing.ascii @@ -0,0 +1,13 @@ ++-------------------+ +-------------------+ +-------------------+ +-------------------+ +| | | | | | | | +| Infinite |<-->| Read/Write |<-->| Control |<-->| Instruction Set | +| Tape | | Head | | Unit | | | ++-------------------+ +-------------------+ +-------------------+ +-------------------+ + ^ + | + v + +-------------------+ + | | + | Internal State | + | | + +-------------------+ \ No newline at end of file diff --git a/slides/courses/1/structural.tex b/slides/courses/1/structural.tex new file mode 100644 index 0000000..edbcfd6 --- /dev/null +++ b/slides/courses/1/structural.tex @@ -0,0 +1,85 @@ +\begin{frame} + \frametitle{Proprietați CN} +\begin{itemize} + \item Determinist în teorie, predictibil în inginerie cu eroare neglijabilă ce poate fi modelată. + \item Modelat după Turing Machine. +\end{itemize} + +\end{frame} + +\begin{frame} + \frametitle{Model general de CN} + \begin{lrbox}{\asciigcn} + \begin{varwidth}{\maxdimen} + \VerbatimInput[fontsize=\scriptsize]{media/gcn.ascii} + \end{varwidth} + \end{lrbox}% + + \begin{figure}[h] + \centering + \scalebox{0.9}{\usebox{\asciigcn}} + \end{figure} + + \begin{itemize} + \item Diferențe între reprezentarea internă și externă a datelor. + \end{itemize} +\end{frame} + + +\begin{frame} + \frametitle{Model structural al CN} + \newsavebox{\asciimscn} + \begin{lrbox}{\asciimscn} + \begin{varwidth}{\maxdimen} + \VerbatimInput[fontsize=\scriptsize]{media/mscn.ascii} + \end{varwidth} + \end{lrbox}% + + \begin{figure}[h] + \centering + \scalebox{0.8}{\usebox{\asciimscn}} + \end{figure} + \begin{itemize} + \item Diferneță între echipamentele periferice și calculatorul numeric. + \item Memorie internă și unitatea centrală de procesare. + \end{itemize} +\end{frame} + + +\begin{frame} + \frametitle{Structura unui CN} + \newsavebox{\asciistructcn} + \begin{lrbox}{\asciistructcn} + \begin{varwidth}{\maxdimen} + \VerbatimInput[fontsize=\scriptsize]{media/structcn.ascii} + \end{varwidth} + \end{lrbox}% + + \begin{figure}[h] + \centering + \scalebox{0.65}{\usebox{\asciistructcn}} + \end{figure} + \begin{itemize} + \item Ierarhie de memorie. + \item Control și procesare. + \end{itemize} +\end{frame} + + +\begin{frame} + \frametitle{Structura unui Sistem de Calcul (SC)} + \newsavebox{\asciistructsoc} + \begin{lrbox}{\asciistructsoc} + \begin{varwidth}{\maxdimen} + \VerbatimInput[fontsize=\scriptsize]{media/structsoc.ascii} + \end{varwidth} + \end{lrbox}% + + \begin{figure}[h] + \centering + \scalebox{0.47}{\usebox{\asciistructsoc}} + \end{figure} + \begin{itemize} + \item Control memorie. + \end{itemize} +\end{frame} \ No newline at end of file diff --git a/slides/courses/1/theoretical.tex b/slides/courses/1/theoretical.tex new file mode 100644 index 0000000..82a7d3d --- /dev/null +++ b/slides/courses/1/theoretical.tex @@ -0,0 +1,77 @@ +\begin{frame} + \frametitle{Expersii Regulate/Logică combinațională} + \newsavebox{\asciiregular} + \begin{lrbox}{\asciiregular} + \begin{varwidth}{\maxdimen} + \VerbatimInput[fontsize=\scriptsize]{media/regular.ascii} + \end{varwidth} + \end{lrbox}% + + \begin{figure}[h] + \centering + \scalebox{0.8}{\usebox{\asciiregular}} + \end{figure} + \begin{itemize} + \item Expresii regulate $O = [a-zA-Z0-9]+$ + \item Logică combinațională $O = i_0 \oplus i_1$ + \item Are nevoie de toată intrarea pentru a produce ieșirea + \end{itemize} +\end{frame} + +\begin{frame} + \frametitle{Automat Finite} + \newsavebox{\asciifsm} + \begin{lrbox}{\asciifsm} + \begin{varwidth}{\maxdimen} + \VerbatimInput[fontsize=\scriptsize]{media/fsm.ascii} + \end{varwidth} + \end{lrbox}% + + \begin{figure}[h] + \centering + \scalebox{0.8}{\usebox{\asciifsm}} + \end{figure} + \begin{itemize} + \item Are o stare internă ce poate fi modificată + \item Nu poate accessa intrări anterior anterior + \end{itemize} +\end{frame} + + +\begin{frame} + \frametitle{Automat cu stivă/pushdown} + \newsavebox{\asciistackfsm} + \begin{lrbox}{\asciistackfsm} + \begin{varwidth}{\maxdimen} + \VerbatimInput[fontsize=\scriptsize]{media/stackfsm.ascii} + \end{varwidth} + \end{lrbox}% + + \begin{figure}[h] + \centering + \scalebox{0.8}{\usebox{\asciistackfsm}} + \end{figure} + \begin{itemize} + \item Are o stivă unde poate stoca și re accesa intrările. + \item Stiva este limitată, o intrare citită salvată și folosită nu poate fi folosită din nou. + \end{itemize} +\end{frame} + + +\begin{frame} + \frametitle{Model Turing Machine} + \newsavebox{\asciituring} + \begin{lrbox}{\asciituring} + \begin{varwidth}{\maxdimen} + \VerbatimInput[fontsize=\scriptsize]{media/turing.ascii} + \end{varwidth} + \end{lrbox}% + + \begin{figure}[h] + \centering + \scalebox{0.8}{\usebox{\asciituring}} + \end{figure} + \begin{itemize} + \item Are o rolă infinită și poate reaccesa intrările și ieșirle anterioare. + \end{itemize} +\end{frame} \ No newline at end of file diff --git a/slides/media/LOGO_UNSTPB_en.png b/slides/media/LOGO_UNSTPB_en.png new file mode 100644 index 0000000..61e1d89 Binary files /dev/null and b/slides/media/LOGO_UNSTPB_en.png differ diff --git a/slides/media/logo-poli-color9.png b/slides/media/logo-poli-color9.png new file mode 100644 index 0000000..9eba54a Binary files /dev/null and b/slides/media/logo-poli-color9.png differ diff --git a/slides/media/logoAC.jpeg b/slides/media/logoAC.jpeg new file mode 100644 index 0000000..c9c8cbb Binary files /dev/null and b/slides/media/logoAC.jpeg differ diff --git a/slides/media/logoAC.svg b/slides/media/logoAC.svg new file mode 100644 index 0000000..01c0be8 --- /dev/null +++ b/slides/media/logoAC.svg @@ -0,0 +1,282 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/slides/media/logoACSQ.jpeg b/slides/media/logoACSQ.jpeg new file mode 100644 index 0000000..d8bf6f4 Binary files /dev/null and b/slides/media/logoACSQ.jpeg differ diff --git a/slides/media/logo_AC_moodle.png b/slides/media/logo_AC_moodle.png new file mode 100644 index 0000000..474d91e Binary files /dev/null and b/slides/media/logo_AC_moodle.png differ