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Chisel chokes on using elements of an unbound Aggregate as elements of a Record #4215
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is this only for Vecs or does it manifest for other Bundles and Record you might try to do this to |
I assumed it would apply to all Aggregates, but it seems to be only for Vecs. The issue is that the ref for the children of Vecs is unconditionally pointing to the Vec within which they are defined[1] (before binding), whereas for Records it is set during binding[2]. Regardless, I think we should ban this because it's a pretty sharp edge even when it "works". The user may reasonably see |
Type of issue: Bug Report
Please provide the steps to reproduce the problem:
Consider the following Chisel:
What is the current behavior?
This emits:
The
input in : { [ILit(1)] : UInt<8>, [ILit(0)] : UInt<8>, a : UInt<8>}
is nonsensical.What is the expected behavior?
It should either error or emit valid FIRRTL
Note there are other ways that this same bug can manifest. Trying to
dontTouch
in
orout
throws an exception pointing to Chisel internals.Please tell us about your environment:
Other Information
What is the use case for changing the behavior?
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