From 63134bfa88006fb0c964f29415a7ec7a9650e0b1 Mon Sep 17 00:00:00 2001
From: itlhd <xikan@armsom.org>
Date: Wed, 25 Sep 2024 14:36:45 +0800
Subject: [PATCH] arm64: dts: Add missing overlays for armsom-sige3

---
 arch/arm64/boot/dts/rockchip/overlay/Makefile | 16 +++++++++++++
 .../dts/rockchip/overlay/rk3568-i2c3-m1.dts   | 13 +++++++++++
 .../dts/rockchip/overlay/rk3568-i2c5-m0.dts   | 13 +++++++++++
 .../dts/rockchip/overlay/rk3568-pwm10-m0.dts  | 14 +++++++++++
 .../dts/rockchip/overlay/rk3568-pwm11-m0.dts  | 14 +++++++++++
 .../dts/rockchip/overlay/rk3568-pwm12-m0.dts  | 14 +++++++++++
 .../dts/rockchip/overlay/rk3568-pwm13-m0.dts  | 14 +++++++++++
 .../dts/rockchip/overlay/rk3568-pwm14-m0.dts  | 14 +++++++++++
 .../dts/rockchip/overlay/rk3568-pwm15-m0.dts  | 14 +++++++++++
 .../dts/rockchip/overlay/rk3568-pwm8-m0.dts   | 14 +++++++++++
 .../dts/rockchip/overlay/rk3568-pwm9-m0.dts   | 14 +++++++++++
 .../overlay/rk3568-spi2-m0-cs0-spidev.dts     | 23 +++++++++++++++++++
 .../overlay/rk3568-spi2-m0-cs1-spidev.dts     | 23 +++++++++++++++++++
 .../dts/rockchip/overlay/rk3568-uart3-m1.dts  | 13 +++++++++++
 .../dts/rockchip/overlay/rk3568-uart4-m1.dts  | 13 +++++++++++
 .../dts/rockchip/overlay/rk3568-uart5-m1.dts  | 13 +++++++++++
 .../dts/rockchip/overlay/rk3568-uart7-m1.dts  | 13 +++++++++++
 17 files changed, 252 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-i2c3-m1.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-i2c5-m0.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm10-m0.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm11-m0.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm12-m0.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm13-m0.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm14-m0.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm15-m0.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm8-m0.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm9-m0.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-spi2-m0-cs0-spidev.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-spi2-m0-cs1-spidev.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-uart3-m1.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-uart4-m1.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-uart5-m1.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/overlay/rk3568-uart7-m1.dts

diff --git a/arch/arm64/boot/dts/rockchip/overlay/Makefile b/arch/arm64/boot/dts/rockchip/overlay/Makefile
index 0327eb8babcad..673ec4307f6bd 100644
--- a/arch/arm64/boot/dts/rockchip/overlay/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlay/Makefile
@@ -74,6 +74,22 @@ dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
 	rockchip-rk3588-opp-oc-24ghz.dtbo \
 	rockchip-rk3588-panthor-gpu.dtbo \
 	rk3566-roc-pc-sata2.dtbo \
+	rk3568-i2c3-m1.dtbo \
+	rk3568-i2c5-m0.dtbo \
+	rk3568-pwm8-m0.dtbo \
+	rk3568-pwm9-m0.dtbo \
+	rk3568-pwm10-m0.dtbo \
+	rk3568-pwm11-m0.dtbo \
+	rk3568-pwm12-m0.dtbo \
+	rk3568-pwm13-m0.dtbo \
+	rk3568-pwm14-m0.dtbo \
+	rk3568-pwm15-m0.dtbo \
+	rk3568-spi2-m0-cs0-spidev.dtbo \
+	rk3568-spi2-m0-cs1-spidev.dtbo \
+	rk3568-uart3-m1.dtbo \
+	rk3568-uart4-m1.dtbo \
+	rk3568-uart5-m1.dtbo \
+	rk3568-uart7-m1.dtbo \
 	rk3588-can0-m0.dtbo \
 	rk3588-can1-m0.dtbo \
 	rk3588-can1-m1.dtbo \
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-i2c3-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-i2c3-m1.dts
new file mode 100644
index 0000000000000..787f44875ccc9
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-i2c3-m1.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&i2c3>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-0 = <&i2c3m1_xfer>;
+		};
+	};
+};
\ No newline at end of file
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-i2c5-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-i2c5-m0.dts
new file mode 100644
index 0000000000000..591f8f6bf4066
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-i2c5-m0.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&i2c5>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-0 = <&i2c5m0_xfer>;
+		};
+	};
+};
\ No newline at end of file
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm10-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm10-m0.dts
new file mode 100644
index 0000000000000..7eabf795fa1b1
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm10-m0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&pwm10>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "active";
+			pinctrl-0 = <&pwm10m0_pins>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm11-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm11-m0.dts
new file mode 100644
index 0000000000000..104538cf9702b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm11-m0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&pwm11>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "active";
+			pinctrl-0 = <&pwm11m0_pins>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm12-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm12-m0.dts
new file mode 100644
index 0000000000000..7fd21699e0501
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm12-m0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&pwm12>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "active";
+			pinctrl-0 = <&pwm12m0_pins>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm13-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm13-m0.dts
new file mode 100644
index 0000000000000..f15be795e2de8
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm13-m0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&pwm13>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "active";
+			pinctrl-0 = <&pwm13m0_pins>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm14-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm14-m0.dts
new file mode 100644
index 0000000000000..330406d939ad8
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm14-m0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&pwm14>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "active";
+			pinctrl-0 = <&pwm14m0_pins>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm15-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm15-m0.dts
new file mode 100644
index 0000000000000..c4af21ad8f3f7
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm15-m0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&pwm15>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "active";
+			pinctrl-0 = <&pwm15m0_pins>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm8-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm8-m0.dts
new file mode 100644
index 0000000000000..c455677b26922
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm8-m0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&pwm8>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "active";
+			pinctrl-0 = <&pwm8m0_pins>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm9-m0.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm9-m0.dts
new file mode 100644
index 0000000000000..b5357ed7f08f3
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-pwm9-m0.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&pwm9>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "active";
+			pinctrl-0 = <&pwm9m0_pins>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-spi2-m0-cs0-spidev.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-spi2-m0-cs0-spidev.dts
new file mode 100644
index 0000000000000..edfa222f64f3b
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-spi2-m0-cs0-spidev.dts
@@ -0,0 +1,23 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&spi2>;
+
+		__overlay__ {
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi2m0_cs0 &spi2m0_pins>;
+
+			spidev@1 {
+				compatible = "rockchip,spidev";
+				status = "okay";
+				reg = <1>;
+				spi-max-frequency = <50000000>;
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-spi2-m0-cs1-spidev.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-spi2-m0-cs1-spidev.dts
new file mode 100644
index 0000000000000..5be26fa0d5fcf
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-spi2-m0-cs1-spidev.dts
@@ -0,0 +1,23 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&spi2>;
+
+		__overlay__ {
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi2m0_cs1 &spi2m0_pins>;
+
+			spidev@1 {
+				compatible = "rockchip,spidev";
+				status = "okay";
+				reg = <1>;
+				spi-max-frequency = <50000000>;
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart3-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart3-m1.dts
new file mode 100644
index 0000000000000..cc5522c9cd3a7
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart3-m1.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&uart3>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-0 = <&uart3m1_xfer>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart4-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart4-m1.dts
new file mode 100644
index 0000000000000..3f69566753997
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart4-m1.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&uart4>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-0 = <&uart4m1_xfer>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart5-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart5-m1.dts
new file mode 100644
index 0000000000000..959cb9a8ffb73
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart5-m1.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&uart5>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-0 = <&uart5m1_xfer>;
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart7-m1.dts b/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart7-m1.dts
new file mode 100644
index 0000000000000..d6219867c33d2
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlay/rk3568-uart7-m1.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	fragment@0 {
+		target = <&uart7>;
+
+		__overlay__ {
+			status = "okay";
+			pinctrl-0 = <&uart7m1_xfer>;
+		};
+	};
+};