diff --git a/cmake/options.cmake b/cmake/options.cmake index 4d162a54..a3216a77 100644 --- a/cmake/options.cmake +++ b/cmake/options.cmake @@ -74,3 +74,12 @@ option (WITH_FUNC_LINE_LOG "Log with function name, line number prefix" OFF) option (WITH_DOC "Build with documentation" ON) set_property (GLOBAL PROPERTY "PROJECT_EC_FLAGS" -Wall -Werror -Wextra) + +if ("${PROJECT_MACHINE}" STREQUAL "zynqmp_a53" OR + "${PROJECT_MACHINE}" STREQUAL "zynqmp_a72" OR + "${PROJECT_MACHINE}" STREQUAL "zynqmp_a78" OR + "${PROJECT_MACHINE}" STREQUAL "zynqmp_r5" OR + "${PROJECT_MACHINE}" STREQUAL "microblaze_generic" OR + "${PROJECT_MACHINE}" STREQUAL "zynq7") + add_definitions( -DXLNX_PLATFORM ) +endif() diff --git a/lib/system/freertos/CMakeLists.txt b/lib/system/freertos/CMakeLists.txt index 1105e8fb..c4f56a46 100644 --- a/lib/system/freertos/CMakeLists.txt +++ b/lib/system/freertos/CMakeLists.txt @@ -21,3 +21,10 @@ if (EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${PROJECT_MACHINE}) add_subdirectory(${PROJECT_MACHINE}) endif (EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${PROJECT_MACHINE}) +if ("${PROJECT_MACHINE}" STREQUAL "zynqmp_a53" OR + "${PROJECT_MACHINE}" STREQUAL "zynqmp_a72" OR + "${PROJECT_MACHINE}" STREQUAL "zynqmp_a78" OR + "${PROJECT_MACHINE}" STREQUAL "zynqmp_r5" OR + "${PROJECT_MACHINE}" STREQUAL "zynq7") +add_subdirectory(xlnx) +endif() diff --git a/lib/system/freertos/sys.h b/lib/system/freertos/sys.h index 680e858c..d0d64b55 100644 --- a/lib/system/freertos/sys.h +++ b/lib/system/freertos/sys.h @@ -19,7 +19,11 @@ #include +#ifdef XLNX_PLATFORM +#include +#else #include "./@PROJECT_MACHINE@/sys.h" +#endif #ifdef __cplusplus extern "C" { diff --git a/lib/system/freertos/xlnx_common/CMakeLists.txt b/lib/system/freertos/xlnx/CMakeLists.txt similarity index 67% rename from lib/system/freertos/xlnx_common/CMakeLists.txt rename to lib/system/freertos/xlnx/CMakeLists.txt index 874901e9..704d85fc 100644 --- a/lib/system/freertos/xlnx_common/CMakeLists.txt +++ b/lib/system/freertos/xlnx/CMakeLists.txt @@ -1,4 +1,5 @@ collect (PROJECT_LIB_HEADERS sys.h) collect (PROJECT_LIB_SOURCES irq.c) +collect (PROJECT_LIB_SOURCES sys.c) diff --git a/lib/system/freertos/xlnx_common/irq.c b/lib/system/freertos/xlnx/irq.c similarity index 91% rename from lib/system/freertos/xlnx_common/irq.c rename to lib/system/freertos/xlnx/irq.c index 9f318614..4c35f06a 100644 --- a/lib/system/freertos/xlnx_common/irq.c +++ b/lib/system/freertos/xlnx/irq.c @@ -5,8 +5,8 @@ */ /* - * @file generic/xlnx_common/irq.c - * @brief generic libmetal Xilinx irq controller definitions. + * @file freertos/xlnx/irq.c + * @brief freertos libmetal Xilinx irq controller definitions. */ #include @@ -17,6 +17,7 @@ #include #include #include +#include #define MAX_IRQS XLNX_MAXIRQS diff --git a/lib/system/generic/zynqmp_r5/sys.c b/lib/system/freertos/xlnx/sys.c similarity index 75% rename from lib/system/generic/zynqmp_r5/sys.c rename to lib/system/freertos/xlnx/sys.c index 12aa1ab3..2f3ab7bf 100644 --- a/lib/system/generic/zynqmp_r5/sys.c +++ b/lib/system/freertos/xlnx/sys.c @@ -1,25 +1,40 @@ /* - * Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. + * Copyright (C) 2023, Advanced Micro Devices, Inc. * * SPDX-License-Identifier: BSD-3-Clause */ /* - * @file generic/zynqmp_r5/sys.c + * @file freertos/xlnx/sys.c * @brief machine specific system primitives implementation. */ #include #include #include +#include #include #include "xil_cache.h" #include "xil_exception.h" +#include "xscugic.h" #include "xil_mmu.h" + +#if (defined(__aarch64__) || defined(ARMA53_32)) && !defined(SDT) + +#ifdef VERSAL_NET +#include "xcpu_cortexa78.h" +#elif defined(versal) +#include "xcpu_cortexa72.h" +#else +#include "xreg_cortexa53.h" +#endif /* defined(versal) */ + +#elif defined(ARMR5) + #include "xil_mpu.h" #include "xreg_cortexr5.h" -#include "xscugic.h" + +#endif /* (defined(__aarch64__) || defined(ARMA53_32)) && !defined(SDT) */ void sys_irq_restore_enable(unsigned int flags) { @@ -60,10 +75,6 @@ void metal_weak metal_generic_default_poll(void) metal_asm volatile("wfi"); } -/** - * The code moved to cortexr5/xil_mpu.c:Xil_MemMap() - * NULL in pa masks possible Xil_MemMap() errors. - */ void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, size_t size, unsigned int flags) { diff --git a/lib/system/freertos/xlnx_common/sys.h b/lib/system/freertos/xlnx/sys.h similarity index 51% rename from lib/system/freertos/xlnx_common/sys.h rename to lib/system/freertos/xlnx/sys.h index 21f09550..065bf152 100644 --- a/lib/system/freertos/xlnx_common/sys.h +++ b/lib/system/freertos/xlnx/sys.h @@ -1,11 +1,12 @@ /* * Copyright (c) 2015, Xilinx Inc. and Contributors. All rights reserved. + * Copyright (c) 2023 Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ /* - * @file freertos/xlnx_common/sys.h + * @file freertos/xlnx/sys.h * @brief freertos Xilinx common system primitives for libmetal. */ @@ -13,13 +14,24 @@ #error "Include metal/sys.h instead of metal/freertos/@PROJECT_MACHINE@/sys.h" #endif -#ifndef __METAL_FREERTOS_XLNX_COMMON_SYS__H__ -#define __METAL_FREERTOS_XLNX_COMMON_SYS__H__ +#ifndef __METAL_FREERTOS_XLNX_SYS__H__ +#define __METAL_FREERTOS_XLNX_SYS__H__ + +#include "xscugic.h" +#include "FreeRTOS.h" #ifdef __cplusplus extern "C" { #endif +#if defined(SDT) && defined(PLATFORM_ZYNQ) +#define XPAR_SCUGIC_0_DIST_BASEADDR XPAR_SCUGIC_DIST_BASEADDR +#endif + +#ifndef XLNX_MAXIRQS +#define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS +#endif + /** * @brief metal_xlnx_irq_isr * @@ -40,8 +52,26 @@ void metal_xlnx_irq_isr(void *arg); */ int metal_xlnx_irq_init(void); +static inline void sys_irq_enable(unsigned int vector) +{ +#ifdef PLATFORM_ZYNQ + XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); +#else + vPortEnableInterrupt(vector); +#endif +} + +static inline void sys_irq_disable(unsigned int vector) +{ +#ifdef PLATFORM_ZYNQ + XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); +#else + vPortDisableInterrupt(vector); +#endif +} + #ifdef __cplusplus } #endif -#endif /* __METAL_FREERTOS_XLNX_COMMON_SYS__H__ */ +#endif /* __METAL_FREERTOS_XLNX_SYS__H__ */ diff --git a/lib/system/freertos/zynq7/CMakeLists.txt b/lib/system/freertos/zynq7/CMakeLists.txt deleted file mode 100644 index 097ecd8b..00000000 --- a/lib/system/freertos/zynq7/CMakeLists.txt +++ /dev/null @@ -1,5 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) - -collect (PROJECT_LIB_SOURCES sys.c) - -add_subdirectory(../xlnx_common ${CMAKE_CURRENT_BINARY_DIR}/../xlnx_common) diff --git a/lib/system/freertos/zynq7/sys.c b/lib/system/freertos/zynq7/sys.c deleted file mode 100644 index 3cff41c4..00000000 --- a/lib/system/freertos/zynq7/sys.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Copyright (c) 2014, Mentor Graphics Corporation - * Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file freertos/zynq7/sys.c - * @brief machine specific system primitives implementation. - */ - -#include -#include -#include -#include -#include "xil_cache.h" -#include "xil_exception.h" -#include "xil_mmu.h" -#include "xscugic.h" - -/* Translation table is 16K in size */ -#define ARM_AR_MEM_TTB_SIZE (16*1024) - -/* Each TTB descriptor covers a 1MB region */ -#define ARM_AR_MEM_TTB_SECT_SIZE (1024*1024) - -/* Mask off lower bits of addr */ -#define ARM_AR_MEM_TTB_SECT_SIZE_MASK (~(ARM_AR_MEM_TTB_SECT_SIZE-1UL)) - -void sys_irq_restore_enable(unsigned int flags) -{ - Xil_ExceptionEnableMask(~flags); -} - -unsigned int sys_irq_save_disable(void) -{ - unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL; - - if (state != XIL_EXCEPTION_ALL) { - Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL); - } - return state; -} - -void metal_machine_cache_flush(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheFlush(); - else - Xil_DCacheFlushRange((intptr_t)addr, len); -} - -void metal_machine_cache_invalidate(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheInvalidate(); - else - Xil_DCacheInvalidateRange((intptr_t)addr, len); -} - -/** - * @brief poll function until some event happens - */ -void metal_weak metal_generic_default_poll(void) -{ - metal_asm volatile("wfi"); -} - -void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, - size_t size, unsigned int flags) -{ - unsigned int section_offset; - unsigned int ttb_addr; - - if (!flags) - return va; - /* - * Ensure the virtual and physical addresses are aligned on a - * section boundary - */ - pa &= ARM_AR_MEM_TTB_SECT_SIZE_MASK; - - /* - * Loop through entire region of memory (one MMU section at a time). - * Each section requires a TTB entry. - */ - for (section_offset = 0; section_offset < size; - section_offset += ARM_AR_MEM_TTB_SECT_SIZE) { - - /* Calculate translation table entry for this memory section */ - ttb_addr = (pa + section_offset); - - /* Write translation table entry value to entry address */ - Xil_SetTlbAttributes(ttb_addr, flags); - } - - return va; -} diff --git a/lib/system/freertos/zynq7/sys.h b/lib/system/freertos/zynq7/sys.h deleted file mode 100644 index 51b08ed9..00000000 --- a/lib/system/freertos/zynq7/sys.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file freertos/zynq7/sys.h - * @brief freertos zynq7 system primitives for libmetal. - */ - -#ifndef __METAL_FREERTOS_SYS__H__ -#error "Include metal/sys.h instead of metal/freertos/@PROJECT_MACHINE@/sys.h" -#endif - -#include -#include "xscugic.h" - -#ifndef __METAL_FREERTOS_ZYNQ7_SYS__H__ -#define __METAL_FREERTOS_ZYNQ7_SYS__H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef METAL_INTERNAL - -#define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS - -static inline void sys_irq_enable(unsigned int vector) -{ - XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -static inline void sys_irq_disable(unsigned int vector) -{ - XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -#endif /* METAL_INTERNAL */ - -#ifdef __cplusplus -} -#endif - -#endif /* __METAL_FREERTOS_ZYNQ7_SYS__H__ */ diff --git a/lib/system/freertos/zynqmp_a53/CMakeLists.txt b/lib/system/freertos/zynqmp_a53/CMakeLists.txt deleted file mode 100644 index 097ecd8b..00000000 --- a/lib/system/freertos/zynqmp_a53/CMakeLists.txt +++ /dev/null @@ -1,5 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) - -collect (PROJECT_LIB_SOURCES sys.c) - -add_subdirectory(../xlnx_common ${CMAKE_CURRENT_BINARY_DIR}/../xlnx_common) diff --git a/lib/system/freertos/zynqmp_a53/sys.c b/lib/system/freertos/zynqmp_a53/sys.c deleted file mode 100644 index a09f922e..00000000 --- a/lib/system/freertos/zynqmp_a53/sys.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (c) 2017, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file freertos/zynqmp_a53/sys.c - * @brief machine specific system primitives implementation. - */ - -#include -#include -#include -#include -#include "xil_cache.h" -#include "xil_exception.h" -#include "xil_mmu.h" -#include "xreg_cortexa53.h" -#include "xscugic.h" - -#define MB (1024 * 1024UL) -#define GB (1024 * 1024 * 1024UL) - -void sys_irq_restore_enable(unsigned int flags) -{ - Xil_ExceptionEnableMask(~flags); -} - -unsigned int sys_irq_save_disable(void) -{ - unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL; - - if (state != XIL_EXCEPTION_ALL) { - Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL); - } - return state; -} - -void metal_machine_cache_flush(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheFlush(); - else - Xil_DCacheFlushRange((intptr_t)addr, len); -} - -void metal_machine_cache_invalidate(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheInvalidate(); - else - Xil_DCacheInvalidateRange((intptr_t)addr, len); -} - -/** - * @brief poll function until some event happens - */ -void metal_weak metal_generic_default_poll(void) -{ - metal_asm volatile("wfi"); -} - -void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, - size_t size, unsigned int flags) -{ - unsigned long section_offset; - unsigned long ttb_addr; -#if defined(__aarch64__) - unsigned long ttb_size = (pa < 4*GB) ? 2*MB : 1*GB; -#else - unsigned long ttb_size = 1*MB; -#endif - - if (!flags) - return va; - - /* Ensure alignment on a section boundary */ - pa &= ~(ttb_size-1UL); - - /* - * Loop through entire region of memory (one MMU section at a time). - * Each section requires a TTB entry. - */ - for (section_offset = 0; section_offset < size; ) { - /* Calculate translation table entry for this memory section */ - ttb_addr = (pa + section_offset); - - /* Write translation table entry value to entry address */ - Xil_SetTlbAttributes(ttb_addr, flags); - -#if defined(__aarch64__) - /* - * recalculate if we started below 4GB and going above in - * 64bit mode - */ - if (ttb_addr >= 4*GB) { - ttb_size = 1*GB; - } -#endif - section_offset += ttb_size; - } - - return va; -} diff --git a/lib/system/freertos/zynqmp_a53/sys.h b/lib/system/freertos/zynqmp_a53/sys.h deleted file mode 100644 index f2291d28..00000000 --- a/lib/system/freertos/zynqmp_a53/sys.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2017, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file freertos/zynqmp_a53/sys.h - * @brief freertos zynqmp_a53 system primitives for libmetal. - */ - -#ifndef __METAL_FREERTOS_SYS__H__ -#error "Include metal/sys.h instead of metal/freertos/@PROJECT_MACHINE@/sys.h" -#endif - -#include -#include "xscugic.h" - -#ifndef __METAL_FREERTOS_ZYNQMP_A53_SYS__H__ -#define __METAL_FREERTOS_ZYNQMP_A53_SYS__H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef METAL_INTERNAL - -#define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS - -static inline void sys_irq_enable(unsigned int vector) -{ - XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -static inline void sys_irq_disable(unsigned int vector) -{ - XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -#endif /* METAL_INTERNAL */ - -#ifdef __cplusplus -} -#endif - -#endif /* __METAL_FREERTOS_ZYNQMP_A53_SYS__H__ */ diff --git a/lib/system/freertos/zynqmp_r5/CMakeLists.txt b/lib/system/freertos/zynqmp_r5/CMakeLists.txt deleted file mode 100644 index 097ecd8b..00000000 --- a/lib/system/freertos/zynqmp_r5/CMakeLists.txt +++ /dev/null @@ -1,5 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) - -collect (PROJECT_LIB_SOURCES sys.c) - -add_subdirectory(../xlnx_common ${CMAKE_CURRENT_BINARY_DIR}/../xlnx_common) diff --git a/lib/system/freertos/zynqmp_r5/sys.h b/lib/system/freertos/zynqmp_r5/sys.h deleted file mode 100644 index 1fca6e16..00000000 --- a/lib/system/freertos/zynqmp_r5/sys.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file freertos/zynqmp_r5/sys.h - * @brief freertos zynqmp_r5 system primitives for libmetal. - */ - -#ifndef __METAL_FREERTOS_SYS__H__ -#error "Include metal/sys.h instead of metal/freertos/@PROJECT_MACHINE@/sys.h" -#endif - -#include -#include "xscugic.h" - -#ifndef __METAL_FREERTOS_ZYNQMP_R5_SYS__H__ -#define __METAL_FREERTOS_ZYNQMP_R5_SYS__H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef METAL_INTERNAL - -#define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS - -static inline void sys_irq_enable(unsigned int vector) -{ - XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -static inline void sys_irq_disable(unsigned int vector) -{ - XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -#endif /* METAL_INTERNAL */ - -#ifdef __cplusplus -} -#endif - -#endif /* __METAL_FREERTOS_ZYNQMP_R5_SYS__H__ */ diff --git a/lib/system/generic/CMakeLists.txt b/lib/system/generic/CMakeLists.txt index 1105e8fb..9427635b 100644 --- a/lib/system/generic/CMakeLists.txt +++ b/lib/system/generic/CMakeLists.txt @@ -17,7 +17,14 @@ collect (PROJECT_LIB_SOURCES irq.c) collect (PROJECT_LIB_SOURCES shmem.c) collect (PROJECT_LIB_SOURCES time.c) -if (EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${PROJECT_MACHINE}) +if ("${PROJECT_MACHINE}" STREQUAL "zynqmp_a53" OR + "${PROJECT_MACHINE}" STREQUAL "zynqmp_a72" OR + "${PROJECT_MACHINE}" STREQUAL "zynqmp_a78" OR + "${PROJECT_MACHINE}" STREQUAL "zynqmp_r5" OR + "${PROJECT_MACHINE}" STREQUAL "microblaze_generic" OR + "${PROJECT_MACHINE}" STREQUAL "zynq7") + add_subdirectory(xlnx) +elseif(EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${PROJECT_MACHINE}) add_subdirectory(${PROJECT_MACHINE}) -endif (EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/${PROJECT_MACHINE}) +endif() diff --git a/lib/system/generic/microblaze_generic/sys.h b/lib/system/generic/microblaze_generic/sys.h deleted file mode 100644 index 538917ec..00000000 --- a/lib/system/generic/microblaze_generic/sys.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (c) 2017, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/microblaze_generic/sys.h - * @brief generic microblaze system primitives for libmetal. - */ - -#ifndef __METAL_GENERIC_SYS__H__ -#error "Include metal/sys.h instead of metal/generic/@PROJECT_MACHINE@/sys.h" -#endif - -#include - -#ifndef __METAL_GENERIC_MICROBLAZE_SYS__H__ -#define __METAL_GENERIC_MICROBLAZE_SYS__H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef METAL_INTERNAL - -#ifndef XLNX_MAXIRQS -#define XLNX_MAXIRQS 32 -#endif - -void metal_weak sys_irq_enable(unsigned int vector); - -void metal_weak sys_irq_disable(unsigned int vector); - -#endif /* METAL_INTERNAL */ - -#ifdef __cplusplus -} -#endif - -#endif /* __METAL_GENERIC_MICROBLAZE_SYS__H__ */ diff --git a/lib/system/generic/sys.h b/lib/system/generic/sys.h index a5054234..64d4334e 100644 --- a/lib/system/generic/sys.h +++ b/lib/system/generic/sys.h @@ -23,7 +23,11 @@ #include #include +#ifdef XLNX_PLATFORM +#include +#else #include "./@PROJECT_MACHINE@/sys.h" +#endif #ifdef __cplusplus extern "C" { diff --git a/lib/system/generic/xlnx/CMakeLists.txt b/lib/system/generic/xlnx/CMakeLists.txt new file mode 100644 index 00000000..4f595bdd --- /dev/null +++ b/lib/system/generic/xlnx/CMakeLists.txt @@ -0,0 +1,11 @@ +if ("${PROJECT_MACHINE}" STREQUAL "microblaze_generic") + add_subdirectory(microblaze_generic) +else() + collect (PROJECT_LIB_SOURCES sys.c) +endif() + +collect (PROJECT_LIB_HEADERS sys.h) + +collect (PROJECT_LIB_SOURCES irq.c) + +# vim: expandtab:ts=2:sw=2:smartindent diff --git a/lib/system/generic/xlnx_common/irq.c b/lib/system/generic/xlnx/irq.c similarity index 92% rename from lib/system/generic/xlnx_common/irq.c rename to lib/system/generic/xlnx/irq.c index 82749d36..356993a3 100644 --- a/lib/system/generic/xlnx_common/irq.c +++ b/lib/system/generic/xlnx/irq.c @@ -5,20 +5,24 @@ */ /* - * @file generic/xlnx_common/irq.c + * @file generic/xlnx/irq.c * @brief generic libmetal Xilinx irq controller definitions. */ #include #include -#include #include #include #include -#include #include +#include +#include +#ifdef __MICROBLAZE__ +#define MAX_IRQS 32 +#else #define MAX_IRQS XLNX_MAXIRQS +#endif static struct metal_irq irqs[MAX_IRQS]; /**< Linux IRQs array */ diff --git a/lib/system/generic/microblaze_generic/CMakeLists.txt b/lib/system/generic/xlnx/microblaze_generic/CMakeLists.txt similarity index 54% rename from lib/system/generic/microblaze_generic/CMakeLists.txt rename to lib/system/generic/xlnx/microblaze_generic/CMakeLists.txt index 5556b3dd..621e12c5 100644 --- a/lib/system/generic/microblaze_generic/CMakeLists.txt +++ b/lib/system/generic/xlnx/microblaze_generic/CMakeLists.txt @@ -1,10 +1,6 @@ -collect (PROJECT_LIB_HEADERS sys.h) - collect (PROJECT_LIB_SOURCES sys.c) check_include_files(xintc.h HAS_XINTC) if (HAS_XINTC) add_definitions(-DHAS_XINTC) endif(HAS_XINTC) - -add_subdirectory(../xlnx_common ${CMAKE_CURRENT_BINARY_DIR}/../xlnx_common) diff --git a/lib/system/generic/microblaze_generic/sys.c b/lib/system/generic/xlnx/microblaze_generic/sys.c similarity index 93% rename from lib/system/generic/microblaze_generic/sys.c rename to lib/system/generic/xlnx/microblaze_generic/sys.c index 4cef5f25..7d18bcf9 100644 --- a/lib/system/generic/microblaze_generic/sys.c +++ b/lib/system/generic/xlnx/microblaze_generic/sys.c @@ -5,19 +5,15 @@ */ /* - * @file generic/microblaze_generic/sys.c + * @file generic/xlnx/microblaze_generic/sys.c * @brief machine specific system primitives implementation. */ -#include -#include #include -#include -#include -#include +#include + #ifdef HAS_XINTC #include -#include #endif /* HAS_XINTC */ #define MSR_IE 0x2UL /* MicroBlaze status register interrupt enable mask */ diff --git a/lib/system/freertos/zynqmp_r5/sys.c b/lib/system/generic/xlnx/sys.c similarity index 64% rename from lib/system/freertos/zynqmp_r5/sys.c rename to lib/system/generic/xlnx/sys.c index 67405bb7..e4669897 100644 --- a/lib/system/freertos/zynqmp_r5/sys.c +++ b/lib/system/generic/xlnx/sys.c @@ -1,25 +1,37 @@ /* - * Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. + * Copyright (c) 2022, Xilinx Inc. and Contributors. All rights reserved. + * Copyright (c) 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. * * SPDX-License-Identifier: BSD-3-Clause */ /* - * @file freertos/zynqmp_r5/sys.c + * @file generic/xlnx/sys.c * @brief machine specific system primitives implementation. */ -#include -#include #include -#include -#include "xil_cache.h" -#include "xil_exception.h" +#include + #include "xil_mmu.h" + +/* System Device Tree (SDT) flow does not have the files generated. */ +#if (defined(__aarch64__) || defined(ARMA53_32)) && !defined(SDT) + +#ifdef VERSAL_NET +#include "xcpu_cortexa78.h" +#elif defined(versal) +#include "xcpu_cortexa72.h" +#else +#include "xreg_cortexa53.h" +#endif /* defined(versal) */ + +#elif defined(ARMR5) + #include "xil_mpu.h" #include "xreg_cortexr5.h" -#include "xscugic.h" + +#endif /* (defined(__aarch64__) || defined(ARMA53_32)) && !defined(SDT) */ void sys_irq_restore_enable(unsigned int flags) { @@ -30,9 +42,9 @@ unsigned int sys_irq_save_disable(void) { unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL; - if (state != XIL_EXCEPTION_ALL) { + if (state != XIL_EXCEPTION_ALL) Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL); - } + return state; } @@ -60,10 +72,6 @@ void metal_weak metal_generic_default_poll(void) metal_asm volatile("wfi"); } -/** - * The code moved to cortexr5/xil_mpu.c:Xil_MemMap() - * NULL in pa masks possible Xil_MemMap() errors. - */ void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, size_t size, unsigned int flags) { diff --git a/lib/system/generic/xlnx/sys.h b/lib/system/generic/xlnx/sys.h new file mode 100644 index 00000000..c144c3ee --- /dev/null +++ b/lib/system/generic/xlnx/sys.h @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2015, Xilinx Inc. and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/* + * @file generic/xlnx/sys.h + * @brief generic xlnx system primitives for libmetal. + */ + +#ifndef __METAL_GENERIC_SYS__H__ +#error "Include metal/sys.h instead of metal/generic/@PROJECT_MACHINE@/sys.h" +#endif + +#ifndef __MICROBLAZE__ +#include "xscugic.h" +#endif + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#ifndef __METAL_GENERIC_XLNX_SYS__H__ +#define __METAL_GENERIC_XLNX_SYS__H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef __MICROBLAZE__ +#define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS +#endif + +#if defined(SDT) && !defined(__MICROBLAZE__) +#define XPAR_SCUGIC_0_DIST_BASEADDR XPAR_SCUGIC_DIST_BASEADDR +#endif + +/** + * @brief metal_xlnx_irq_isr + * + * Xilinx interrupt ISR can be registered to the Xilinx embeddedsw + * IRQ controller driver. + * + * @param[in] arg input argument, interrupt vector id. + */ +void metal_xlnx_irq_isr(void *arg); + +/** + * @brief metal_xlnx_irq_int + * + * Xilinx interrupt controller initialization. It will initialize + * the metal Xilinx IRQ controller data structure. + * + * @return 0 for success, or negative value for failure + */ +int metal_xlnx_irq_init(void); + +/* Microblaze defines these routines */ +#ifdef __MICROBLAZE__ +void metal_weak sys_irq_enable(unsigned int vector); + +void metal_weak sys_irq_disable(unsigned int vector); +#else +static inline void sys_irq_enable(unsigned int vector) +{ + XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); +} + +static inline void sys_irq_disable(unsigned int vector) +{ + XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); +} +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __METAL_GENERIC_XLNX_SYS__H__ */ diff --git a/lib/system/generic/xlnx_common/CMakeLists.txt b/lib/system/generic/xlnx_common/CMakeLists.txt deleted file mode 100644 index eeec01c8..00000000 --- a/lib/system/generic/xlnx_common/CMakeLists.txt +++ /dev/null @@ -1,7 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) - -collect (PROJECT_LIB_SOURCES irq.c) - -if ("${PROJECT_MACHINE}" STREQUAL "zynqmp_a53" OR "${PROJECT_MACHINE}" STREQUAL "zynqmp_a72") - add_subdirectory(zynqmp_aarch64) -endif ("${PROJECT_MACHINE}" STREQUAL "zynqmp_a53" OR "${PROJECT_MACHINE}" STREQUAL "zynqmp_a72") diff --git a/lib/system/generic/xlnx_common/sys.h b/lib/system/generic/xlnx_common/sys.h deleted file mode 100644 index 7d41cfae..00000000 --- a/lib/system/generic/xlnx_common/sys.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2015, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/xlnx_common/sys.h - * @brief generic xlnx_common system primitives for libmetal. - */ - -#ifndef __METAL_GENERIC_SYS__H__ -#error "Include metal/sys.h instead of metal/generic/@PROJECT_MACHINE@/sys.h" -#endif - -#ifndef __METAL_GENERIC_XLNX_COMMON_SYS__H__ -#define __METAL_GENERIC_XLNX_COMMON_SYS__H__ - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief metal_xlnx_irq_isr - * - * Xilinx interrupt ISR can be registered to the Xilinx embeddedsw - * IRQ controller driver. - * - * @param[in] arg input argument, interrupt vector id. - */ -void metal_xlnx_irq_isr(void *arg); - -/** - * @brief metal_xlnx_irq_int - * - * Xilinx interrupt controller initialization. It will initialize - * the metal Xilinx IRQ controller data structure. - * - * @return 0 for success, or negative value for failure - */ -int metal_xlnx_irq_init(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __METAL_GENERIC_XLNX_COMMON_SYS__H__ */ diff --git a/lib/system/generic/xlnx_common/zynqmp_aarch64/CMakeLists.txt b/lib/system/generic/xlnx_common/zynqmp_aarch64/CMakeLists.txt deleted file mode 100644 index efe7e543..00000000 --- a/lib/system/generic/xlnx_common/zynqmp_aarch64/CMakeLists.txt +++ /dev/null @@ -1,2 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) -collect (PROJECT_LIB_SOURCES sys.c) diff --git a/lib/system/generic/xlnx_common/zynqmp_aarch64/sys.c b/lib/system/generic/xlnx_common/zynqmp_aarch64/sys.c deleted file mode 100644 index 1de54b18..00000000 --- a/lib/system/generic/xlnx_common/zynqmp_aarch64/sys.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright (c) 2022, Xilinx Inc. and Contributors. All rights reserved. - * Copyright (c) 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/xlnx_common/zynqmp_aarch64/sys.c - * @brief machine specific system primitives implementation. - */ - -#include -#include -#include -#include -#include "xil_cache.h" -#include "xil_exception.h" -#include "xil_mmu.h" -#include "xscugic.h" - -#ifdef VERSAL_NET -#include "xcpu_cortexa78.h" -#elif defined(versal) -#include "xcpu_cortexa72.h" -#else -#include "xreg_cortexa53.h" -#endif /* defined(versal) */ - -void sys_irq_restore_enable(unsigned int flags) -{ - Xil_ExceptionEnableMask(~flags); -} - -unsigned int sys_irq_save_disable(void) -{ - unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL; - - if (state != XIL_EXCEPTION_ALL) - Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL); - - return state; -} - -void metal_machine_cache_flush(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheFlush(); - else - Xil_DCacheFlushRange((intptr_t)addr, len); -} - -void metal_machine_cache_invalidate(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheInvalidate(); - else - Xil_DCacheInvalidateRange((intptr_t)addr, len); -} - -/** - * @brief poll function until some event happens - */ -void metal_weak metal_generic_default_poll(void) -{ - metal_asm volatile("wfi"); -} - -void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, - size_t size, unsigned int flags) -{ - unsigned long section_offset; - unsigned long ttb_addr; -#if defined(__aarch64__) - unsigned long ttb_size = (pa < 4 * GB) ? 2 * MB : 1 * GB; -#else - unsigned long ttb_size = 1 * MB; -#endif /* defined(__aarch64__) */ - - if (!flags) - return va; - - /* Ensure alignment on a section boundary */ - pa &= ~(ttb_size - 1UL); - - /* - * Loop through entire region of memory (one MMU section at a time). - * Each section requires a TTB entry. - */ - for (section_offset = 0; section_offset < size; ) { - /* Calculate translation table entry for this memory section */ - ttb_addr = (pa + section_offset); - - /* Write translation table entry value to entry address */ - Xil_SetTlbAttributes(ttb_addr, flags); - -#if defined(__aarch64__) - /* - * recalculate if we started below 4GB and going above in - * 64bit mode - */ - if (ttb_addr >= 4 * GB) - ttb_size = 1 * GB; -#endif - section_offset += ttb_size; - } - - return va; -} diff --git a/lib/system/generic/xlnx_common/zynqmp_aarch64/sys.h b/lib/system/generic/xlnx_common/zynqmp_aarch64/sys.h deleted file mode 100644 index f9fb1493..00000000 --- a/lib/system/generic/xlnx_common/zynqmp_aarch64/sys.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2022, Xilinx Inc. and Contributors. All rights reserved. - * Copyright (c) 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/xlnx_common/zynqmp_aarch64/sys.h - * @brief generic zynqmp_aarch64 system primitives for libmetal. - */ - -#ifndef __METAL_GENERIC_SYS__H__ -#error "Include metal/sys.h instead of metal/generic/@PROJECT_MACHINE@/sys.h" -#endif - -#include -#include "xscugic.h" - -#ifndef __METAL_GENERIC_ZYNQMP_XLNX_COMMON_AARCH64_SYS__H__ -#define __METAL_GENERIC_ZYNQMP_XLNX_COMMON_AARCH64_SYS__H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef METAL_INTERNAL - -#define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS - -static inline void sys_irq_enable(unsigned int vector) -{ - XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -static inline void sys_irq_disable(unsigned int vector) -{ - XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -#endif /* METAL_INTERNAL */ - -#ifdef __cplusplus -} -#endif - -#endif /* __METAL_GENERIC_ZYNQMP_XLNX_COMMON_AARCH64_SYS__H__ */ diff --git a/lib/system/generic/zynq7/CMakeLists.txt b/lib/system/generic/zynq7/CMakeLists.txt deleted file mode 100644 index 097ecd8b..00000000 --- a/lib/system/generic/zynq7/CMakeLists.txt +++ /dev/null @@ -1,5 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) - -collect (PROJECT_LIB_SOURCES sys.c) - -add_subdirectory(../xlnx_common ${CMAKE_CURRENT_BINARY_DIR}/../xlnx_common) diff --git a/lib/system/generic/zynq7/sys.c b/lib/system/generic/zynq7/sys.c deleted file mode 100644 index 338be251..00000000 --- a/lib/system/generic/zynq7/sys.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (c) 2014, Mentor Graphics Corporation - * Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/zynq7/sys.c - * @brief machine specific system primitives implementation. - */ - -#include -#include -#include -#include -#include "xil_cache.h" -#include "xil_mmu.h" -#include "xil_exception.h" -#include "xscugic.h" - -/* Each TTB descriptor covers a 1MB region */ -#define ARM_AR_MEM_TTB_SECT_SIZE (1024*1024) - -/* Mask off lower bits of addr */ -#define ARM_AR_MEM_TTB_SECT_SIZE_MASK (~(ARM_AR_MEM_TTB_SECT_SIZE-1UL)) - -void sys_irq_restore_enable(unsigned int flags) -{ - Xil_ExceptionEnableMask(~flags); -} - -unsigned int sys_irq_save_disable(void) -{ - unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL; - - if (state != XIL_EXCEPTION_ALL) { - Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL); - } - return state; -} - -void metal_machine_cache_flush(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheFlush(); - else - Xil_DCacheFlushRange((intptr_t)addr, len); -} - -void metal_machine_cache_invalidate(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheInvalidate(); - else - Xil_DCacheInvalidateRange((intptr_t)addr, len); -} - -/** - * @brief poll function until some event happens - */ -void metal_weak metal_generic_default_poll(void) -{ - metal_asm volatile("wfi"); -} - -void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, - size_t size, unsigned int flags) -{ - unsigned int section_offset; - unsigned int ttb_addr; - - if (!flags) - return va; - /* - * Ensure the virtual and physical addresses are aligned on a - * section boundary - */ - pa &= ARM_AR_MEM_TTB_SECT_SIZE_MASK; - - /* - * Loop through entire region of memory (one MMU section at a time). - * Each section requires a TTB entry. - */ - for (section_offset = 0; section_offset < size; - section_offset += ARM_AR_MEM_TTB_SECT_SIZE) { - - /* Calculate translation table entry for this memory section */ - ttb_addr = (pa + section_offset); - - /* Write translation table entry value to entry address */ - Xil_SetTlbAttributes(ttb_addr, flags); - } - - return va; -} diff --git a/lib/system/generic/zynq7/sys.h b/lib/system/generic/zynq7/sys.h deleted file mode 100644 index 481a05c1..00000000 --- a/lib/system/generic/zynq7/sys.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2015, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/zynq7/sys.h - * @brief generic zynq7 system primitives for libmetal. - */ - -#ifndef __METAL_GENERIC_SYS__H__ -#error "Include metal/sys.h instead of metal/generic/@PROJECT_MACHINE@/sys.h" -#endif - -#include -#include "xscugic.h" - -#ifndef __METAL_GENERIC_ZYNQ7_SYS__H__ -#define __METAL_GENERIC_ZYNQ7_SYS__H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef METAL_INTERNAL - -#define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS - -static inline void sys_irq_enable(unsigned int vector) -{ - XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -static inline void sys_irq_disable(unsigned int vector) -{ - XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -#endif /* METAL_INTERNAL */ - -#ifdef __cplusplus -} -#endif - -#endif /* __METAL_GENERIC_ZYNQ7_SYS__H__ */ diff --git a/lib/system/generic/zynqmp_a53/CMakeLists.txt b/lib/system/generic/zynqmp_a53/CMakeLists.txt deleted file mode 100644 index a9e14b61..00000000 --- a/lib/system/generic/zynqmp_a53/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) - -add_subdirectory(../xlnx_common ${CMAKE_CURRENT_BINARY_DIR}/../xlnx_common) diff --git a/lib/system/generic/zynqmp_a53/sys.c b/lib/system/generic/zynqmp_a53/sys.c deleted file mode 100644 index 1a244ed4..00000000 --- a/lib/system/generic/zynqmp_a53/sys.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (c) 2016, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/zynqmp_a53/sys.c - * @brief machine specific system primitives implementation. - */ - -#include -#include -#include -#include -#include "xil_cache.h" -#include "xil_exception.h" -#include "xil_mmu.h" -#include "xreg_cortexa53.h" -#include "xscugic.h" - -#define MB (1024 * 1024UL) -#define GB (1024 * 1024 * 1024UL) - -void sys_irq_restore_enable(unsigned int flags) -{ - Xil_ExceptionEnableMask(~flags); -} - -unsigned int sys_irq_save_disable(void) -{ - unsigned int state = mfcpsr() & XIL_EXCEPTION_ALL; - - if (state != XIL_EXCEPTION_ALL) { - Xil_ExceptionDisableMask(XIL_EXCEPTION_ALL); - } - return state; -} - -void metal_machine_cache_flush(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheFlush(); - else - Xil_DCacheFlushRange((intptr_t)addr, len); -} - -void metal_machine_cache_invalidate(void *addr, unsigned int len) -{ - if (!addr && !len) - Xil_DCacheInvalidate(); - else - Xil_DCacheInvalidateRange((intptr_t)addr, len); -} - -/** - * @brief poll function until some event happens - */ -void metal_weak metal_generic_default_poll(void) -{ - metal_asm volatile("wfi"); -} - -void *metal_machine_io_mem_map(void *va, metal_phys_addr_t pa, - size_t size, unsigned int flags) -{ - unsigned long section_offset; - unsigned long ttb_addr; -#if defined(__aarch64__) - unsigned long ttb_size = (pa < 4*GB) ? 2*MB : 1*GB; -#else - unsigned long ttb_size = 1*MB; -#endif - - if (!flags) - return va; - - /* Ensure alignment on a section boundary */ - pa &= ~(ttb_size-1UL); - - /* - * Loop through entire region of memory (one MMU section at a time). - * Each section requires a TTB entry. - */ - for (section_offset = 0; section_offset < size; ) { - /* Calculate translation table entry for this memory section */ - ttb_addr = (pa + section_offset); - - /* Write translation table entry value to entry address */ - Xil_SetTlbAttributes(ttb_addr, flags); - -#if defined(__aarch64__) - /* - * recalculate if we started below 4GB and going above in - * 64bit mode - */ - if (ttb_addr >= 4*GB) { - ttb_size = 1*GB; - } -#endif - section_offset += ttb_size; - } - - return va; -} diff --git a/lib/system/generic/zynqmp_a53/sys.h b/lib/system/generic/zynqmp_a53/sys.h deleted file mode 100644 index 2c29d332..00000000 --- a/lib/system/generic/zynqmp_a53/sys.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (c) 2015, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/zynqmp_a53/sys.h - * @brief generic zynqmp_a53 system primitives for libmetal. - */ - -/* - * The header file is still required as generic/sys.h expects - * "./@PROJECT_MACHINE@/sys.h" to still exist. - */ -#include diff --git a/lib/system/generic/zynqmp_a72/CMakeLists.txt b/lib/system/generic/zynqmp_a72/CMakeLists.txt deleted file mode 100644 index a9e14b61..00000000 --- a/lib/system/generic/zynqmp_a72/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) - -add_subdirectory(../xlnx_common ${CMAKE_CURRENT_BINARY_DIR}/../xlnx_common) diff --git a/lib/system/generic/zynqmp_a72/sys.h b/lib/system/generic/zynqmp_a72/sys.h deleted file mode 100644 index f13d33d8..00000000 --- a/lib/system/generic/zynqmp_a72/sys.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (c) 2022, Xilinx Inc. and Contributors. All rights reserved. - * Copyright (c) 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/zynqmp_a72/sys.h - * @brief generic zynqmp_a72 system primitives for libmetal. - */ - -/* - * The header file is still required as generic/sys.h expects - * "./@PROJECT_MACHINE@/sys.h" to still exist. - */ -#include diff --git a/lib/system/generic/zynqmp_a78/CMakeLists.txt b/lib/system/generic/zynqmp_a78/CMakeLists.txt deleted file mode 100644 index a9e14b61..00000000 --- a/lib/system/generic/zynqmp_a78/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) - -add_subdirectory(../xlnx_common ${CMAKE_CURRENT_BINARY_DIR}/../xlnx_common) diff --git a/lib/system/generic/zynqmp_a78/sys.h b/lib/system/generic/zynqmp_a78/sys.h deleted file mode 100644 index 9f07521d..00000000 --- a/lib/system/generic/zynqmp_a78/sys.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (c) 2022, Xilinx Inc. and Contributors. All rights reserved. - * Copyright (c) 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/zynqmp_a78/sys.h - * @brief generic zynqmp_a78 system primitives for libmetal. - */ - -/* - * The header file is still required as generic/sys.h expects - * "./@PROJECT_MACHINE@/sys.h" to still exist. - */ -#include diff --git a/lib/system/generic/zynqmp_r5/CMakeLists.txt b/lib/system/generic/zynqmp_r5/CMakeLists.txt deleted file mode 100644 index 097ecd8b..00000000 --- a/lib/system/generic/zynqmp_r5/CMakeLists.txt +++ /dev/null @@ -1,5 +0,0 @@ -collect (PROJECT_LIB_HEADERS sys.h) - -collect (PROJECT_LIB_SOURCES sys.c) - -add_subdirectory(../xlnx_common ${CMAKE_CURRENT_BINARY_DIR}/../xlnx_common) diff --git a/lib/system/generic/zynqmp_r5/sys.h b/lib/system/generic/zynqmp_r5/sys.h deleted file mode 100644 index ad37485f..00000000 --- a/lib/system/generic/zynqmp_r5/sys.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2015, Xilinx Inc. and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* - * @file generic/zynqmp_r5/sys.h - * @brief generic zynqmp_r5 system primitives for libmetal. - */ - -#ifndef __METAL_GENERIC_SYS__H__ -#error "Include metal/sys.h instead of metal/system/generic/@PROJECT_MACHINE@/sys.h" -#endif - -#include -#include "xscugic.h" - -#ifndef __METAL_GENERIC_ZYNQMP_R5_SYS__H__ -#define __METAL_GENERIC_ZYNQMP_R5_SYS__H__ - -#ifdef __cplusplus -extern "C" { -#endif - -#ifdef METAL_INTERNAL - -#define XLNX_MAXIRQS XSCUGIC_MAX_NUM_INTR_INPUTS - -static inline void sys_irq_enable(unsigned int vector) -{ - XScuGic_EnableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -static inline void sys_irq_disable(unsigned int vector) -{ - XScuGic_DisableIntr(XPAR_SCUGIC_0_DIST_BASEADDR, vector); -} - -#endif /* METAL_INTERNAL */ - -#ifdef __cplusplus -} -#endif - -#endif /* __METAL_GENERIC_ZYNQMP_R5_SYS__H__ */