From cb2ef403b6c12c2fa63faaf8645dfc77c2b1798b Mon Sep 17 00:00:00 2001 From: Pat Bernardi Date: Tue, 11 Jun 2024 15:04:40 -0400 Subject: [PATCH] Add MiV-RV32IMAF runtime The existing Microsemi cortex-m1 runtime has also been refactored to make sharing the common components between the MiV-RV32IMAF and Microsemi cortex-m1 runtime easier. Support for mixed Ada/C++ programs has also been included for the MiV-RV32IMAF runtime. Issue: eng/toolchain/bb-runtimes#50 --- arm/cortex-m1/microsemi/s-bbbopa.ads | 6 +- arm/cortexm.py | 6 +- .../svd => src}/i-microsemi-coreuartapb.ads | 0 build_rts.py | 7 +- riscv/__init__.py | 85 ++++++ riscv/microchip/miv_rv32imaf/README | 117 +++++++++ riscv/microchip/miv_rv32imaf/a-intnam.ads | 61 +++++ riscv/microchip/miv_rv32imaf/common-RAM.ld | 228 ++++++++++++++++ riscv/microchip/miv_rv32imaf/memory-map.ld | 41 +++ riscv/microchip/miv_rv32imaf/s-bbmcpa.ads | 43 +++ riscv/microchip/miv_rv32imaf/s-bbripl.adb | 248 ++++++++++++++++++ riscv/microchip/miv_rv32imaf/start-ram.S | 70 +++++ src/i-microsemi-coreuartapb.ads | 171 ++++++++++++ .../microsemi/svd => src}/i-microsemi.ads | 9 - src/s-bbbopa__miv.ads | 86 ++++++ src/s-bbcpsp__riscv.adb | 7 +- .../s-textio__coreuartapb.adb | 4 +- .../system-xi-riscv-one-irq-prio-full.ads | 170 ++++++++++++ ...em-xi-riscv-one-irq-prio-light-tasking.ads | 179 +++++++++++++ 19 files changed, 1517 insertions(+), 21 deletions(-) rename arm/{cortex-m1/microsemi/svd => src}/i-microsemi-coreuartapb.ads (100%) create mode 100644 riscv/microchip/miv_rv32imaf/README create mode 100644 riscv/microchip/miv_rv32imaf/a-intnam.ads create mode 100644 riscv/microchip/miv_rv32imaf/common-RAM.ld create mode 100644 riscv/microchip/miv_rv32imaf/memory-map.ld create mode 100644 riscv/microchip/miv_rv32imaf/s-bbmcpa.ads create mode 100644 riscv/microchip/miv_rv32imaf/s-bbripl.adb create mode 100644 riscv/microchip/miv_rv32imaf/start-ram.S create mode 100644 src/i-microsemi-coreuartapb.ads rename {arm/cortex-m1/microsemi/svd => src}/i-microsemi.ads (91%) create mode 100644 src/s-bbbopa__miv.ads rename arm/cortex-m1/microsemi/s-textio.adb => src/s-textio__coreuartapb.adb (96%) create mode 100644 src/system/system-xi-riscv-one-irq-prio-full.ads create mode 100644 src/system/system-xi-riscv-one-irq-prio-light-tasking.ads diff --git a/arm/cortex-m1/microsemi/s-bbbopa.ads b/arm/cortex-m1/microsemi/s-bbbopa.ads index 2eb0bc63..48f0634c 100644 --- a/arm/cortex-m1/microsemi/s-bbbopa.ads +++ b/arm/cortex-m1/microsemi/s-bbbopa.ads @@ -40,6 +40,10 @@ package System.BB.Board_Parameters is -- Hardware clock -- -------------------- - Clock_Frequency : constant := 50_000_000; + System_Clock : constant := 50_000_000; + -- Clock provided to the soft core + Clock_Frequency : constant := System_Clock; + + UART_Base_Address : constant := 16#42000000#; end System.BB.Board_Parameters; diff --git a/arm/cortexm.py b/arm/cortexm.py index 81b4cd5d..83f1ba2b 100644 --- a/arm/cortexm.py +++ b/arm/cortexm.py @@ -618,9 +618,9 @@ def __init__(self): self.add_gnat_sources( "arm/cortex-m1/microsemi/s-bbbopa.ads", "arm/cortex-m1/microsemi/s-bbmcpa.ads", - "arm/cortex-m1/microsemi/s-textio.adb", - "arm/cortex-m1/microsemi/svd/i-microsemi.ads", - "arm/cortex-m1/microsemi/svd/i-microsemi-coreuartapb.ads", + "src/s-textio__coreuartapb.adb", + "src/i-microsemi-coreuartapb.ads", + "src/i-microsemi.ads", ) self.add_gnarl_sources("arm/cortex-m1/microsemi/a-intnam.ads") diff --git a/arm/cortex-m1/microsemi/svd/i-microsemi-coreuartapb.ads b/arm/src/i-microsemi-coreuartapb.ads similarity index 100% rename from arm/cortex-m1/microsemi/svd/i-microsemi-coreuartapb.ads rename to arm/src/i-microsemi-coreuartapb.ads diff --git a/build_rts.py b/build_rts.py index 9f088ced..32a8f870 100755 --- a/build_rts.py +++ b/build_rts.py @@ -59,9 +59,10 @@ # riscv from riscv import ( - Spike, - PolarFireSOC, HiFive1, + MIV_RV32IMAF, + PolarFireSOC, + Spike, RV32I, RV32IM, RV32IAC, @@ -249,6 +250,8 @@ def build_configs(target): t = Spike() elif target == "hifive1": t = HiFive1() + elif target == "miv_rv32imaf": + t = MIV_RV32IMAF() elif target == "polarfiresoc": t = PolarFireSOC() elif target == "rv32i": diff --git a/riscv/__init__.py b/riscv/__init__.py index f1567890..43f7c932 100644 --- a/riscv/__init__.py +++ b/riscv/__init__.py @@ -157,6 +157,19 @@ def target(self): def has_timer_64(self): return True + def dump_runtime_xml(self, rts_name, rts): + cnt = super(RiscV32, self).dump_runtime_xml(rts_name, rts) + if rts_name == "embedded": + cnt = cnt.replace( + '"-nostartfiles"', '"--specs=${RUNTIME_DIR(ada)}/link-zcx.spec"' + ) + return cnt + + def amend_rts(self, rts_profile, conf): + super(DFBBTarget, self).amend_rts(rts_profile, conf) + if rts_profile == "embedded": + conf.config_files.update({"link-zcx.spec": readfile("riscv/link-zcx.spec")}) + class HiFive1(RiscV32): @property @@ -222,6 +235,78 @@ def __init__(self): ) +class MIV_RV32IMAF(RiscV32): + @property + def name(self): + return "miv_rv32imaf" + + @property + def has_single_precision_fpu(self): + return True + + @property + def has_double_precision_fpu(self): + return False + + @property + def compiler_switches(self): + # The required compiler switches + return ("-march=rv32imaf_zicsr", "-mabi=ilp32f") + + @property + def has_small_memory(self): + return True + + @property + def loaders(self): + return ("RAM",) + + @property + def system_ads(self): + return { + "light": "system-xi-riscv.ads", + "light-tasking": "system-xi-riscv-one-irq-prio-light-tasking.ads", + "embedded": "system-xi-riscv-one-irq-prio-full.ads", + } + + @property + def readme_file(self): + return "riscv/microchip/miv_rv32imaf/README" + + def __init__(self): + super(MIV_RV32IMAF, self).__init__() + self.add_linker_script("riscv/microchip/miv_rv32imaf/memory-map.ld") + self.add_linker_script( + "riscv/microchip/miv_rv32imaf/common-RAM.ld", loader="RAM" + ) + self.add_gnat_sources( + "riscv/microchip/miv_rv32imaf/start-ram.S", + "riscv/sifive/fe310/svd/i-fe310.ads", + "riscv/sifive/fe310/svd/i-fe310-plic.ads", + "src/s-bbbopa__miv.ads", + "src/s-macres__none.adb", + "src/s-textio__coreuartapb.adb", + "src/i-microsemi-coreuartapb.ads", + "src/i-microsemi.ads", + "riscv/src/riscv_def.h", + ) + self.add_gnarl_sources( + "riscv/microchip/miv_rv32imaf/a-intnam.ads", + "src/s-bbpara__riscv.ads", + "src/s-bbbosu__riscv.adb", + "src/s-bbsuti__riscv_clint.adb", + "src/s-bbsumu__generic.adb", + "src/s-bbcppr__new.ads", + "src/s-bbcppr__riscv.adb", + "src/s-bbcpsp__riscv.ads", + "src/s-bbcpsp__riscv.adb", + "riscv/src/context_switch.S", + "riscv/src/trap_handler.S", + "riscv/src/s-bbripl.ads", + "riscv/microchip/miv_rv32imaf/s-bbripl.adb", + ) + + class RV32BASE(RiscV32): """ Generic Light run-time meant to be used with the startup generator (crt0 and diff --git a/riscv/microchip/miv_rv32imaf/README b/riscv/microchip/miv_rv32imaf/README new file mode 100644 index 00000000..db3fb5bc --- /dev/null +++ b/riscv/microchip/miv_rv32imaf/README @@ -0,0 +1,117 @@ +Microsemi MIV_RV32IMAF_L1_AHB Runtimes +====================================== + +This BSP supports the Microsemi MIV_RV32IMAF_L1_AHB softcore processor for +the Microsemi FPGAs. + +Required FPGA IP +---------------- + +* MIV_RV32IMAF_L1_AHB +* CoreUARTapb (for Ada.Text_IO) + +Runtimes Supported +------------------ + +* Light +* Light Tasking +* Embedded + +Using the runtimes +------------------ + +As a prerequisite, GNAT Pro for RISC-V32 ELF needs to be installed. To use the +runtime, copy the runtime to the compiler installation or another location: + +(1) Compiler Installation +~~~~~~~~~~~~~~~~~~~~~~~~~ + +Copy the runtime to the `/riscv32-elf/lib/gnat/` +folder. You can then select the runtime in GNAT Studio from the Toolchain pane +of the Project Properties dialog box or set the following in your GPR file: + + for Runtime ("ada") use "light-tasking-am64xr5"; + +(2) Other Locations +~~~~~~~~~~~~~~~~~~ + +Move the runtime into another directory and then in the project file provide +the full or relative path from the project file: + + for Runtime ("ada") use "/path/to/runtime/embedded-miv_rv32imaf"; + +Alternatively, you can set the GPR_RUNTIME_PATH to the folder containing the +runtime to be able to just specify the runtime name. + +Rebuilding the Runtime +---------------------- + +If you need to make changes to the runtime's BSP you can rebuild with GPRbuild. + +For the Light runtime: gprbuild -P runtime_build.gpr + +For the Light-Tasking and Embedded runtimes: gprbuild -P ravenscar_build.gpr + +Note: if you were provided the runtime in a certification context, please reach +out to AdaCore before modifying the runtime. + +Resources Used +-------------- + +The Light-Tasking and Embedded runtimes use the RISC-V mtime and mtimecmp +registers to implement Ada semantics for time, i.e., delay statements and +package Ada.Real_Time. + +Ada.Text_IO is configured to utilise the Microsemi CoreUARTapb IP. See the +Text I/O section for more details. + +Memory Layout +------------- + +The runtime is configured for the following memory space: + + ram (rwx) : ORIGIN = 0x80000000, LENGTH = 512K + ram_io (rwx) : ORIGIN = 0x70000000, LENGTH = 512K + +The size of each region can be modified by updating the linker script in +ld/memory-map.ld. + +A single loader option is provided: RAM. The RAM loader stores and runs the +program out of RAM at the memory address 0x80000000. Both the memory-map.ld +and common-RAM.ld may be modified to suit the application. + +System Clock +------------ + +The runtime is configured for a 80 MHz clock. If your MIV_RV32IMAF_L1_AHB is +fed with a different clock rate, update the System_Clock constant in +System.BB.Board_Parameters (gnat/s-bbbopa.ads) and rebuild the runtime. + +Interrupts +---------- + +The runtime supports 32 IRQ interrupts. Interrupt priorities are not supported +by the Light Tasking and Embedded runtimes. The interrupt names are located in +Ada.Interrupts.Names (gnarl/a-intnam.ads). + +Text I/O +-------- + +The runtime provides a minimal version of the Ada.Text_IO package supporting +character- and string-based input and output routines for basic I/O needs. It +is recommended to implement your own I/O packages based around your I/O +channel of choice. + +The bodies of the Ada.Text_IO routines call through to a device-specific I/O +package named System.Text_IO. See the package body in the file `s-textio.adb` +in the gnat directory for more details. + +System.Text_IO is configured to use CoreUARTapb at address 16#6010_0000#, with +a 115200 baud rate, one stop bit, no parity using system clock source. It +implements a simple polling UART driver. + +The base address of the CoreUARTapb can be changed in System.BB.Parameters +(gnat/s-bbbopa.ads). The CoreUARTapb configuration in System.Text_IO package +may be modified as required. + +The user is free to use the CoreUARTapb device if Ada.Text_IO is not used. diff --git a/riscv/microchip/miv_rv32imaf/a-intnam.ads b/riscv/microchip/miv_rv32imaf/a-intnam.ads new file mode 100644 index 00000000..24dd33d6 --- /dev/null +++ b/riscv/microchip/miv_rv32imaf/a-intnam.ads @@ -0,0 +1,61 @@ +-- +-- Copyright (C) 2023, AdaCore +-- + +-- This is a version for the MIV-RV32 +package Ada.Interrupts.Names is + + -- All identifiers in this unit are implementation defined + + pragma Implementation_Defined; + + ---------------- + -- Interrupts -- + ---------------- + + -- System tick + Sys_Tick_Interrupt : constant Interrupt_ID := -1; + + -- Target Specific Names + + Timer_0 : constant Interrupt_ID := 8; + Timer_1 : constant Interrupt_ID := 12; + Console : constant Interrupt_ID := 15; + Timer_2 : constant Interrupt_ID := 20; + Timer_3 : constant Interrupt_ID := 26; + + -- General IRQ Names + + IRQ1 : constant Interrupt_ID := 1; + IRQ2 : constant Interrupt_ID := 2; + IRQ3 : constant Interrupt_ID := 3; + IRQ4 : constant Interrupt_ID := 4; + IRQ5 : constant Interrupt_ID := 5; + IRQ6 : constant Interrupt_ID := 6; + IRQ7 : constant Interrupt_ID := 7; + IRQ8 : constant Interrupt_ID := 8; + IRQ9 : constant Interrupt_ID := 9; + IRQ10 : constant Interrupt_ID := 10; + IRQ11 : constant Interrupt_ID := 11; + IRQ12 : constant Interrupt_ID := 12; + IRQ13 : constant Interrupt_ID := 13; + IRQ14 : constant Interrupt_ID := 14; + IRQ15 : constant Interrupt_ID := 15; + IRQ16 : constant Interrupt_ID := 16; + IRQ17 : constant Interrupt_ID := 17; + IRQ18 : constant Interrupt_ID := 18; + IRQ19 : constant Interrupt_ID := 19; + IRQ20 : constant Interrupt_ID := 20; + IRQ21 : constant Interrupt_ID := 21; + IRQ22 : constant Interrupt_ID := 22; + IRQ23 : constant Interrupt_ID := 23; + IRQ24 : constant Interrupt_ID := 24; + IRQ25 : constant Interrupt_ID := 25; + IRQ26 : constant Interrupt_ID := 26; + IRQ27 : constant Interrupt_ID := 27; + IRQ28 : constant Interrupt_ID := 28; + IRQ29 : constant Interrupt_ID := 29; + IRQ30 : constant Interrupt_ID := 30; + IRQ31 : constant Interrupt_ID := 31; + +end Ada.Interrupts.Names; diff --git a/riscv/microchip/miv_rv32imaf/common-RAM.ld b/riscv/microchip/miv_rv32imaf/common-RAM.ld new file mode 100644 index 00000000..11e25b9a --- /dev/null +++ b/riscv/microchip/miv_rv32imaf/common-RAM.ld @@ -0,0 +1,228 @@ +/**************************************************************************** + * * + * GNAT COMPILER COMPONENTS * + * * + * R I S C - V * + * * + * Linker Script File * + * * + * Copyright (C) 1999-2002 Universidad Politecnica de Madrid * + * Copyright (C) 2003-2006 The European Space Agency * + * Copyright (C) 2003-2019 AdaCore * + * * + * GNAT is free software; you can redistribute it and/or modify it under * + * terms of the GNU General Public License as published by the Free Soft- * + * ware Foundation; either version 2, or (at your option) any later ver- * + * sion. GNAT is distributed in the hope that it will be useful, but WITH- * + * OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * + * for more details. You should have received a copy of the GNU General * + * Public License distributed with GNAT; see file COPYING. If not, write * + * to the Free Software Foundation, 51 Franklin Street, Fifth Floor, * + * Boston, MA 02110-1301, USA. * + * * + * As a special exception, if you link this file with other files to * + * produce an executable, this file does not by itself cause the resulting * + * executable to be covered by the GNU General Public License. This except- * + * ion does not however invalidate any other reasons why the executable * + * file might be covered by the GNU Public License. * + * * + * GNARL was developed by the GNARL team at Florida State University. * + * Extensive contributions were provided by Ada Core Technologies, Inc. * + * The executive was developed by the Real-Time Systems Group at the * + * Technical University of Madrid. * + * * + ****************************************************************************/ + +/* This is a RISC-V specific version of this file */ + +INCLUDE memory-map.ld + +SEARCH_DIR(.) +__DYNAMIC = 0; + +_DEFAULT_STACK_SIZE = (20 * 1024); + +OUTPUT_ARCH("riscv") + +ENTRY(_start_ram); + +SECTIONS +{ + .text : + { + __text = .; + KEEP (*(SORT_NONE(.start))) + *(.text .text.* .gnu.linkonce.t*) + *(.gnu.warning) + } > ram + + .preinit_array : ALIGN (4) + { + PROVIDE_HIDDEN (__preinit_array_start = .); + PROVIDE_HIDDEN (__preinit_array = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } > ram + + .init_array : ALIGN (4) + { + PROVIDE_HIDDEN (__init_array_start = .); + PROVIDE_HIDDEN (__init_array = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*))) + KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) + PROVIDE_HIDDEN (__init_array_end = .); + } > ram + + .fini_array : ALIGN (4) + { + PROVIDE_HIDDEN (__fini_array_start = .); + PROVIDE_HIDDEN (__fini_array = .); + KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*))) + KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) + PROVIDE_HIDDEN (__fini_array_end = .); + } > ram + + .eh_frame_hdr : + { + __eh_frame_hdr = .; + *(.eh_frame_hdr) + } > ram + + .eh_frame : + { + KEEP (*(.eh_frame)) + } > ram + + .gcc_except_table : + { + *(.gcc_except_table .gcc_except_table.*) + } > ram + + .rodata : + { + *(.rdata) + *(.rodata .rodata.* .gnu.linkonce.r*) + . = ALIGN(0x4); + __rom_end = .; + } > ram + + .data : + { + __data = .; + __data_start = .; + *(.data .data.* .gnu.linkonce.d*) + } > ram + + .srodata ALIGN(4) : ALIGN(4) /* Align both virtual and load addresses */ + { + PROVIDE( __global_pointer$ = . + 0x800 ); + *(.srodata.cst16) + *(.srodata.cst8) + *(.srodata.cst4) + *(.srodata.cst2) + *(.srodata .srodata.*) + } > ram + + .sdata ALIGN(4) : ALIGN(4) /* Align both virtual and load addresses */ + { + *(.sdata .sdata.*) + *(.gnu.linkonce.s.*) + } > ram + + .sdata2 ALIGN(4) : ALIGN(4) /* Align both virtual and load addresses */ + { + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + } > ram + + __data_end = .; + + /* Size of all data sections (.data, .srodata, .sdata) in number of 32bit + * words. + */ + __data_words = (__data_end - __data_start) >> 2; + + /* Base address of all data sections in ROM. The startup code copies these + * sections from __data_load (in ROM) to __data_start (in RAM). + */ + __data_load = LOADADDR(.data); + + .bss (NOLOAD): { + . = ALIGN(0x8); + __bss_start = .; + + *(.sbss*) + *(.gnu.linkonce.sb.*) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + + /* Interrupt stacks. Statically allocated in System.BB.Interrupts */ + __interrupt_stack_start = .; + *(.interrupt_stacks) + . = ALIGN(0x10); /* Align stack to 128 bits as required in the ABI */ + __interrupt_stack_end = .; + + + __stack_start = .; + . += DEFINED (__stack_size) ? __stack_size : _DEFAULT_STACK_SIZE; + . = ALIGN(0x10); /* Align stack to 128 bits as required in the ABI */ + __stack_end = .; + + _end = .; + __heap_start = .; + __heap_end = ORIGIN(ram) + LENGTH(ram); + __bss_end = .; + } > ram + + __bss_words = (__bss_end - __bss_start) >> 2; + + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + + /* DWARF 1. */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions. */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2. */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2. */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions. */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /* DWARF 3. */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + + /* DWARF 5. */ + .debug_addr 0 : { *(.debug_addr) } + .debug_line_str 0 : { *(.debug_line_str) } + .debug_loclists 0 : { *(.debug_loclists) } + .debug_macro 0 : { *(.debug_macro) } + .debug_names 0 : { *(.debug_names) } + .debug_rnglists 0 : { *(.debug_rnglists) } + .debug_str_offsets 0 : { *(.debug_str_offsets) } + .debug_sup 0 : { *(.debug_sup) } + + .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } +} diff --git a/riscv/microchip/miv_rv32imaf/memory-map.ld b/riscv/microchip/miv_rv32imaf/memory-map.ld new file mode 100644 index 00000000..a2b8a650 --- /dev/null +++ b/riscv/microchip/miv_rv32imaf/memory-map.ld @@ -0,0 +1,41 @@ +/**************************************************************************** + * * + * GNAT COMPILER COMPONENTS * + * * + * R I S C - V * + * * + * Linker Script File * + * * + * Copyright (C) 1999-2002 Universidad Politecnica de Madrid * + * Copyright (C) 2003-2006 The European Space Agency * + * Copyright (C) 2003-2019 AdaCore * + * * + * GNAT is free software; you can redistribute it and/or modify it under * + * terms of the GNU General Public License as published by the Free Soft- * + * ware Foundation; either version 2, or (at your option) any later ver- * + * sion. GNAT is distributed in the hope that it will be useful, but WITH- * + * OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * + * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * + * for more details. You should have received a copy of the GNU General * + * Public License distributed with GNAT; see file COPYING. If not, write * + * to the Free Software Foundation, 51 Franklin Street, Fifth Floor, * + * Boston, MA 02110-1301, USA. * + * * + * As a special exception, if you link this file with other files to * + * produce an executable, this file does not by itself cause the resulting * + * executable to be covered by the GNU General Public License. This except- * + * ion does not however invalidate any other reasons why the executable * + * file might be covered by the GNU Public License. * + * * + * GNARL was developed by the GNARL team at Florida State University. * + * Extensive contributions were provided by Ada Core Technologies, Inc. * + * The executive was developed by the Real-Time Systems Group at the * + * Technical University of Madrid. * + * * + ****************************************************************************/ + +MEMORY +{ + ram (rwx) : ORIGIN = 0x80000000, LENGTH = 512K + ram_io (rwx) : ORIGIN = 0x70000000, LENGTH = 512K +} diff --git a/riscv/microchip/miv_rv32imaf/s-bbmcpa.ads b/riscv/microchip/miv_rv32imaf/s-bbmcpa.ads new file mode 100644 index 00000000..982fb094 --- /dev/null +++ b/riscv/microchip/miv_rv32imaf/s-bbmcpa.ads @@ -0,0 +1,43 @@ +------------------------------------------------------------------------------ +-- -- +-- GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS -- +-- -- +-- S Y S T E M . B B . M C U _ P A R A M E T E R S -- +-- -- +-- S p e c -- +-- -- +-- Copyright (C) 2018-2019, AdaCore -- +-- -- +-- GNAT is free software; you can redistribute it and/or modify it under -- +-- terms of the GNU General Public License as published by the Free Soft- -- +-- ware Foundation; either version 3, or (at your option) any later ver- -- +-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- +-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- +-- or FITNESS FOR A PARTICULAR PURPOSE. -- +-- -- +-- As a special exception under Section 7 of GPL version 3, you are granted -- +-- additional permissions described in the GCC Runtime Library Exception, -- +-- version 3.1, as published by the Free Software Foundation. -- +-- -- +-- You should have received a copy of the GNU General Public License and -- +-- a copy of the GCC Runtime Library Exception along with this program; -- +-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- +-- . -- +-- -- +-- GNAT was originally developed by the GNAT team at New York University. -- +-- Extensive contributions were provided by Ada Core Technologies Inc. -- +-- -- +-- The port of GNARL to bare board targets was initially developed by the -- +-- Real-Time Systems Group at the Technical University of Madrid. -- +-- -- +------------------------------------------------------------------------------ + +-- This package defines MCU parameters for the PolarFire Cortex-M1 + +package System.BB.MCU_Parameters is + pragma No_Elaboration_Code_All; + pragma Preelaborate; + + Number_Of_Interrupts : constant := 32; + +end System.BB.MCU_Parameters; diff --git a/riscv/microchip/miv_rv32imaf/s-bbripl.adb b/riscv/microchip/miv_rv32imaf/s-bbripl.adb new file mode 100644 index 00000000..46fd9cfb --- /dev/null +++ b/riscv/microchip/miv_rv32imaf/s-bbripl.adb @@ -0,0 +1,248 @@ +------------------------------------------------------------------------------ +-- -- +-- GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS -- +-- -- +-- S Y S T E M . B B . R I S C V _ P L I C -- +-- -- +-- B o d y -- +-- -- +-- Copyright (C) 2020-2021, AdaCore -- +-- -- +-- GNAT is free software; you can redistribute it and/or modify it under -- +-- terms of the GNU General Public License as published by the Free Soft- -- +-- ware Foundation; either version 3, or (at your option) any later ver- -- +-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- +-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- +-- or FITNESS FOR A PARTICULAR PURPOSE. -- +-- -- +-- As a special exception under Section 7 of GPL version 3, you are granted -- +-- additional permissions described in the GCC Runtime Library Exception, -- +-- version 3.1, as published by the Free Software Foundation. -- +-- -- +-- You should have received a copy of the GNU General Public License and -- +-- a copy of the GCC Runtime Library Exception along with this program; -- +-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- +-- . -- +-- -- +-- GNAT was originally developed by the GNAT team at New York University. -- +-- Extensive contributions were provided by Ada Core Technologies Inc. -- +-- -- +-- The port of GNARL to bare board targets was initially developed by the -- +-- Real-Time Systems Group at the Technical University of Madrid. -- +-- -- +------------------------------------------------------------------------------ + +-- This package implements a simplified PLIC interface defined by the RISC-V +-- Instruction Set Manual, Volume II: Privileged Architecture, Version 1.10 +-- with at most 32 interrupts. + +with Interfaces; use Interfaces; + +with System.BB.CPU_Specific; + +with System.BB.Board_Parameters; use System.BB.Board_Parameters; + +package body System.BB.RISCV_PLIC is + + use type CPU_Specific.Register_Word; + + --------------------- + -- Source Priority -- + --------------------- + + type Priority_Type is mod 2**PLIC_Priority_Bits + with Size => PLIC_Priority_Bits; + + type Priority_Register is record + P : Priority_Type; + end record + with Volatile_Full_Access, Size => 32; + + for Priority_Register use record + P at 0 range 0 .. PLIC_Priority_Bits - 1; + end record; + + type Priority_Array is array (1 .. PLIC_Nbr_Of_Sources) of + Priority_Register; + + Source_Priority : Priority_Array + with Address => PLIC_Base_Address + 4; + + ---------------------- + -- Enable Registers -- + ---------------------- + + type Enable_Array is array (0 .. PLIC_Nbr_Of_Sources - 1) of Boolean + with Pack, Size => 32; + + Interrupt_Enable_Register : Enable_Array + with Address => PLIC_Base_Address + 16#0000_2000#; + + ----------------------------------- + -- Hart Threshold/Claim/Complete -- + ----------------------------------- + + pragma Warnings (Off, "32704 bits of ""Hart_Control"" unused"); + type Hart_Control is record + Threshold : Priority_Register; + Claim_Complete : Unsigned_32; + end record + with Size => 8 * 4096; + pragma Warnings (On, "32704 bits of ""Hart_Control"" unused"); + + for Hart_Control use record + Threshold at 0 range 0 .. 31; + Claim_Complete at 4 range 0 .. 31; + end record; + + type Hart_Control_Array is array (0 .. PLIC_Nbr_Of_Harts - 1) of + Hart_Control + with Size => 8 * 4096 * PLIC_Nbr_Of_Harts; + + Harts_Control : Hart_Control_Array + with Address => PLIC_Base_Address + 16#0020_0000#; + + Claimed_Table : array (BBI.Any_Interrupt_ID) of Boolean := (others => False) + with Ghost; + + ---------------- + -- Initialize -- + ---------------- + + procedure Initialize is + begin + -- Disable all interrupts + + Interrupt_Enable_Register := (others => False); + + -- Set all priority to zero + + for Prio of Source_Priority loop + Prio := (P => 0); + end loop; + end Initialize; + + ------------- + -- Pending -- + ------------- + + function Pending return Boolean is + begin + return (CPU_Specific.Mip and CPU_Specific.Mip_MEIP) /= 0; + end Pending; + + ------------ + -- Enable -- + ------------ + + procedure Enable (Interrupt : BBI.Interrupt_ID) is + begin + Interrupt_Enable_Register (Natural (Interrupt)) := True; + end Enable; + + ------------- + -- Claimed -- + ------------- + + function Claimed (Interrupt : BBI.Interrupt_ID) return Boolean + is (Claimed_Table (Interrupt)); + + ------------ + -- Claim -- + ------------ + + function Claim return BBI.Any_Interrupt_ID is + + Number : constant Unsigned_32 := + Harts_Control (PLIC_Hart_Id).Claim_Complete; + + Id : BBI.Any_Interrupt_ID; + begin + + if Number + not in + Unsigned_32 (BBI.Interrupt_ID'First) .. + Unsigned_32 (BBI.Interrupt_ID'Last) + then + Id := BBI.No_Interrupt; + else + Id := BBI.Interrupt_ID (Number); + end if; + + Claimed_Table (Id) := True; + return Id; + end Claim; + + -------------- + -- Complete -- + -------------- + + procedure Complete (Interrupt : BBI.Interrupt_ID) is + begin + -- Write to the CLAIM register to signal completion + + Harts_Control (PLIC_Hart_Id).Claim_Complete := Unsigned_32 (Interrupt); + Claimed_Table (Interrupt) := False; + end Complete; + + ---------------------------- + -- Set_Priority_Threshold -- + ---------------------------- + + procedure Set_Priority_Threshold (Priority : Integer) is + Hart : Hart_Control renames Harts_Control (PLIC_Hart_Id); + + Int_Priority : constant Integer := + Priority - Interrupt_Priority'First + 1; + + begin + if Int_Priority > Integer (Priority_Type'Last) then + Hart.Threshold := (P => Priority_Type'Last); + elsif Int_Priority < Integer (Priority_Type'First) then + Hart.Threshold := (P => Priority_Type'First); + else + Hart.Threshold := (P => Priority_Type (Int_Priority)); + end if; + end Set_Priority_Threshold; + + --------------- + -- Threshold -- + --------------- + + function Threshold return Integer is + begin + return Integer (Harts_Control (PLIC_Hart_Id).Threshold.P); + end Threshold; + + ------------------ + -- Set_Priority -- + ------------------ + + procedure Set_Priority + (Interrupt : System.BB.Interrupts.Interrupt_ID; + Prio : Interrupt_Priority) + is + Int_Prio : constant Natural := + Natural (Prio) - Natural (Interrupt_Priority'First) + 1; + -- On the PLIC, priority zero is reserved to mean "never interrupt" + + Int_Id : constant Natural := Natural (Interrupt); + begin + Source_Priority (Int_Id).P := Priority_Type (Int_Prio); + end Set_Priority; + + --------------------------- + -- Priority_Of_Interrupt -- + --------------------------- + + function Priority_Of_Interrupt + (Interrupt : System.BB.Interrupts.Interrupt_ID) + return System.Any_Priority + is + Int_Id : constant Natural := Natural (Interrupt); + begin + return Natural (Source_Priority (Int_Id).P) + + Interrupt_Priority'First - 1; + end Priority_Of_Interrupt; + +end System.BB.RISCV_PLIC; diff --git a/riscv/microchip/miv_rv32imaf/start-ram.S b/riscv/microchip/miv_rv32imaf/start-ram.S new file mode 100644 index 00000000..8a1b1614 --- /dev/null +++ b/riscv/microchip/miv_rv32imaf/start-ram.S @@ -0,0 +1,70 @@ + /* Define the Host/Target Interface symbols: + * We don't really need them in the Ada code but QEMU support is looking + * at them to define the address and size of HTIF registers. + */ + + .section .host_target_interface + .globl tohost + .size tohost, 8 +tohost: +.skip 8 + + .globl fromhost + .size fromhost, 8 +fromhost: +.skip 8 + + + /**************/ + /* _start_ram */ + /**************/ + + .section .start + .globl _start_ram + .type _start_ram,@function + +_start_ram: +.option push +.option norelax + la gp, __global_pointer$ +.option pop + la sp, __stack_end + + /* Clear bss section */ + la a0, __bss_start + la a1, __bss_end + bgeu a0, a1, 2f +1: + sw zero, (a0) + addi a0, a0, 4 + bltu a0, a1, 1b +2: + +#define MSTATUS_FS 0x00006000 + + /* Enable FPU */ + li a0, MSTATUS_FS /* Set FPU bit */ + csrs mstatus, a0 /* Move to mstatus register */ + csrr a1, mstatus /* Move from mstatus register */ + and a1, a1, a0 /* Check that the bit is actually set */ + beqz a1, 1f + fssr x0 /* Set rounding mode */ +1: + + /* Clear return address register so GDB knows we've hit the end + * of the stack + */ + + li ra, 0 + + /* Run global C/C++ constructors */ + call __libc_init_array + + /* Call the main routine */ + call main + + /* Cleanup global C/C++ constructors */ + call __libc_fini_array + + call _exit +2: j 2b diff --git a/src/i-microsemi-coreuartapb.ads b/src/i-microsemi-coreuartapb.ads new file mode 100644 index 00000000..3d0a7b3b --- /dev/null +++ b/src/i-microsemi-coreuartapb.ads @@ -0,0 +1,171 @@ +-- +-- Copyright (C) 2019, AdaCore +-- + +-- This spec has been automatically generated from PolarFire.svd + +pragma Ada_2012; +pragma Style_Checks (Off); + +-- serial communication controller with a flexible serial data +-- interface +-- + +with System.BB.Board_Parameters; + +package Interfaces.Microsemi.CoreUARTapb is + pragma Preelaborate; + pragma No_Elaboration_Code_All; + + --------------- + -- Registers -- + --------------- + + subtype Tx_Data_Value_Field is Interfaces.Microsemi.Byte; + + -- Transmit Data register + type Tx_Data_Register is record + Value : Tx_Data_Value_Field := 16#0#; + -- unspecified + Reserved_8_31 : Interfaces.Microsemi.UInt24 := 16#0#; + end record + with Size => 32; + + for Tx_Data_Register use record + Value at 0 range 0 .. 7; + Reserved_8_31 at 0 range 8 .. 31; + end record; + + subtype Rx_Data_Value_Field is Interfaces.Microsemi.Byte; + + -- Receive Data register + type Rx_Data_Register is record + Value : Rx_Data_Value_Field := 16#0#; + -- unspecified + Reserved_8_31 : Interfaces.Microsemi.UInt24 := 16#0#; + end record + with Size => 32; + + for Rx_Data_Register use record + Value at 0 range 0 .. 7; + Reserved_8_31 at 0 range 8 .. 31; + end record; + + subtype Control_1_Baud_Value_Field is Interfaces.Microsemi.Byte; + + -- Control register 1 + type Control_1_Register is record + Baud_Value : Control_1_Baud_Value_Field := 16#0#; + -- unspecified + Reserved_8_31 : Interfaces.Microsemi.UInt24 := 16#0#; + end record + with Size => 32; + + for Control_1_Register use record + Baud_Value at 0 range 0 .. 7; + Reserved_8_31 at 0 range 8 .. 31; + end record; + + type Control_2_Odd_N_Even_Field is + (Even, + Odd) + with Size => 1; + for Control_2_Odd_N_Even_Field use + (Even => 0, + Odd => 1); + + subtype Control_2_Baud_Value_Field is Interfaces.Microsemi.UInt5; + + -- Control register 1 + type Control_2_Register is record + Bit8 : Boolean := False; + Parity_En : Boolean := False; + Odd_N_Even : Control_2_Odd_N_Even_Field := + Interfaces.Microsemi.CoreUARTapb.Even; + Baud_Value : Control_2_Baud_Value_Field := 16#0#; + -- unspecified + Reserved_8_31 : Interfaces.Microsemi.UInt24 := 16#0#; + end record + with Size => 32; + + for Control_2_Register use record + Bit8 at 0 range 0 .. 0; + Parity_En at 0 range 1 .. 1; + Odd_N_Even at 0 range 2 .. 2; + Baud_Value at 0 range 3 .. 7; + Reserved_8_31 at 0 range 8 .. 31; + end record; + + -- Control register 1 + type Status_Register is record + TX_Rdy : Boolean := False; + RX_Rdy : Boolean := False; + Parity_Err : Boolean := False; + Overflow : Boolean := False; + Framing_Err : Boolean := False; + -- unspecified + Reserved_5_31 : Interfaces.Microsemi.UInt27 := 16#0#; + end record + with Size => 32; + + for Status_Register use record + TX_Rdy at 0 range 0 .. 0; + RX_Rdy at 0 range 1 .. 1; + Parity_Err at 0 range 2 .. 2; + Overflow at 0 range 3 .. 3; + Framing_Err at 0 range 4 .. 4; + Reserved_5_31 at 0 range 5 .. 31; + end record; + + subtype Control_3_Baud_Val_Fraction_Field is Interfaces.Microsemi.UInt3; + + -- Control register 1 + type Control_3_Register is record + Baud_Val_Fraction : Control_3_Baud_Val_Fraction_Field := 16#0#; + -- unspecified + Reserved_3_31 : Interfaces.Microsemi.UInt29 := 16#0#; + end record + with Size => 32; + + for Control_3_Register use record + Baud_Val_Fraction at 0 range 0 .. 2; + Reserved_3_31 at 0 range 3 .. 31; + end record; + + ----------------- + -- Peripherals -- + ----------------- + + -- serial communication controller with a flexible serial data interface + type CoreUARTapb_Peripheral is record + -- Transmit Data register + Tx_Data : aliased Tx_Data_Register; + -- Receive Data register + Rx_Data : aliased Rx_Data_Register; + -- Control register 1 + Control_1 : aliased Control_1_Register; + -- Control register 1 + Control_2 : aliased Control_2_Register; + -- Control register 1 + Status : aliased Status_Register; + -- Control register 1 + Control_3 : aliased Control_3_Register; + end record + with Volatile; + + for CoreUARTapb_Peripheral use record + Tx_Data at 16#0# range 0 .. 31; + Rx_Data at 16#4# range 0 .. 31; + Control_1 at 16#8# range 0 .. 31; + Control_2 at 16#C# range 0 .. 31; + Status at 16#10# range 0 .. 31; + Control_3 at 16#14# range 0 .. 31; + end record; + + -- serial communication controller with a flexible serial data interface + CoreUARTapb_Periph : aliased CoreUARTapb_Peripheral + with Import, + Address => + System'To_Address (System.BB.Board_Parameters.UART_Base_Address); + +end Interfaces.Microsemi.CoreUARTapb; diff --git a/arm/cortex-m1/microsemi/svd/i-microsemi.ads b/src/i-microsemi.ads similarity index 91% rename from arm/cortex-m1/microsemi/svd/i-microsemi.ads rename to src/i-microsemi.ads index 7337c52d..76af54cc 100644 --- a/arm/cortex-m1/microsemi/svd/i-microsemi.ads +++ b/src/i-microsemi.ads @@ -7,8 +7,6 @@ pragma Ada_2012; pragma Style_Checks (Off); -with System; - -- Microsemi FPGA IP package Interfaces.Microsemi is pragma Preelaborate; @@ -79,11 +77,4 @@ package Interfaces.Microsemi is with Size => 30; type UInt31 is mod 2**31 with Size => 31; - - -------------------- - -- Base addresses -- - -------------------- - - CoreUARTapb_Base : constant System.Address := System'To_Address (16#42000000#); - end Interfaces.Microsemi; diff --git a/src/s-bbbopa__miv.ads b/src/s-bbbopa__miv.ads new file mode 100644 index 00000000..d7689951 --- /dev/null +++ b/src/s-bbbopa__miv.ads @@ -0,0 +1,86 @@ +------------------------------------------------------------------------------ +-- -- +-- GNAT RUN-TIME LIBRARY (GNARL) COMPONENTS -- +-- -- +-- S Y S T E M . B B . B O A R D _ P A R A M E T E R S -- +-- -- +-- S p e c -- +-- -- +-- Copyright (C) 2012-2020, AdaCore -- +-- -- +-- GNAT is free software; you can redistribute it and/or modify it under -- +-- terms of the GNU General Public License as published by the Free Soft- -- +-- ware Foundation; either version 3, or (at your option) any later ver- -- +-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- +-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- +-- or FITNESS FOR A PARTICULAR PURPOSE. -- +-- -- +-- As a special exception under Section 7 of GPL version 3, you are granted -- +-- additional permissions described in the GCC Runtime Library Exception, -- +-- version 3.1, as published by the Free Software Foundation. -- +-- -- +-- You should have received a copy of the GNU General Public License and -- +-- a copy of the GCC Runtime Library Exception along with this program; -- +-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- +-- . -- +-- -- +-- GNAT was originally developed by the GNAT team at New York University. -- +-- Extensive contributions were provided by Ada Core Technologies Inc. -- +-- -- +-- The port of GNARL to bare board targets was initially developed by the -- +-- Real-Time Systems Group at the Technical University of Madrid. -- +-- -- +------------------------------------------------------------------------------ + +-- This package defines board parameters for the Mi-V soft cores from +-- Microchip + +package System.BB.Board_Parameters is + pragma No_Elaboration_Code_All; + pragma Pure; + + -------------------- + -- Hardware clock -- + -------------------- + + Clock_Scale : constant := 1; + -- Scaling factor for clock frequency. This is used to provide a clock + -- frequency that results in a definition of Time_Unit less than 20 + -- microseconds (as Ada RM D.8 (30) requires). + + System_Clock : constant := 80_000_000; + -- Clock feed into the Mi-V soft core + + Timer_Frequency : constant Positive := System_Clock / 100; + -- Frequency of the mtime clock + + Clock_Frequency : constant Positive := Timer_Frequency * Clock_Scale; + -- Scaled clock frequency + + -- Core-Local Interruptor + + CLINT_Base_Address : constant := 16#4400_0000#; + CLINT_Mtime_Offset : constant := 16#BFF8#; + CLINT_Mtimecmp_Offset : constant := 16#4000#; + + Mtime_Base_Address : constant := + CLINT_Base_Address + CLINT_Mtime_Offset; + -- Address of the memory mapped mtime register + + Mtimecmp_Base_Address : constant := + CLINT_Base_Address + CLINT_Mtimecmp_Offset; + -- Address of the memory mapped mtimecmp register + + -- Platform Level Interrupt Controller + + PLIC_Base_Address : constant := 16#4000_0000#; + PLIC_Nbr_Of_Harts : constant := 1; + PLIC_Nbr_Of_Sources : constant := 32; + PLIC_Hart_Id : constant := 0; + PLIC_Priority_Bits : constant := 1; + + -- Peripheral addresses + + UART_Base_Address : constant := 16#6010_0000#; + +end System.BB.Board_Parameters; diff --git a/src/s-bbcpsp__riscv.adb b/src/s-bbcpsp__riscv.adb index d05109ca..b60a8421 100644 --- a/src/s-bbcpsp__riscv.adb +++ b/src/s-bbcpsp__riscv.adb @@ -51,9 +51,8 @@ package body System.BB.CPU_Specific is -- arguments in the RISC-V ABI. These registers potentially hold a -- meaningful value in case of syscall or semihosting call. - procedure Os_Exit; - pragma Import (Ada, Os_Exit, "__gnat_exit"); - pragma No_Return (Os_Exit); + procedure OS_Abort + with Import, Convention => Ada, External_Name => "abort", No_Return; ------------------ -- Trap_Handler -- @@ -101,7 +100,7 @@ package body System.BB.CPU_Specific is when 11 => -- Environment call from M-mode case A7 is -- Syscall ID - when 93 => Os_Exit; + when 93 => OS_Abort; when others => raise Program_Error with "Unhandled syscall:" & A7'Img; end case; diff --git a/arm/cortex-m1/microsemi/s-textio.adb b/src/s-textio__coreuartapb.adb similarity index 96% rename from arm/cortex-m1/microsemi/s-textio.adb rename to src/s-textio__coreuartapb.adb index 8e6e6054..642c859d 100644 --- a/arm/cortex-m1/microsemi/s-textio.adb +++ b/src/s-textio__coreuartapb.adb @@ -46,7 +46,7 @@ package body System.Text_IO is -- Divider for Baudrate CoreUARTapb_Periph.Control_1.Baud_Value := - Byte (System.BB.Board_Parameters.Clock_Frequency / + Byte (System.BB.Board_Parameters.System_Clock / (16 * Baud_Rate) - 1); CoreUARTapb_Periph.Control_2.Bit8 := True; @@ -92,6 +92,6 @@ package body System.Text_IO is -- Use_Cr_Lf_For_New_Line -- ---------------------------- - function Use_Cr_Lf_For_New_Line return Boolean is (True); + function Use_Cr_Lf_For_New_Line return Boolean is (False); end System.Text_IO; diff --git a/src/system/system-xi-riscv-one-irq-prio-full.ads b/src/system/system-xi-riscv-one-irq-prio-full.ads new file mode 100644 index 00000000..d5005b2b --- /dev/null +++ b/src/system/system-xi-riscv-one-irq-prio-full.ads @@ -0,0 +1,170 @@ +------------------------------------------------------------------------------ +-- -- +-- GNAT RUN-TIME COMPONENTS -- +-- -- +-- S Y S T E M -- +-- -- +-- S p e c -- +-- (RiscV64 Version) -- +-- -- +-- Copyright (C) 1992-2023, Free Software Foundation, Inc. -- +-- -- +-- This specification is derived from the Ada Reference Manual for use with -- +-- GNAT. The copyright notice above, and the license provisions that follow -- +-- apply solely to the contents of the part following the private keyword. -- +-- -- +-- GNAT is free software; you can redistribute it and/or modify it under -- +-- terms of the GNU General Public License as published by the Free Soft- -- +-- ware Foundation; either version 3, or (at your option) any later ver- -- +-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- +-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- +-- or FITNESS FOR A PARTICULAR PURPOSE. -- +-- -- +-- As a special exception under Section 7 of GPL version 3, you are granted -- +-- additional permissions described in the GCC Runtime Library Exception, -- +-- version 3.1, as published by the Free Software Foundation. -- +-- -- +-- You should have received a copy of the GNU General Public License and -- +-- a copy of the GCC Runtime Library Exception along with this program; -- +-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- +-- . -- +-- -- +-- GNAT was originally developed by the GNAT team at New York University. -- +-- Extensive contributions were provided by Ada Core Technologies Inc. -- +-- -- +------------------------------------------------------------------------------ + +pragma Restrictions (No_Exception_Registration); +-- Disable exception name registration. This capability is not used because +-- it is only required by exception stream attributes which are not supported +-- in this run time. + +pragma Profile (Jorvik); +-- This is a bare metal tasking runtime + +package System is + pragma Pure; + -- Note that we take advantage of the implementation permission to make + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + + pragma No_Elaboration_Code_All; + -- Allow the use of that restriction in units that WITH this unit + + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + + -- System-Dependent Named Numbers + + Min_Int : constant := -2 ** (Standard'Max_Integer_Size - 1); + Max_Int : constant := 2 ** (Standard'Max_Integer_Size - 1) - 1; + + Max_Binary_Modulus : constant := 2 ** Standard'Max_Integer_Size; + Max_Nonbinary_Modulus : constant := 2 ** Integer'Size - 1; + + Max_Base_Digits : constant := Long_Long_Float'Digits; + Max_Digits : constant := Long_Long_Float'Digits; + + Max_Mantissa : constant := Standard'Max_Integer_Size - 1; + Fine_Delta : constant := 2.0 ** (-Max_Mantissa); + + Tick : constant := 0.0; + + -- Storage-related Declarations + + type Address is private; + pragma Preelaborable_Initialization (Address); + Null_Address : constant Address; + + Storage_Unit : constant := 8; + Word_Size : constant := Standard'Word_Size; + Memory_Size : constant := 2 ** Word_Size; + + -- Address comparison + + function "<" (Left, Right : Address) return Boolean; + function "<=" (Left, Right : Address) return Boolean; + function ">" (Left, Right : Address) return Boolean; + function ">=" (Left, Right : Address) return Boolean; + function "=" (Left, Right : Address) return Boolean; + + pragma Import (Intrinsic, "<"); + pragma Import (Intrinsic, "<="); + pragma Import (Intrinsic, ">"); + pragma Import (Intrinsic, ">="); + pragma Import (Intrinsic, "="); + + -- Other System-Dependent Declarations + + type Bit_Order is (High_Order_First, Low_Order_First); + Default_Bit_Order : constant Bit_Order := + Bit_Order'Val (Standard'Default_Bit_Order); + pragma Warnings (Off, Default_Bit_Order); -- kill constant condition warning + + -- Priority-related Declarations (RM D.1) + + Nbr_Interrupt_Priority : constant Positive := 1; + -- The interrupt controller only supports a single priority level + + Max_Interrupt_Priority : constant Positive := 255; + Min_Interrupt_Priority : constant Positive := + Max_Interrupt_Priority - Nbr_Interrupt_Priority + 1; + Max_Priority : constant Positive := + Min_Interrupt_Priority - 1; + + subtype Any_Priority + is Integer range 0 .. Max_Interrupt_Priority; + subtype Priority + is Any_Priority range 0 .. Max_Priority; + subtype Interrupt_Priority + is Any_Priority range Min_Interrupt_Priority .. Max_Interrupt_Priority; + + Default_Priority : constant Priority := + (Priority'First + Priority'Last) / 2; + +private + + type Address is mod Memory_Size; + for Address'Size use Standard'Address_Size; + + Null_Address : constant Address := 0; + + -------------------------------------- + -- System Implementation Parameters -- + -------------------------------------- + + -- These parameters provide information about the target that is used + -- by the compiler. They are in the private part of System, where they + -- can be accessed using the special circuitry in the Targparm unit + -- whose source should be consulted for more detailed descriptions + -- of the individual switch values. + + Atomic_Sync_Default : constant Boolean := False; + Backend_Divide_Checks : constant Boolean := False; + Backend_Overflow_Checks : constant Boolean := True; + Command_Line_Args : constant Boolean := False; + Configurable_Run_Time : constant Boolean := True; + Denorm : constant Boolean := True; + Duration_32_Bits : constant Boolean := False; + Exit_Status_Supported : constant Boolean := False; + Fractional_Fixed_Ops : constant Boolean := False; + Frontend_Layout : constant Boolean := False; + Machine_Overflows : constant Boolean := False; + Machine_Rounds : constant Boolean := True; + Preallocated_Stacks : constant Boolean := True; + Signed_Zeros : constant Boolean := True; + Stack_Check_Default : constant Boolean := False; + Stack_Check_Probes : constant Boolean := False; + Stack_Check_Limits : constant Boolean := False; + Support_Aggregates : constant Boolean := True; + Support_Atomic_Primitives : constant Boolean := True; + Support_Composite_Assign : constant Boolean := True; + Support_Composite_Compare : constant Boolean := True; + Support_Long_Shifts : constant Boolean := True; + Always_Compatible_Rep : constant Boolean := True; + Suppress_Standard_Library : constant Boolean := False; + Use_Ada_Main_Program_Name : constant Boolean := False; + Frontend_Exceptions : constant Boolean := False; + ZCX_By_Default : constant Boolean := True; + +end System; diff --git a/src/system/system-xi-riscv-one-irq-prio-light-tasking.ads b/src/system/system-xi-riscv-one-irq-prio-light-tasking.ads new file mode 100644 index 00000000..4baa58d9 --- /dev/null +++ b/src/system/system-xi-riscv-one-irq-prio-light-tasking.ads @@ -0,0 +1,179 @@ +------------------------------------------------------------------------------ +-- -- +-- GNAT RUN-TIME COMPONENTS -- +-- -- +-- S Y S T E M -- +-- -- +-- S p e c -- +-- (RiscV64 Version) -- +-- -- +-- Copyright (C) 1992-2023, Free Software Foundation, Inc. -- +-- -- +-- This specification is derived from the Ada Reference Manual for use with -- +-- GNAT. The copyright notice above, and the license provisions that follow -- +-- apply solely to the contents of the part following the private keyword. -- +-- -- +-- GNAT is free software; you can redistribute it and/or modify it under -- +-- terms of the GNU General Public License as published by the Free Soft- -- +-- ware Foundation; either version 3, or (at your option) any later ver- -- +-- sion. GNAT is distributed in the hope that it will be useful, but WITH- -- +-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY -- +-- or FITNESS FOR A PARTICULAR PURPOSE. -- +-- -- +-- As a special exception under Section 7 of GPL version 3, you are granted -- +-- additional permissions described in the GCC Runtime Library Exception, -- +-- version 3.1, as published by the Free Software Foundation. -- +-- -- +-- You should have received a copy of the GNU General Public License and -- +-- a copy of the GCC Runtime Library Exception along with this program; -- +-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -- +-- . -- +-- -- +-- GNAT was originally developed by the GNAT team at New York University. -- +-- Extensive contributions were provided by Ada Core Technologies Inc. -- +-- -- +------------------------------------------------------------------------------ + +pragma Restrictions (No_Exception_Propagation); +-- Only local exception handling is supported in this profile + +pragma Restrictions (No_Exception_Registration); +-- Disable exception name registration. This capability is not used because +-- it is only required by exception stream attributes which are not supported +-- in this run time. + +pragma Restrictions (No_Implicit_Dynamic_Code); +-- Pointers to nested subprograms are not allowed in this run time, in order +-- to prevent the compiler from building "trampolines". + +pragma Restrictions (No_Finalization); +-- Controlled types are not supported in this run time + +pragma Profile (Jorvik); +-- This is a bare metal tasking runtime + +package System is + pragma Pure; + -- Note that we take advantage of the implementation permission to make + -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada + -- 2005, this is Pure in any case (AI-362). + + pragma No_Elaboration_Code_All; + -- Allow the use of that restriction in units that WITH this unit + + type Name is (SYSTEM_NAME_GNAT); + System_Name : constant Name := SYSTEM_NAME_GNAT; + + -- System-Dependent Named Numbers + + Min_Int : constant := -2 ** (Standard'Max_Integer_Size - 1); + Max_Int : constant := 2 ** (Standard'Max_Integer_Size - 1) - 1; + + Max_Binary_Modulus : constant := 2 ** Standard'Max_Integer_Size; + Max_Nonbinary_Modulus : constant := 2 ** Integer'Size - 1; + + Max_Base_Digits : constant := Long_Long_Float'Digits; + Max_Digits : constant := Long_Long_Float'Digits; + + Max_Mantissa : constant := Standard'Max_Integer_Size - 1; + Fine_Delta : constant := 2.0 ** (-Max_Mantissa); + + Tick : constant := 0.0; + + -- Storage-related Declarations + + type Address is private; + pragma Preelaborable_Initialization (Address); + Null_Address : constant Address; + + Storage_Unit : constant := 8; + Word_Size : constant := Standard'Word_Size; + Memory_Size : constant := 2 ** Word_Size; + + -- Address comparison + + function "<" (Left, Right : Address) return Boolean; + function "<=" (Left, Right : Address) return Boolean; + function ">" (Left, Right : Address) return Boolean; + function ">=" (Left, Right : Address) return Boolean; + function "=" (Left, Right : Address) return Boolean; + + pragma Import (Intrinsic, "<"); + pragma Import (Intrinsic, "<="); + pragma Import (Intrinsic, ">"); + pragma Import (Intrinsic, ">="); + pragma Import (Intrinsic, "="); + + -- Other System-Dependent Declarations + + type Bit_Order is (High_Order_First, Low_Order_First); + Default_Bit_Order : constant Bit_Order := + Bit_Order'Val (Standard'Default_Bit_Order); + pragma Warnings (Off, Default_Bit_Order); -- kill constant condition warning + + -- Priority-related Declarations (RM D.1) + + Nbr_Interrupt_Priority : constant Positive := 1; + + Max_Interrupt_Priority : constant Positive := 255; + Min_Interrupt_Priority : constant Positive := + Max_Interrupt_Priority - Nbr_Interrupt_Priority + 1; + Max_Priority : constant Positive := + Min_Interrupt_Priority - 1; + + subtype Any_Priority + is Integer range 0 .. Max_Interrupt_Priority; + subtype Priority + is Any_Priority range 0 .. Max_Priority; + subtype Interrupt_Priority + is Any_Priority range Min_Interrupt_Priority .. Max_Interrupt_Priority; + + Default_Priority : constant Priority := + (Priority'First + Priority'Last) / 2; + +private + + type Address is mod Memory_Size; + for Address'Size use Standard'Address_Size; + + Null_Address : constant Address := 0; + + -------------------------------------- + -- System Implementation Parameters -- + -------------------------------------- + + -- These parameters provide information about the target that is used + -- by the compiler. They are in the private part of System, where they + -- can be accessed using the special circuitry in the Targparm unit + -- whose source should be consulted for more detailed descriptions + -- of the individual switch values. + + Atomic_Sync_Default : constant Boolean := False; + Backend_Divide_Checks : constant Boolean := False; + Backend_Overflow_Checks : constant Boolean := True; + Command_Line_Args : constant Boolean := False; + Configurable_Run_Time : constant Boolean := True; + Denorm : constant Boolean := True; + Duration_32_Bits : constant Boolean := False; + Exit_Status_Supported : constant Boolean := False; + Fractional_Fixed_Ops : constant Boolean := False; + Frontend_Layout : constant Boolean := False; + Machine_Overflows : constant Boolean := False; + Machine_Rounds : constant Boolean := True; + Preallocated_Stacks : constant Boolean := True; + Signed_Zeros : constant Boolean := True; + Stack_Check_Default : constant Boolean := False; + Stack_Check_Probes : constant Boolean := False; + Stack_Check_Limits : constant Boolean := False; + Support_Aggregates : constant Boolean := True; + Support_Atomic_Primitives : constant Boolean := True; + Support_Composite_Assign : constant Boolean := True; + Support_Composite_Compare : constant Boolean := True; + Support_Long_Shifts : constant Boolean := True; + Always_Compatible_Rep : constant Boolean := True; + Suppress_Standard_Library : constant Boolean := True; + Use_Ada_Main_Program_Name : constant Boolean := False; + Frontend_Exceptions : constant Boolean := False; + ZCX_By_Default : constant Boolean := True; + +end System;